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公开(公告)号：US07282391B1
公开(公告)日：2007-10-16
申请号：US11385121
申请日：2006-03-21
申请人： Paul Stephen Andry , Leena Paivikki Buchwalter , Raymond R. Horton , John Ulrich Knickerbocker , Cornelia K. Tsang , Steven Lorenz Wright
发明人： Paul Stephen Andry , Leena Paivikki Buchwalter , Raymond R. Horton , John Ulrich Knickerbocker , Cornelia K. Tsang , Steven Lorenz Wright
CPC分类号： H01L24/81 , H01L23/544 , H01L24/48 , H01L24/97 , H01L25/50 , H01L2223/54426 , H01L2223/54473 , H01L2224/05568 , H01L2224/05573 , H01L2224/05644 , H01L2224/05647 , H01L2224/13144 , H01L2224/13147 , H01L2224/16 , H01L2224/48227 , H01L2224/81001 , H01L2224/81054 , H01L2224/81136 , H01L2224/81203 , H01L2224/8121 , H01L2224/81815 , H01L2224/85444 , H01L2224/85447 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15157 , H01L2924/1517 , H01L2924/15174 , H01L2924/20109 , H01L2224/81 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.
摘要翻译： 一种电子潜水及其制造方法。 所述方法包括将放置引导件放置在模块基板的顶表面上，所述放置引导件具有引导开口，所述引导开口从所述放置引导件的顶表面延伸到所述放置引导件的底表面; 将所述放置引导件对准所述模块基板上的集成电路芯片位置; 将所述放置引导件固定到所述模块基板; 将集成电路芯片放置在引导开口中，放置引导开口的侧壁约束集成电路芯片的底表面上的导电接合结构，以与模块基板的顶表面上的导电模块衬底接触焊盘自对准 集成电路芯片位置; 以及在接合之后将结合结构粘合到模块衬底接触焊盘，接合结构和模块衬底接触焊盘，直接物理和电接触。
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公开(公告)号：US06376054B1
公开(公告)日：2002-04-23
申请号：US09249985
申请日：1999-02-10
申请人： Scott I. Langenthal , Thomas E. Lombardi , Richard Francis Indyk , John Ulrich Knickerbocker , Srinivasa S. N. Reddy , Richard A. Shelleman , Rao V. Vallabhaneni , Donald Rene Wall
发明人： Scott I. Langenthal , Thomas E. Lombardi , Richard Francis Indyk , John Ulrich Knickerbocker , Srinivasa S. N. Reddy , Richard A. Shelleman , Rao V. Vallabhaneni , Donald Rene Wall
IPC分类号： B32B300
CPC分类号： G01R1/0466 , G01R1/0408 , Y10T428/24917 , Y10T428/24926
摘要： A cost-effective surface metallization structure of a TCA carrier is produced by using a high-grit conducting paste to fill TSM vias in the TSM of the TCA carrier. This concept can be applied to alumina substrates with refractory metal conductors or to LCGC substrates with more noble metal conductors.
摘要翻译： 通过使用高粒度导电膏来填充TCA载体的TSM中的TSM通孔，制造了TCA载体的经济有效的表面金属化结构。 该概念可以应用于具有难熔金属导体的氧化铝衬底或具有更贵贵金属导体的LCGC衬底。
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公开(公告)号：US06264885B1
公开(公告)日：2001-07-24
申请号：US09377987
申请日：1999-08-18
IPC分类号： B22F704
CPC分类号： H01J29/68 , H01F7/0278 , H01F41/16
摘要： A metal/ferrite laminate magnet has perforations forming apertures in the magnet. The magnet is formed of outside metal plates surrounding a sandwich of two layers of ferrite material. The outside metal plates allow the perforations to be made in the magnet before sintering of the magnet and maintain the alignment of the holes during sintering. The metal plates also provide the magnet with mechanical robustness and rigidity and prevent cracking occurring between adjacent apertures.
摘要翻译： 金属/铁氧体层叠磁体具有在磁体中形成孔的穿孔。 磁体由围绕两层铁素体材料的夹层的外部金属板形成。 外部金属板允许在磁体烧结之前在磁体中形成穿孔，并且在烧结期间保持孔的对准。 金属板还为磁体提供机械坚固性和刚性，并防止在相邻孔之间发生裂纹。
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34.发明授权Silicon carrier space transformer and temporary chip attach burn-in vehicle for high density connections 有权硅载体空间变压器和临时芯片附加老化车高密度连接公开(公告)号：US09159616B2
公开(公告)日：2015-10-13
申请号：US13569915
申请日：2012-08-08
IPC分类号： H01L21/44 , H01L21/768 , G01R31/28 , H01L49/02
CPC分类号： H01L21/76885 , G01R31/2889 , G01R31/2893 , G01R31/2894 , H01L28/10 , H01L28/40
摘要： A silicon carrier space transformer assembly includes one or more silicon structures, which provide space transformer scaling to permit interconnection for fine pitch input/output interconnections with a semiconductor die or wafer, and fine pitch test probe tips connected to the one or more silicon structures.
摘要翻译： 硅载体空间变压器组件包括一个或多个硅结构，其提供空间变压器缩放以允许与半导体管芯或晶片的精细间距输入/输出互连的互连，以及连接到所述一个或多个硅结构的细间距测试探针尖端。
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公开(公告)号：US08689437B2
公开(公告)日：2014-04-08
申请号：US12490804
申请日：2009-06-24
申请人： Bing Dang , David Hirsch Danovitch , Mario John Interrante , John Ulrich Knickerbocker , Michael Jay Shapiro , Van Thanh Truong
发明人： Bing Dang , David Hirsch Danovitch , Mario John Interrante , John Ulrich Knickerbocker , Michael Jay Shapiro , Van Thanh Truong
CPC分类号： H01L21/6836 , H01L21/6835 , H01L24/02 , H01L24/11 , H01L24/16 , H01L24/81 , H01L24/94 , H01L24/95 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/68354 , H01L2221/68372 , H01L2224/0401 , H01L2224/11002 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16235 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/80006 , H01L2224/81005 , H01L2224/81011 , H01L2224/81801 , H01L2224/83005 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/01006 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , Y10T29/49117 , Y10T29/49124 , Y10T29/49147 , Y10T29/49149 , Y10T29/49155 , Y10T29/49204 , H01L2224/81 , H01L2924/00012 , H01L2224/11 , H01L2224/83
摘要： A method for forming an integrated circuit assembly comprises forming first solder bumps on a first die, and forming a first structure comprising the first die, the first solder bumps, a first flux, and a first substratum. The first die is placed upon the first substratum. The first solder bumps are between the first die and the first substratum. The first flux holds the first die substantially flat and onto the first substratum.
摘要翻译： 一种用于形成集成电路组件的方法包括：在第一裸片上形成第一焊料凸块，以及形成包括第一裸片，第一焊料凸点，第一焊剂和第一衬底的第一结构。 第一个模具被放置在第一个基础上。 第一焊锡凸块位于第一裸片和第一衬底之间。 第一通量使第一模具基本平坦并保持在第一基底上。
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36.发明授权Silicon carrier space transformer and temporary chip attach burn-in vehicle for high density connections 有权硅载体空间变压器和临时芯片附加老化车高密度连接公开(公告)号：US08310259B2
公开(公告)日：2012-11-13
申请号：US12024655
申请日：2008-02-01
IPC分类号： G01R31/00
CPC分类号： H01L21/76885 , G01R31/2889 , G01R31/2893 , G01R31/2894 , H01L28/10 , H01L28/40
摘要： A silicon carrier space transformer assembly includes one or more silicon structures, which provide space transformer scaling to permit interconnection for fine pitch input/output interconnections with a semiconductor die or wafer, and fine pitch test probe tips connected to the one or more silicon structures.
摘要翻译： 硅载体空间变压器组件包括一个或多个硅结构，其提供空间变压器缩放以允许与半导体管芯或晶片的精细间距输入/输出互连的互连，以及连接到所述一个或多个硅结构的细间距测试探针尖端。
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37.发明申请SILICON CARRIER SPACE TRANSFORMER AND TEMPORARY CHIP ATTACH BURN-IN VEHICLE FOR HIGH DENSITY CONNECTIONS 有权硅载体空间变压器和临时芯片连接用于高密度连接的燃烧车辆公开(公告)号：US20120249173A1
公开(公告)日：2012-10-04
申请号：US12024655
申请日：2008-02-01
IPC分类号： G01R1/067
CPC分类号： H01L21/76885 , G01R31/2889 , G01R31/2893 , G01R31/2894 , H01L28/10 , H01L28/40
摘要： A silicon carrier space transformer assembly includes one or more silicon structures, which provide space transformer scaling to permit interconnection for fine pitch input/output interconnections with a semiconductor die or wafer, and fine pitch test probe tips connected to the one or more silicon structures.
摘要翻译： 硅载体空间变压器组件包括一个或多个硅结构，其提供空间变压器缩放以允许与半导体管芯或晶片的精细间距输入/输出互连的互连，以及连接到所述一个或多个硅结构的细间距测试探针尖端。
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公开(公告)号：US20120133051A1
公开(公告)日：2012-05-31
申请号：US13365505
申请日：2012-02-03
IPC分类号： H01L23/522
CPC分类号： H01L23/34 , G01R31/2877 , H01L23/473 , H01L23/5384 , H01L23/544 , H01L25/0652 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/17181 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06572 , H01L2225/06589 , H01L2924/01019 , H01L2924/10253 , H01L2924/15311 , H01L2924/15331 , H01L2924/00
摘要： A chip package includes: a substrate; a plurality of conductive connections in contact with the silicon carrier; a silicon carrier in a prefabricated shape disposed above the substrate, the silicon carrier including: a plurality of through silicon vias for providing interconnections through the silicon carrier to the chip; liquid microchannels for cooling; a liquid coolant flowing through the microchannels; and an interconnect to one or more chips or chip stacks.
摘要翻译： 芯片封装包括：基板; 与硅载体接触的多个导电连接; 设置在所述衬底上方的预制形状的硅载体，所述硅载体包括：多个通过硅通孔，用于提供通过所述硅载体与所述芯片的互连; 液体微通道进行冷却; 流过微通道的液体冷却剂; 以及与一个或多个芯片或芯片堆叠的互连。
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公开(公告)号：US20110312129A1
公开(公告)日：2011-12-22
申请号：US13219801
申请日：2011-08-29
IPC分类号： H01L21/60
CPC分类号： H01L23/49833 , H01L24/16 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L2224/16 , H01L2224/16145 , H01L2224/16227 , H01L2224/17181 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06572 , H01L2924/00013 , H01L2924/01079 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/15192 , H01L2924/15311 , H01L2224/29099
摘要： A structure formation method. The method may include: attaching a substrate, a first interposer, a second interposer, and a first bridge together such that the first interposer is on and electrically connected to the substrate, the second interposer is on and electrically connected to the substrate, the first interposer comprises at least a first transistor, and the second interposer comprises at least a second transistor. The method may alternatively include: disposing both a first and second interposer on a substrate, wherein the first and second interposer are each electrically connected to the substrate; and electrically connecting a first bridge to the first and second interposers, wherein (i) the first bridge is in direct physical contact with the substrate or (ii) a bottom surface of the first bridge is within the substrate and below a top surface of the substrate.
摘要翻译： 一种结构形成方法。 该方法可以包括：将基板，第一插入件，第二插入件和第一桥接器连接在一起，使得第一插入件在基板上并电连接到第二插入器，第二插入器在基板上电连接， 至少包括第一晶体管，并且第二插入器至少包括第二晶体管。 该方法可以可替代地包括：将第一和第二插入件布置在衬底上，其中第一和第二插入器各自电连接到衬底; 以及将第一桥接电连接到所述第一和第二插入件，其中（i）所述第一桥与所述衬底直接物理接触，或（ii）所述第一桥的底表面在所述衬底内并且位于所述衬底的顶表面之下 基质。
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公开(公告)号：US07902069B2
公开(公告)日：2011-03-08
申请号：US11833112
申请日：2007-08-02
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/80 , H01L24/94 , H01L2224/0401 , H01L2224/0557 , H01L2224/13025 , H01L2224/16 , H01L2224/94 , H01L2924/0002 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/1461 , H01L2924/19041 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor structure includes: at least one silicon surface wherein the surface can be a substrate, wafer or other device. The structure further includes at least one electronic circuit formed on each side of the at least one surface; and at least one conductive high aspect ratio through silicon via running through the at least one surface. Each through silicon via is fabricated from at least one etch step and includes: at least one thermal oxide dielectric for coating at least some of a sidewall of the through silicon via for a later etch stop in fabrication of the through silicon via.
摘要翻译： 半导体结构包括：至少一个硅表面，其中该表面可以是衬底，晶片或其它器件。 该结构还包括形成在至少一个表面的每一侧上的至少一个电子电路; 以及通过硅穿过所述至少一个表面的至少一个导电高宽比。 每个通过硅通孔由至少一个蚀刻步骤制造，并且包括：至少一个热氧化物电介质，用于涂覆通孔硅通孔的侧壁中的至少一些，用于随后的通孔硅制造中的蚀刻停止。
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