公开(公告)号：US09179586B2

公开(公告)日：2015-11-03

申请号：US13702173

申请日：2011-07-05

申请人： Jean Brun

发明人： Jean Brun

IPC分类号： H05K3/30 ,  H05K13/04 ,  H01L23/498 ,  H01L23/00 ,  H05K1/18 ,  H01L23/13 ,  H01L23/538 ,  H01L25/065 ,  H01L25/00 ,  H05K1/02 ,  H05K1/03

CPC分类号： H05K13/046 ,  H01L23/13 ,  H01L23/4985 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/08238 ,  H01L2224/1134 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32237 ,  H01L2224/32238 ,  H01L2224/73204 ,  H01L2224/80006 ,  H01L2224/80007 ,  H01L2224/80201 ,  H01L2224/80903 ,  H01L2224/81005 ,  H01L2224/81007 ,  H01L2224/81191 ,  H01L2224/81201 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/81903 ,  H01L2224/83005 ,  H01L2224/83007 ,  H01L2224/83192 ,  H01L2224/83201 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2224/90 ,  H01L2224/9211 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/0665 ,  H01L2924/12041 ,  H01L2924/12042 ,  H05K1/0281 ,  H05K1/038 ,  H05K1/189 ,  H05K2201/10545 ,  H05K2201/10674 ,  H05K2203/0108 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/05552

摘要： A substrate provided with an electrically conducting wire coated with an electrically insulating material is impregnated with a polymerizable material. A reception area for a chip is formed on a surface of the substrate by means of deformation. The housing area is stiffened using the polymerizable material. The chip is disposed in the reception area and an electrical connection area of the chip is connected electrically to the electrically conducting wire of the substrate.

摘要翻译： 设置有涂覆有电绝缘材料的导电线的基板用可聚合材料浸渍。 通过变形在基板的表面上形成用于芯片的接收区域。 使用可聚合材料使住房区域变硬。 芯片设置在接收区域中，并且芯片的电连接区域电连接到基板的导电线。

公开(公告)号：US08445328B2

公开(公告)日：2013-05-21

申请号：US13229021

申请日：2011-09-09

申请人： Jean Brun ,  Régis Taillefer

发明人： Jean Brun ,  Régis Taillefer

IPC分类号： H01L21/00 ,  H01L23/02 ,  H01L23/52

CPC分类号： H01L24/97 ,  H01L23/147 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/15192 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/19107 ,  H01L2924/3641 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2224/0401

摘要： The invention relates to a method for producing chip elements provided with a groove, comprising the following steps: on an interconnect substrate, providing a conductive track arranged to connect a contact area of an active surface of a chip to an area corresponding to a first wall of the groove; growing a contact bump by electrodeposition on the conductive track at the level of the area corresponding to the first wall of the groove; assembling the chip on the substrate via its active surface so that a side wall of the chip forms the bottom of the groove; machining the chip via its rear surface in parallel to the substrate while measuring the distance between the rear surface of the chip and the contact bump; stopping machining when the measured distance reaches a required value; and assembling by bonding a plate to the rear surface of the chip so as to form a second wall of the groove.

摘要翻译： 本发明涉及一种用于制造设置有凹槽的芯片元件的方法，包括以下步骤：在互连基板上，提供导电轨道，其布置成将芯片的有效表面的接触区域连接到对应于第一壁的区域 的凹槽; 通过在对应于槽的第一壁的区域的电平处的导电轨道上电沉积生长接触凸块; 通过其有源表面将芯片组装在基板上，使得芯片的侧壁形成凹槽的底部; 在测量芯片的后表面与接触凸块之间的距离的同时，通过其背面与基板平行地加工芯片; 当测量距离达到所需值时停止加工; 以及通过将板接合到所述芯片的后表面以便形成所述凹槽的第二壁而进行组装。

公开(公告)号：US20110114377A1

公开(公告)日：2011-05-19

申请号：US12737060

申请日：2009-06-02

申请人： Jean Brun

发明人： Jean Brun

IPC分类号： H05K1/18 ,  H01R43/00

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/12 ,  H01L24/90 ,  H01L25/50 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01063 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/18161 ,  Y10T29/49117 ,  H01L2924/00 ,  H01L2224/05599

摘要： This invention relates to a stacked electronic device composed of stacked electronic components (120, 130) distributed on one or several added-on levels (N2, N3) each added on the preceding level starting from a base level (N1) possibly containing at least one electronic component (110). At least one electrolytic connection pad of a first type (10.1) on an add-on level (N2) directly connects a conducting element (c1) placed on one face of an electronic component (120) on an add-on level (N2) to a conducting element (z1) placed on an opposite face of a neighbouring level (N1) while at least one electrolytic connection pad of a second type (20.1) on the add-on level (N2) passes through a coating layer (220) coating the sides of the electronic component (120) on the add-on level (N2) and directly electrically connects two conducting elements (z1, z2) located on each side of said coating layer (220).

摘要翻译： 本发明涉及一种层叠的电子设备，其由堆叠的电子元件（120,130）组成，分布在一个或多个附加电平（N 2，N 3）上，每个级别（N2，N3）从基本级别（N1） 一个电子部件（110）。 在附加级（N2）上的第一类型（10.1）的至少一个电解连接焊盘直接连接放置在附加层（N2）上的电子部件（120）的一个面上的导电元件（c1） （N2）上的第二类型（20.1）的至少一个电解连接垫穿过涂层（220），所述导电元件（z1）放置在相邻电平（N1）的相对表面上， 在所述附加层（N2）上涂覆所述电子部件（120）的侧面并且直接电连接位于所述涂层（220）的每一侧上的两个导电元件（z1，z2）。

公开(公告)号：US07563703B2

公开(公告)日：2009-07-21

申请号：US10590412

申请日：2005-02-24

申请人： Jean Brun ,  Remi Franiatte ,  Christiane Puget

发明人： Jean Brun ,  Remi Franiatte ,  Christiane Puget

IPC分类号： H01L21/445

CPC分类号： H01L24/12 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/48463 ,  H01L2224/83192 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00

摘要： A method producing conductive rods localized on conductive blocks of an electronic component.

摘要翻译： 一种制造定位在电子部件的导电块上的导电棒的方法。

公开(公告)号：US07235112B2

公开(公告)日：2007-06-26

申请号：US10250903

申请日：2002-10-21

申请人： Raphaël Salot ,  Sébastien Martinet ,  Jean Brun ,  Gilles Poupon

发明人： Raphaël Salot ,  Sébastien Martinet ,  Jean Brun ,  Gilles Poupon

IPC分类号： H01M4/82 ,  B05D1/28 ,  B23K31/02

CPC分类号： H01M10/0436 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01M2/1066 ,  H01M2/20 ,  H01M4/04 ,  H01M4/64 ,  H01M6/181 ,  H01M6/188 ,  H01M6/40 ,  H01M10/0472 ,  Y10S228/901 ,  Y10T29/49108 ,  Y10T29/49112 ,  Y10T29/49115 ,  H01L2924/00014

摘要： The electrodes are formed by surface coating and cold compression on metal strips. They are then assembled, by hot pressing, with an electrolytic membrane. The metal strips are then removed, preferably by mechanical detachment. Current collectors are then formed on each of the electrodes by PVD type techniques that are conventional in microelectronics. The resulting thin micro-battery with high surface capacity can then be integrated in an integrated circuit, in particular by bonding by means of indium connecting balls.

摘要翻译： 电极通过金属条上的表面涂覆和冷压缩形成。 然后通过热压将其与电解质膜组装。 然后移除金属条，优选通过机械拆卸。 然后通过微电子学中常规的PVD型技术在每个电极上形成集电器。 因此，所得到的具有高表面积的薄电池可以集成在集成电路中，特别是通过铟连接球的结合。

公开(公告)号：US20060160270A1

公开(公告)日：2006-07-20

申请号：US10563627

申请日：2004-07-15

申请人： Jean Brun ,  Christiane Puget

发明人： Jean Brun ,  Christiane Puget

IPC分类号： H01L21/48

CPC分类号： H01L24/11 ,  H01L21/6835 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/83101 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/30107

摘要： This invention relates to a process for manufacturing an anisotropic conducting film comprising a layer of electrically insulating material and conducting through inserts, the said process comprising the following steps: a) formation on a substrate of at least one layer of material with through holes, the said layer being called the perforated layer, b) filling of the through holes to form conducting inserts. The process also comprises production of a mask partially covering a first end of the conducting inserts and etching of the unmasked part of the ends of the conducting inserts so as to obtain conducting inserts with pointed ends. The invention is applicable to the formation of components (chips, integrated circuits) with a high interconnections density.

摘要翻译： 本发明涉及一种用于制造各向异性导电膜的方法，该方法包括电绝缘材料层并通过插入件导电，所述方法包括以下步骤：a）在具有通孔的至少一层材料的基底上形成， 所述层称为穿孔层，b）填充通孔以形成导电插入物。 该方法还包括制造部分地覆盖导电插入件的第一端的掩模和蚀刻导电插入件的未端部的端部，以获得具有尖端的导电插入件。 本发明适用于具有高互连密度的部件（芯片，集成电路）的形成。

公开(公告)号：US10264682B2

公开(公告)日：2019-04-16

申请号：US14235358

申请日：2012-04-24

申请人： Jean Brun ,  Delphine Christophe ,  Lionel Tenchine

发明人： Jean Brun ,  Delphine Christophe ,  Lionel Tenchine

IPC分类号： F21V19/00 ,  H05K1/02 ,  H05K3/00 ,  H01L23/498 ,  H05K1/03 ,  H05K1/18 ,  H05K3/30 ,  H05K3/32

摘要： The method for assembling a microelectronic chip device (101) in a fabric (104) comprises the following steps: providing a microelectronic chip device (101) comprising a base (102) and a protruding element (103) rising from a face of the base (102), said protruding element (103) comprising a free end opposite the base (102); inserting into the fabric (104) the chip device (101) by the free end of the protruding element; deforming the protruding element (105) at its free end so as to ensure the securing of the chip device (101) with the fabric (104) by forming a crimping bead (106).

公开(公告)号：US08112882B2

公开(公告)日：2012-02-14

申请号：US12285623

申请日：2008-10-09

申请人： Xavier Baillin ,  Jean Brun ,  Thierry Enot ,  David Henry

发明人： Xavier Baillin ,  Jean Brun ,  Thierry Enot ,  David Henry

IPC分类号： H05K3/30

CPC分类号： B81C1/00269 ,  B81B2203/0315 ,  B81C2203/0118 ,  B81C2203/019 ,  H01L23/10 ,  H01L2924/0002 ,  Y10T29/49002 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49171 ,  Y10T29/49181 ,  Y10T29/49218 ,  H01L2924/00

摘要： A method for producing a structure includes bonding two substrates facing one another by crushing a closed peripheral sealing strip located between the two substrates, the closed peripheral sealing strip delineating a closed cavity between the substrates. A microsystem is disposed on one of the substrates within the closed cavity. Before crushing, the sealing strip includes perforated patterns delineating a plurality of voids inside the strip.

摘要翻译： 一种用于制造结构的方法包括通过破碎位于两个基板之间的封闭的外围密封条来封闭彼此面对的两个基板，封闭的外围密封条描绘出基板之间的封闭空腔。 微系统设置在闭合腔内的一个衬底上。 在破碎之前，密封条包括描绘带内的多个空隙的穿孔图案。

公开(公告)号：US07510962B2

公开(公告)日：2009-03-31

申请号：US10563627

申请日：2004-07-15

申请人： Jean Brun ,  Christiane Puget

发明人： Jean Brun ,  Christiane Puget

IPC分类号： H01L21/4763

CPC分类号： H01L24/11 ,  H01L21/6835 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/83101 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/30107

摘要： This invention relates to a process for manufacturing an anisotropic conducting film comprising a layer of electrically insulating material and conducting through inserts, the process including the following steps: a) formation on a substrate of at least one layer of material with through holes, the layer being called the perforated layer, b) filling of the through holes to form conducting inserts. The process also includes production of a mask partially covering a first end of the conducting inserts and etching of the unmasked part of the ends of the conducting inserts so as to obtain conducting inserts with pointed ends. The invention is applicable to the formation of components (chips, integrated circuits) with a high interconnections density.

摘要翻译： 本发明涉及一种用于制造各向异性导电膜的方法，该方法包括一层电绝缘材料并穿过插入件，该方法包括以下步骤：a）在至少一层具有通孔的材料层的基底上形成，该层 称为穿孔层，b）填充通孔以形成导电插入件。 该方法还包括制造部分地覆盖导电插入件的第一端的掩模和蚀刻导电插入件的未端部的端部，以获得具有尖端的导电插入件。 本发明适用于具有高互连密度的部件（芯片，集成电路）的形成。

公开(公告)号：US20070166978A1

公开(公告)日：2007-07-19

申请号：US10590412

申请日：2005-02-24

申请人： Jean Brun ,  Remi Franiatte ,  Christiane Puget

发明人： Jean Brun ,  Remi Franiatte ,  Christiane Puget

IPC分类号： H01L21/44

CPC分类号： H01L24/12 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/48463 ,  H01L2224/83192 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00

摘要： A method producing conductive rods localized on conductive blocks of an electronic component.

摘要翻译： 一种制造定位在电子部件的导电块上的导电棒的方法。