公开(公告)号：USD368797S

公开(公告)日：1996-04-16

申请号：US35563

申请日：1995-03-02

申请人： Mike Brooks ,  Edgar H. Simpson ,  Theodore A. Kastner ,  Diana A. Wurfbain

设计人： Mike Brooks ,  Edgar H. Simpson ,  Theodore A. Kastner ,  Diana A. Wurfbain

公开(公告)号：US07600314B2

公开(公告)日：2009-10-13

申请号：US11218995

申请日：2005-09-01

申请人： Larry Kinsman ,  Mike Brooks ,  Warren M. Farnworth ,  Walter Moden ,  Terry Lee

发明人： Larry Kinsman ,  Mike Brooks ,  Warren M. Farnworth ,  Walter Moden ,  Terry Lee

IPC分类号： H01R9/00 ,  H05K3/00

CPC分类号： H05K7/1415 ,  B25B27/00 ,  H05K3/301 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49153 ,  Y10T29/49169 ,  Y10T29/49208 ,  Y10T29/49222 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  Y10T29/53191 ,  Y10T29/53209 ,  Y10T29/53257 ,  Y10T29/53261 ,  Y10T29/53265

摘要： A technique is provided for installing circuit components, such as memory devices, in a support, such as a socket. The device to be installed is supported in a holder or shell. The holder is positioned over a support region in the receiving socket. A manual actuator is pressed into the holder to eject the device from the holder and to install the device in the support. The holder may be configured to hold a single device, or multiple devices aligned in slots defined by partitions. A multi-device tray may be provided for indexing devices toward an ejection slot, through which the devices are installed by manual actuation of an ejecting actuator. The technique provides protection for the device prior to and during installation, and facilitates manual installation of such devices without requiring direct hand contact with the device either prior to or during installation.

摘要翻译： 提供了一种技术，用于将诸如存储设备的电路组件安装在诸如插座的支撑件中。 要安装的设备支撑在支架或外壳中。 保持器定位在接收插座中的支撑区域上方。 将手动执行器压入保持器中以将装置从保持器中排出并将装置安装在支撑件中。 保持器可以被配置为保持单个设备，或者多个设备在由分区定义的槽中对齐。 可以提供多装置托盘用于将装置向分度装置移动到排出槽，通过这些装置通过手动驱动排放致动器来安装装置。 该技术在安装之前和安装期间为设备提供保护，并且便于手动安装这些设备，而不需要在安装之前或安装期间直接与设备接触。

公开(公告)号：US20060048382A1

公开(公告)日：2006-03-09

申请号：US11218995

申请日：2005-09-01

申请人： Larry Kinsman ,  Mike Brooks ,  Warren Farnworth ,  Walter Moden ,  Terry Lee

发明人： Larry Kinsman ,  Mike Brooks ,  Warren Farnworth ,  Walter Moden ,  Terry Lee

IPC分类号： H01R43/20

CPC分类号： H05K7/1415 ,  B25B27/00 ,  H05K3/301 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49153 ,  Y10T29/49169 ,  Y10T29/49208 ,  Y10T29/49222 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  Y10T29/53191 ,  Y10T29/53209 ,  Y10T29/53257 ,  Y10T29/53261 ,  Y10T29/53265

摘要： A technique is provided for installing circuit components, such as memory devices, in a support, such as a socket. The device to be installed is supported in a holder or shell. The holder is positioned over a support region in the receiving socket. A manual actuator is pressed into the holder to eject the device from the holder and to install the device in the support. The holder may be configured to hold a single device, or multiple devices aligned in slots defined by partitions. A multi-device tray may be provided for indexing devices toward an ejection slot, through which the devices are installed by manual actuation of an ejecting actuator. The technique provides protection for the device prior to and during installation, and facilitates manual installation of such devices without requiring direct hand contact with the device either prior to or during installation.

摘要翻译： 提供了一种技术，用于将诸如存储设备的电路组件安装在诸如插座的支撑件中。 要安装的设备支撑在支架或外壳中。 保持器定位在接收插座中的支撑区域上方。 将手动执行器压入保持器中以将装置从保持器中排出并将装置安装在支撑件中。 保持器可以被配置为保持单个设备，或者多个设备在由分区定义的槽中对齐。 可以提供多装置托盘用于将装置向分度装置移动到排出槽，通过这些装置通过手动驱动排放致动器来安装装置。 该技术在安装之前和安装期间为设备提供保护，并且便于手动安装这些设备，而不需要在安装之前或安装期间直接与设备接触。

公开(公告)号：US20050189623A1

公开(公告)日：2005-09-01

申请号：US11120941

申请日：2005-05-03

申请人： Salman Akram ,  Mike Brooks

发明人： Salman Akram ,  Mike Brooks

IPC分类号： H01L23/13 ,  H01L25/065 ,  H01L23/552

CPC分类号： H01L23/13 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A computer system, a printed circuit board assembly, and a multiple die semiconductor assembly are provided comprising first and second semiconductor dies and an intermediate substrate. The first semiconductor die defines a first active surface including at least one conductive bond pad. The second semiconductor die defines a second active surface including at least one conductive bond pad. The intermediate substrate is positioned between the first active surface of the first semiconductor die and the second active surface of the second semiconductor die such that a first surface of the intermediate substrate faces the first active surface and such that a second surface of the intermediate substrate faces the second active surface. The first semiconductor die is electrically coupled to the intermediate substrate by at least one topographic contact extending from the first active surface to the first surface of the intermediate substrate. The intermediate substrate defines a passage there through. The second semiconductor die is secured to the second surface of the intermediate substrate such that the conductive bond pad of the second semiconductor die is aligned with the passage. The second semiconductor die is electrically coupled to the intermediate substrate by at least one conductive line extending from the conductive bond pad of the second semiconductor die through the passage defined in the intermediate substrate and to a conductive contact on the first surface of the intermediate substrate.

摘要翻译： 提供了包括第一和第二半导体管芯和中间衬底的计算机系统，印刷电路板组件和多芯片半导体组件。 第一半导体管芯限定包括至少一个导电接合焊盘的第一有源表面。 第二半导体管芯限定包括至少一个导电接合焊盘的第二有源表面。 中间衬底位于第一半导体管芯的第一有源表面和第二半导体管芯的第二有源表面之间，使得中间衬底的第一表面面向第一有源表面，并且使得中间衬底的第二表面面向 第二活跃表面。 第一半导体管芯通过从第一有源表面延伸到中间衬底的第一表面的至少一个地形接触电耦合到中间衬底。 中间衬底在其中限定通道。 第二半导体管芯被固定到中间基板的第二表面，使得第二半导体管芯的导电接合焊盘与通道对准。 第二半导体管芯通过至少一个导电线电连接到中间衬底，该导线从第二半导体管芯的导电接合焊盘延伸通过限定在中间衬底中的通道和中间衬底的第一表面上的导电接触。

公开(公告)号：US20050156297A1

公开(公告)日：2005-07-21

申请号：US11040555

申请日：2005-01-21

申请人： Warren Farnworth ,  Alan Wood ,  Mike Brooks

发明人： Warren Farnworth ,  Alan Wood ,  Mike Brooks

IPC分类号： H01L23/498 ,  H01L21/44 ,  H01L23/02 ,  H01L23/495 ,  H01L29/40

CPC分类号： H01L23/49827 ,  H01L23/4985 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02333 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48465 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： A chip scale semiconductor package and a method for fabricating the package are provided. The package includes a semiconductor die and a flex circuit bonded to the face of the die. The flex circuit includes a polymer substrate with a dense array of external contacts, and a pattern of conductors in electrical communication with the external contacts. The package also includes interconnects configured to provide separate electrical paths between die contacts (e.g., bond pads), and the conductors on the flex circuit. Several different embodiments of interconnects are provided including: bumps on the die contacts, bonded to the flex circuit conductors with a conductive adhesive layer; polymer bumps on the conductors, or die contacts, applied in a semi-cured state and then fully cured; solder bumps on the die contacts and conductors, bonded to one another using a bonding tool; rivet-like bonded connections between the conductors and die contacts, formed using metal bumps and a wire bonding or ball bonding apparatus; single point bonded connections between the conductors and die contacts, formed with a bonding tool; and wire bonds between the conductors and die contacts.

摘要翻译： 提供了一种芯片级半导体封装和一种制造该封装的方法。 该封装包括半导体管芯和连接到管芯的表面的柔性电路。 柔性电路包括具有密集阵列的外部触点的聚合物基板和与外部触点电连通的导体图案。 封装还包括被配置为在管芯触头（例如，焊盘）之间提供分开的电路径的互连件以及柔性电路上的导体。 提供了互连的几个不同实施例，包括：在裸片上的凸起接触，用导电粘合剂层结合到柔性电路导体上; 导体上的聚合物凸块或模具接触件以半固化状态施加，然后完全固化; 使用焊接工具彼此接合的管芯触点和导体上的焊料凸块; 使用金属凸块和引线接合或球焊接装置形成的导体和裸片接触之间的铆钉状接合连接; 导体和裸片接点之间的单点接合连接，用接合工具形成; 以及导体和裸片接触之间的引线键合。

公开(公告)号：US06740960B1

公开(公告)日：2004-05-25

申请号：US10231752

申请日：2002-08-29

申请人： Warren M. Farnworth ,  Alan G. Wood ,  Mike Brooks

发明人： Warren M. Farnworth ,  Alan G. Wood ,  Mike Brooks

IPC分类号： H01L23495

CPC分类号： H01L23/49827 ,  H01L23/4985 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02333 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48465 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： A chip scale semiconductor package and a method for fabricating the package are provided. The package includes a semiconductor die and a flex circuit bonded to the face of the die. The flex circuit includes a polymer substrate with a dense array of external contacts, and a pattern of conductors in electrical communication with the external contacts. The package also includes interconnects configured to provide separate electrical paths between die contacts (e.g., bond pads), and the conductors on the flex circuit. Several different embodiments of interconnects are provided including: bumps on the die contacts, bonded to the flex circuit conductors with a conductive adhesive layer; polymer bumps on the conductors, or die contacts, applied in a semi-cured state and then fully cured; solder bumps on the die contacts and conductors, bonded to one another using a bonding tool; rivet-like bonded connections between the conductors and die contacts, formed using metal bumps and a wire bonding or ball bonding apparatus; single point bonded connections between the conductors and die contacts, formed with a bonding tool; and wire bonds between the conductors and die contacts.

摘要翻译： 提供了一种芯片级半导体封装和一种制造该封装的方法。 该封装包括半导体管芯和连接到管芯的表面的柔性电路。 柔性电路包括具有密集阵列的外部触点的聚合物基板和与外部触点电连通的导体图案。 封装还包括被配置为在管芯触头（例如，焊盘）之间提供分开的电路径的互连件以及柔性电路上的导体。 提供了互连的几个不同实施例，包括：在裸片上的凸起接触，用导电粘合剂层粘合到柔性电路导体上; 导体上的聚合物凸块或模具接触件以半固化状态施加，然后完全固化; 使用焊接工具彼此接合的管芯触点和导体上的焊料凸块; 使用金属凸块和引线接合或球焊接装置形成的导体和裸片接触之间的铆钉状接合连接; 导体和裸片接点之间的单点接合连接，用接合工具形成; 以及导体和裸片接触之间的引线键合。

公开(公告)号：US06740546B2

公开(公告)日：2004-05-25

申请号：US10225575

申请日：2002-08-21

申请人： David J. Corisis ,  Mike Brooks

发明人： David J. Corisis ,  Mike Brooks

IPC分类号： H01L2144

CPC分类号： H01L23/4951 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices and methods for assembling microelectronic devices are disclosed herein. In one embodiment, a method of assembling a microelectronic device having a die and an interposer substrate includes depositing a solder ball onto a ball-pad on the interposer substrate and molding a compound to form a casing around at least a portion of the die and the solder ball. The method can further include forming a first cover over a first surface of the interposer substrate with the compound and forming a second cover over a second surface opposite the first surface of the interposer substrate with the compound. The first cover can have a first volume and a first surface area and the second cover can have a second volume and a second surface area. The first and second volumes and the first and second surface areas can be at least approximately equal.

公开(公告)号：US06740545B2

公开(公告)日：2004-05-25

申请号：US10309643

申请日：2002-12-03

申请人： Jerrold L. King ,  J. Mike Brooks ,  Walter L. Moden

发明人： Jerrold L. King ,  J. Mike Brooks ,  Walter L. Moden

IPC分类号： H01L2144

CPC分类号： H01L23/3142 ,  H01L23/4951 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10S438/926 ,  Y10S438/928 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A semiconductor die includes a metal layer deposited thereon for enhancing adhesion between the die and a mold compound package. The metal layer is substantially oxide free. The die is coated with a layer or layers of copper (Cu) and/or palladium (Pd) by electroplating or electroless coating techniques. The metal layer provides a uniform wetting surface for better adhesion of the die with the mold compound packaging during encapsulation. The increased adhesion reduces the delamination potential of the die from the package.

摘要翻译： 半导体管芯包括沉积在其上的金属层，用于增强管芯和模具复合封装之间的附着力。 金属层基本上不含氧化物。 通过电镀或无电涂覆技术将模具涂覆有一层或多层铜（Cu）和/或钯（Pd）。 金属层提供均匀的润湿表面，用于在包封期间模具与模具复合包装的更好的附着。 增加的粘附力降低了模具从包装中的分层势。

公开(公告)号：US06614104B2

公开(公告)日：2003-09-02

申请号：US10264047

申请日：2002-10-04

申请人： Warren M. Farnworth ,  Alan G. Wood ,  Mike Brooks

发明人： Warren M. Farnworth ,  Alan G. Wood ,  Mike Brooks

IPC分类号： H01L2302

CPC分类号： H01L24/06 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package includes a substrate and a semiconductor die wire bonded, or alternately flip chip bonded, to the substrate. The substrate includes three separate layers including a conductive layer having a pattern of conductive traces, a first insulating layer covering the conductive traces, and a second insulating layer covering the die. The insulating layers also include planar surfaces having external contacts, and conductive vias in electrical communication with the external contacts and with the conductive traces. The external contacts have matching patterns, such that the package can be stacked on a substantially identical package to form a stacked electronic assembly. In addition, the packages in the stacked assembly can have different circuit configurations, and can perform different functions in the assembly. A method for fabricating the package includes the steps of providing the conductive layer having the conductive traces, attaching the die to the conductive traces, forming the first insulating layer on the conductive layer, forming the second insulating layer on the die, forming the conductive vias through the insulating layers, and then forming the external contacts on the planar surfaces of the insulating layers.

摘要翻译： 半导体封装包括基板和半导体芯片引线，该半导体芯片引线与基板接合或交替地倒装芯片接合。 衬底包括三个分开的层，包括具有导电迹线图案的导电层，覆盖导电迹线的第一绝缘层和覆盖管芯的第二绝缘层。 绝缘层还包括具有外部触点的平面表面，以及与外部触点和导电迹线电连通的导电通孔。 外部触点具有匹配的图案，使得封装可以堆叠在基本相同的封装上以形成堆叠的电子组件。 此外，堆叠组件中的封装可以具有不同的电路配置，并且可以在组件中执行不同的功能。 制造封装的方法包括以下步骤：提供具有导电迹线的导电层，将裸片附着到导电迹线上，在导电层上形成第一绝缘层，在裸片上形成第二绝缘层，形成导电通孔 通过绝缘层，然后在绝缘层的平坦表面上形成外部接触。

公开(公告)号：US06579746B2

公开(公告)日：2003-06-17

申请号：US09932080

申请日：2001-08-17

申请人： Aaron Schoenfeld ,  Manny K. F. Ma ,  Larry D. Kinsman ,  J. Mike Brooks ,  Timothy J. Allen

发明人： Aaron Schoenfeld ,  Manny K. F. Ma ,  Larry D. Kinsman ,  J. Mike Brooks ,  Timothy J. Allen

IPC分类号： H01L2144

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49838 ,  H01L23/642 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method and apparatus for coupling a semiconductor die to terminals of a die package in which the die is housed. The apparatus comprises a die having first and second terminals. A first conductive member is elongated between a first end portion and a second end portion thereof such that the second end portion is proximate to the first terminal. A second conductive member is elongated between a first end portion and second end portion thereof such that the second end portion of the second conductive member is proximate to the second terminal of the die and the second conductive member is generally parallel to the first conductive member. The second end portions of the first and second conductive members may be coupled with conductive couplers to the first and second die terminals, respectively. The conductive members and conductive couplers may be sized and shaped to produce a selected capacitance and/or a selected impedance at the die terminals. The first and second conductive members may each have an intermediate portion between the first and second end portions thereof that is narrower than the second end portions thereof, and the conductive members may be staggered by axially offsetting the second end portion of the second conductive member from the second end portion of the first conductive member.