公开(公告)号：US11769685B2

公开(公告)日：2023-09-26

申请号：US17520599

申请日：2021-11-05

Applicant: Innolux Corporation

Inventor： Cheng-Chi Wang ,  Wen-Hsiang Liao ,  Yeong-E Chen ,  Hung-Sheng Chou ,  Cheng-En Cheng

IPC: H01L21/683 ,  H01L21/48

CPC classification number: H01L21/6836 ,  H01L21/4853 ,  H01L2221/68354 ,  H01L2221/68363

Abstract: A manufacturing method of a semiconductor package is provided. The manufacturing method includes the following. A plurality of semiconductor components are provided. Each semiconductor component has at least one conductive bump. A substrate is provided. The substrate has a plurality of conductive pads. A transfer device is provided. The transfer device transfers the semiconductor components onto the substrate. A heating device is provided. The heating device heats or pressurizes at least two semiconductor components. During transferring of the semiconductor components to the substrate, the at least one conductive bump of each semiconductor component is docked to a corresponding one of the conductive pads.

公开(公告)号：US11764077B2

公开(公告)日：2023-09-19

申请号：US17524713

申请日：2021-11-11

Applicant: Innolux Corporation

Inventor： Chuan-Ming Yeh ,  Heng-Shen Yeh ,  Kuo-Jung Fan ,  Cheng-Chi Wang

IPC: H05K3/00 ,  H05K3/46 ,  H01L21/48 ,  H01L23/498 ,  H05K1/02 ,  H01L23/00

CPC classification number: H01L21/4857 ,  H01L23/49822 ,  H01L23/562 ,  H05K1/0271 ,  H05K3/007 ,  H05K3/4647 ,  H05K2201/068

Abstract: The embodiment of the disclosure provides a composite layer circuit element and a manufacturing method thereof. The manufacturing method of the composite layer circuit element includes the following. A carrier is provided. A first dielectric layer is formed on the carrier, and the first dielectric layer is patterned. The carrier on which the first dielectric layer is formed is disposed on a first curved-surface mold, and the first dielectric layer is cured. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer is patterned. The carrier on which the first dielectric layer and the second dielectric layer are formed is disposed on a second curved-surface mold, and the second dielectric layer is cured. A thickness of a projection of the first curved-surface mold is smaller than a thickness of a projection of the second curved-surface mold.

公开(公告)号：US11721560B2

公开(公告)日：2023-08-08

申请号：US17402595

申请日：2021-08-15

Applicant: InnoLux Corporation

Inventor： Chia-Chieh Fan ,  Chin-Lung Ting ,  Cheng-Chi Wang ,  Ming-Tsang Wu

IPC: H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L25/00 ,  H01L21/683 ,  H01L23/31 ,  H01L25/10

CPC classification number: H01L21/568 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L24/97 ,  H01L25/50 ,  H01L23/3128 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/12105 ,  H01L2224/95001 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/18162 ,  H01L2924/3511

Abstract: A manufacturing method of semiconductor device includes providing a substrate, forming a sacrificial layer on the substrate, forming a resin layer on the sacrificial layer, disposing first chips on the sacrificial layer, and forming a first dielectric layer having trenches and surrounding the first chips, wherein an upper surface of the first dielectric layer and an upper surface of the resin layer are at a same plane.

公开(公告)号：US20230129218A1

公开(公告)日：2023-04-27

申请号：US17746987

申请日：2022-05-18

Applicant: Innolux Corporation

Inventor： Chin-Lung Ting ,  Ker-Yih Kao ,  Cheng-Chi Wang ,  Kuang-Ming Fan ,  Chun-Hung Chen ,  Wen-Hsiang Liao ,  Ming-Hsien Shih

IPC: H01L23/00

Abstract: An electronic device including a connection element is provided. The connection element includes a first insulation layer and a second insulation layer. The first insulation layer has a first opening. A sidewall of the first insulation layer at the first opening has roughness different from roughness of a top surface of the first insulation layer. The second insulation layer is disposed on the first insulation layer, and the second insulation layer has a second opening. The sidewall of the first insulation layer at the first opening is exposed by the second opening. A method of fabricating an electronic device is also provided.

公开(公告)号：US20230090376A1

公开(公告)日：2023-03-23

申请号：US17523895

申请日：2021-11-10

Applicant: Innolux Corporation

Inventor： Yeong-E Chen ,  Yi-Hung Lin ,  Cheng-En Cheng ,  Wen-Hsiang Liao ,  Cheng-Chi Wang

IPC: H01L23/498 ,  H01L21/48

Abstract: An electronic component and a manufacturing method thereof are provided. The electronic component includes a structure member and a connecting member. The structure member includes at least one working unit. The at least one working unit is disposed in a first region. The connecting member is disposed on the structure member and includes a second region. The second region is overlapped with the first region, and a metal density of the second region is less than a metal density of the first region. The electronic component and the manufacturing method thereof of the embodiment of the disclosure include the effect of improving the reliability or quality of the electronic component.

公开(公告)号：US11127604B2

公开(公告)日：2021-09-21

申请号：US16211194

申请日：2018-12-05

Applicant: InnoLux Corporation

Inventor： Chia-Chieh Fan ,  Chin-Lung Ting ,  Cheng-Chi Wang ,  Ming-Tsang Wu

IPC: H01L21/56 ,  H01L21/48 ,  H01L25/00 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

Abstract: A manufacturing method of semiconductor device includes providing a substrate, forming a sacrificial layer on the substrate, disposing first chips on the sacrificial layer, forming a first dielectric layer surrounding the first chips, forming trenches in the first dielectric layer, and forming a second dielectric layer in the trenches, wherein an upper surface of the first dielectric layer and an upper surface of the second dielectric layer are at a same plane.

公开(公告)号：US11075155B2

公开(公告)日：2021-07-27

申请号：US16655201

申请日：2019-10-16

Applicant: InnoLux Corporation

Inventor： Hsueh-Hsuan Chou ,  Chia-Chieh Fan ,  Cheng-Chi Wang ,  Kuan-Jen Wang

IPC: H01L21/66 ,  H01L23/498 ,  H01L21/48 ,  H01L21/683 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31

Abstract: A package structure includes a redistribution layer having a first surface, a second surface disposed opposite to the first surface, and at least one sidewall connected to the first surface and the second surface, at least one bonding electrode disposed on the first surface of the redistribution layer, and a mounting layer disposed on the second surface of the redistribution layer. The mounting layer includes a plurality of conductive pads that are spaced apart from each other. At least one of the conductive pads is exposed by the sidewall of the redistribution layer.

公开(公告)号：US10720708B2

公开(公告)日：2020-07-21

申请号：US15657345

申请日：2017-07-24

Applicant: InnoLux Corporation

Inventor： Huei-Ying Chen ,  I-Yin Li ,  Chia-Chi Ho ,  Hsu-Kuan Hsu ,  Ker-Yih Kao ,  Chung-Kuang Wei ,  Chin-Lung Ting ,  Cheng-Chi Wang ,  Chien-Hsing Lee

IPC: H01Q9/06 ,  H01Q1/38 ,  H01Q9/04 ,  G06F1/16 ,  H01L21/762 ,  H04B7/155

Abstract: An antenna device includes a first dielectric substrate, a first radiator disposed on the first dielectric substrate, a second dielectric substrate disposed on the first radiator, a second radiator disposed between the first dielectric substrate and the second dielectric substrate, a main radiator, disposed on the second dielectric substrate, and a modulation structure located between a first radiation portion of the first radiator and a second radiation portion of the second radiator. The first radiation portion, the modulation structure, and the second radiation portion are located in a central area.

公开(公告)号：US20180190579A1

公开(公告)日：2018-07-05

申请号：US15854728

申请日：2017-12-26

Applicant: InnoLux Corporation

Inventor： Hsueh-Hsuan Chou ,  Chia-Chieh Fan ,  Cheng-Chi Wang ,  Kuan-Jen Wang

IPC: H01L23/498 ,  H01L21/66 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L22/14 ,  H01L22/32 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/16502 ,  H01L2224/80411 ,  H01L2224/80444 ,  H01L2224/80455 ,  H01L2224/81005 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81805 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/37001 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/013

Abstract: A package structure includes a redistribution layer, at least one bonding electrode, and a mounting layer. The redistribution layer has a first surface, a second surface disposed opposite to the first surface, and at least one sidewall connected to the first surface and the second surface. The bonding electrode is disposed on the first surface of the redistribution layer. The mounting layer is disposed on the second surface of the redistribution layer. The mounting layer includes a plurality of conductive pads spaced apart from each other, wherein at least one of the conductive pads is exposed by the sidewall of the redistribution layer.