DRAM stacked package, DIMM, and semiconductor manufacturing method

    公开(公告)号:US20060239055A1

    公开(公告)日:2006-10-26

    申请号:US11378368

    申请日:2006-03-20

    IPC分类号: G11C5/02

    摘要: The present invention relates to a DRAM stacked packages, a DIMM, a method for testing them, and a semiconductor manufacturing method. According to the present invention, there is provided a DRAM stacked package comprising: a plurality of stacked DRAMs; external terminals to which test equipment is connected, said external terminals being used to input/output at least address, command, and data; and an interface chip provided between said plurality of stacked DRAMs and said external terminals. The plurality of DRAMs and the interface chip are implemented on a package. The interface chip comprises: a test circuit including: an algorithmic pattern generator for generating a test pattern used to test the plurality of DRAMs; applying circuits for applying said generated test pattern to the plurality of DRAMs; and a comparator for comparing each response signal received from the plurality of DRAMs with an expected value for judgment.