公开(公告)号：US20100148283A1

公开(公告)日：2010-06-17

申请号：US12334514

申请日：2008-12-14

Applicant: Hui-Shen Shih

Inventor： Hui-Shen Shih

IPC: H01L31/00 ,  H01L21/4763 ,  H01L21/00

CPC classification number: H01L27/14643 ,  B81C1/00246 ,  B81C2203/0714 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/14689

Abstract: An integrated structure of MEMS device and CIS device and a fabricating method thereof includes providing a substrate having a CIS region and a MEMS region defined therein with a plurality of CIS devices positioned in the CIS region; performing a multilevel interconnect process to form a multilevel interconnect structure in the CIS region and the MEMS region and a micro-machined mesh metal in the MEMS region on a front side of the substrate; performing a first etching process to form a chamber in MEMS region in the front side of the substrate; forming a first mask pattern and a second mask pattern respectively in the CIS region and the MEMS region on a back side of the substrate; and performing a second etching process to form a plurality of vent holes connecting to the chamber on the back side of the substrate through the second mask pattern.

Abstract translation: MEMS器件和CIS器件的集成结构及其制造方法包括提供具有CIS区域和其中限定在其中定义在CIS区域中的多个CIS器件的MEMS区域的衬底; 执行多层互连处理以在所述CIS区域和所述MEMS区域中形成多层互连结构，以及在所述MEMS区域中在所述基板的前侧上形成微加工的网状金属; 执行第一蚀刻工艺以在衬底的前侧的MEMS区域中形成腔室; 在所述CIS区域和所述衬底背面的所述MEMS区域分别形成第一掩模图案和第二掩模图案; 以及进行第二蚀刻处理，以形成通过所述第二掩模图案连接到所述基板的背侧上的所述室的多个通气孔。

公开(公告)号：US20100140734A1

公开(公告)日：2010-06-10

申请号：US12707943

申请日：2010-02-18

Applicant: Akira SATO ,  Toru WATANABE ,  Shogo INABA ,  Takeshi MORI

Inventor： Akira SATO ,  Toru WATANABE ,  Shogo INABA ,  Takeshi MORI

IPC: H01L29/06

CPC classification number: B81C1/00246 ,  B81B2207/015 ,  B81B2207/07 ,  B81C2203/0136 ,  B81C2203/0714 ,  B81C2203/0735 ,  H01L21/7682 ,  H01L24/05 ,  H01L2924/14 ,  H01L2924/00

Abstract: An electronic device, including a substrate, a functional structure constituting a functional element formed on the substrate, and a cover structure forming a cavity portion in which the functional structure is disposed, is disclosed. In the electronic device, the cover structure includes a laminated structure of an interlayer insulating film and a wiring layer, the laminated structure being formed on the substrate in such a way that it surrounds the cavity portion, and the cover structure has an upside cover portion covering the cavity portion from above, the upside cover portion being formed with part of the wiring layer that is disposed above the functional structure.

Abstract translation: 公开了一种电子设备，包括基板，构成在基板上形成的功能元件的功能结构，以及形成其中设置有功能结构的空腔部分的盖结构。 在电子设备中，盖结构包括层间绝缘膜和布线层的叠层结构，层叠结构以包围空腔部分的方式形成在基板上，并且盖结构具有上侧盖部分 从上方覆盖空腔部分，上侧盖部分形成有设置在功能结构上方的布线层的一部分。

公开(公告)号：US20100120257A1

公开(公告)日：2010-05-13

申请号：US12270804

申请日：2008-11-13

Applicant: CHUAN WEI WANG ,  Sheng Ta Lee

Inventor： CHUAN WEI WANG ,  Sheng Ta Lee

IPC: H01L21/306

CPC classification number: B81C1/00246 ,  B81C2203/0714

Abstract: The present invention discloses a method for making a MEMS device, comprising: providing a zero-layer substrate; forming a MEMS device region on the substrate, wherein the MEMS device region is provided with a first sacrificial region to separate a suspension structure of the MEMS device from another part of the MEMS device; removing the first sacrificial region by etching; and micromachining the zero-layer substrate.

Abstract translation: 本发明公开了一种制造MEMS器件的方法，包括：提供零层衬底; 在所述衬底上形成MEMS器件区域，其中所述MEMS器件区域设置有第一牺牲区域以将所述MEMS器件的悬架结构与所述MEMS器件的另一部分分离; 通过蚀刻去除第一牺牲区域; 并微加工零层衬底。

公开(公告)号：US5602411A

公开(公告)日：1997-02-11

申请号：US431492

申请日：1995-04-28

Applicant: Thomas Zettler

Inventor： Thomas Zettler

IPC: G12B1/00 ,  B06B1/06 ,  B81B3/00 ,  B81C1/00 ,  G01L1/14 ,  G01P15/08 ,  G01P15/125 ,  H01L21/306 ,  H01L21/70 ,  H01L21/8234 ,  H01L27/06 ,  H01L29/84 ,  H01L49/00 ,  H02N1/00 ,  H01L29/82

CPC classification number: B81C1/00246 ,  G01L1/14 ,  G01L1/148 ,  G01P15/0802 ,  G01P15/125 ,  H02N1/002 ,  H02N1/006 ,  B81B2201/0235 ,  B81B2207/07 ,  B81C2203/0714 ,  B81C2203/0742

Abstract: A micromechanical component includes a fixed micromechanical structure having a pair of capacitor plates being formed of one or more conductive layers, and a movable micromechanical structure being formed of a dielectric layer to be introduced into or removed from an interstice between the plates. A capacitance change is obtained through the resilient or freely movable dielectric, so that the component can be inserted as a proportional or a non-proportional force sensor. A microsystem with an integrated circuit and a micromechanical component with a movable dielectric, as well as a production method for the component and the microsystem, are also provided.

Abstract translation: 微机械部件包括固定的微机械结构，其具有由一个或多个导电层形成的一对电容器板，以及可移动微机械结构，其由介质层形成，以被引入板或从板之间的间隙中移除。 通过弹性或可自由移动的电介质获得电容变化，使得部件可以作为比例或非比例的力传感器插入。 还提供了具有集成电路的微系统和具有可移动介质的微机械部件以及组件和微系统的制造方法。

公开(公告)号：US11766696B2

公开(公告)日：2023-09-26

申请号：US16784186

申请日：2020-02-06

Applicant: BFLY Operations, Inc.

Inventor： Lingyun Miao ,  Jianwei Liu ,  Jonathan M. Rothberg

IPC: B06B1/00 ,  B06B1/02 ,  H10N30/06

CPC classification number: B06B1/0292 ,  H10N30/06 ,  B81B2201/0271 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C2201/0101 ,  B81C2201/013 ,  B81C2201/0147 ,  B81C2201/0174 ,  B81C2203/0714

Abstract: A method of forming an ultrasonic transducer device includes forming a patterned metal electrode layer over a substrate, the patterned metal electrode layer comprising a lower layer and an upper layer formed on the lower layer; forming an insulation layer over the patterned metal electrode layer; and planarizing the insulation layer to the upper layer of the patterned metal electrode layer, wherein the upper layer comprises a electrically conductive material that serves as a chemical mechanical polishing (CMP) stop layer that has CMP selectivity with respect to the insulation layer and the lower layer, and wherein the upper layer has a CMP removal rate slower than that of the insulation layer.

公开(公告)号：US11667517B2

公开(公告)日：2023-06-06

申请号：US16908243

申请日：2020-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0006 ,  B81B7/0051 ,  B81C1/00246 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2201/112 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

公开(公告)号：US09938134B2

公开(公告)日：2018-04-10

申请号：US15205619

申请日：2016-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shiang-Chi Lin ,  Jung-Huei Peng ,  Yu-Chia Liu ,  Yi-Chien Wu ,  Wei Siang Tan

IPC: B81B7/00 ,  B81C1/00 ,  B81B3/00 ,  H01L23/02 ,  H01L21/54 ,  H01L21/322 ,  H01L23/26 ,  H01L29/84 ,  H01L21/50

CPC classification number: B81B7/0038 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/04 ,  B81B2207/012 ,  B81B2207/07 ,  B81C1/00285 ,  B81C2201/013 ,  B81C2201/016 ,  B81C2203/0109 ,  B81C2203/035 ,  B81C2203/0714 ,  B81C2203/0792

Abstract: A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.

公开(公告)号：US09932222B2

公开(公告)日：2018-04-03

申请号：US15162994

申请日：2016-05-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Michael T. Brigham ,  Christopher V. Jahnes ,  Cameron E. Luce ,  Jeffrey C. Maling ,  William J. Murphy ,  Anthony K. Stamper ,  Eric J. White

IPC: B81C1/00 ,  G06F17/50 ,  B81B3/00

CPC classification number: B81C1/0015 ,  B81B3/0021 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2207/09 ,  B81C1/00047 ,  B81C1/00269 ,  B81C1/00365 ,  B81C1/00531 ,  B81C1/00936 ,  B81C2201/0104 ,  B81C2201/0107 ,  B81C2201/0121 ,  B81C2201/0125 ,  B81C2201/0132 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2203/0109 ,  B81C2203/0145 ,  B81C2203/0714 ,  G06F17/5009

Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.

公开(公告)号：US20170313575A1

公开(公告)日：2017-11-02

申请号：US15652920

申请日：2017-07-18

Applicant: Foresee Technology Corp.

Inventor： Chien-Chang CHEN ,  Yi-Der LIANG ,  Shiao-Yi LIN ,  Cheng-Kuang YANG

IPC: B81B3/00 ,  B81C1/00 ,  H04R19/00 ,  H04R19/04

CPC classification number: B81B3/0054 ,  B81B3/0078 ,  B81B2201/0257 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81B2203/0307 ,  B81B2203/0361 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/013 ,  B81C2201/053 ,  B81C2203/0714 ,  B81C2203/0735 ,  H04R19/005 ,  H04R19/04

Abstract: The present invention disclosed a micro acoustic collector and CMOS microphone single chip. The micro acoustic collector comprising: a plurality of leaf-shaped structures annularly arranged with symmetry, each of the plurality of leaf-shaped structure having a suspended arm and a restrained arm, and the suspended arm of the plurality of leaf-shaped structures connected to a suspended fulcrum, and a plurality of through-vias formed in the suspended fulcrum and the plurality of leaf-shaped structures; a plurality of support pillars uniformly disposed under edges of the plurality of leaf-shaped structures corresponding to the restrained arms and the suspend arms; and a base metal layer formed under and insulated from the plurality of support pillars, and facing towards the inner-annular-supported acoustic collection film to form a hollow space.

公开(公告)号：US09791470B2

公开(公告)日：2017-10-17

申请号：US14141759

申请日：2013-12-27

Applicant: Intel Corporation

Inventor： Feras Eid ,  Sasha N. Oster ,  Kyu Oh Lee ,  Sarah Haney

IPC: H01L27/22 ,  G01P1/04 ,  G01P15/097 ,  B81C1/00 ,  B81B3/00 ,  B81B7/00

CPC classification number: G01P1/04 ,  B81B3/0027 ,  B81B7/007 ,  B81B7/008 ,  B81B2201/025 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2207/094 ,  B81C1/00238 ,  B81C1/00246 ,  B81C1/00333 ,  B81C1/00547 ,  B81C2201/056 ,  B81C2203/0172 ,  B81C2203/0714 ,  B81C2203/0792 ,  G01P15/097 ,  H01L27/22 ,  Y10T29/49075

Abstract: Magnet placement is described for integrated circuit packages. In one example, a terminal is applied to a magnet. The magnet is then placed on a top layer of a substrate with solder between the terminal and the top layer, and the solder is reflowed to attach the magnet to the substrate.