公开(公告)号：US07170754B2

公开(公告)日：2007-01-30

申请号：US10839901

申请日：2004-05-06

申请人： Moses Asom ,  Yinon Degani ,  Joe Ryan ,  Kunquan Sun ,  Yanbing Yu ,  Meng Zhao

发明人： Moses Asom ,  Yinon Degani ,  Joe Ryan ,  Kunquan Sun ,  Yanbing Yu ,  Meng Zhao

IPC分类号： H05K1/14

CPC分类号： H05K1/181 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/09027 ,  H05K2201/09972 ,  H05K2201/10689 ,  H05K2203/1572 ,  Y02P70/611

摘要： The specification describes SDIO devices and SDIO cards wherein the SDIO devices are provided with enhanced functionality, and the SDIO cards are provided with enhanced IC capacity. A variety of multi-chip-module (MCM) approaches are used to increase the IC capacity of the SDIO card.

摘要翻译： 该规范描述了SDIO设备和SDIO卡，其中SDIO设备具有增强的功能，并且SDIO卡具有增强的IC容量。 使用各种多芯片模块（MCM）方法来增加SDIO卡的IC容量。

公开(公告)号：US20050248926A1

公开(公告)日：2005-11-10

申请号：US10839901

申请日：2004-05-06

申请人： Moses Asom ,  Yinon Degani ,  Joe Ryan ,  Kunquan Sun ,  Yanbing Yu ,  Meng Zhao

发明人： Moses Asom ,  Yinon Degani ,  Joe Ryan ,  Kunquan Sun ,  Yanbing Yu ,  Meng Zhao

IPC分类号： H05K1/11 ,  H05K1/18 ,  H05K3/28 ,  H05K5/00 ,  H05K7/06

CPC分类号： H05K1/181 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/09027 ,  H05K2201/09972 ,  H05K2201/10689 ,  H05K2203/1572 ,  Y02P70/611

摘要： The specification describes SDIO devices and SDIO cards wherein the SDIO devices are provided with enhanced functionality, and the SDIO cards are provided with enhanced IC capacity. A variety of multi-chip-module (MCM) approaches are used to increase the IC capacity of the SDIO card.

摘要翻译： 该规范描述了SDIO设备和SDIO卡，其中SDIO设备具有增强的功能，并且SDIO卡具有增强的IC容量。 使用各种多芯片模块（MCM）方法来增加SDIO卡的IC容量。

公开(公告)号：US20050088194A1

公开(公告)日：2005-04-28

申请号：US10997629

申请日：2004-11-24

申请人： Yinon Degani ,  Charley Gao ,  King Tai

发明人： Yinon Degani ,  Charley Gao ,  King Tai

IPC分类号： G01R1/073 ,  G01R31/02

CPC分类号： G01R1/0735

摘要： The specification describes a flexible membrane test apparatus and test method for high-speed IC chips. The method and apparatus rely on locating the reference components of the test circuit very close to the contact pads of the IC chip under test. This is achieved in one embodiment by locating those components adjacent to the flexible membrane. In another embodiment, the reference components may be attached to the membrane itself, so the length of the runners connecting the contact points of the tester and the critical reference components is optimally reduced. In yet a further embodiment, the entire test circuit, in the form of an IC test chip, is located on the membrane.

摘要翻译： 该说明书描述了用于高速IC芯片的柔性膜测试装置和测试方法。 该方法和装置依赖于将测试电路的参考部件定位得非常靠近被测IC芯片的接触焊盘。 这在一个实施例中通过将这些部件定位在与柔性膜相邻的位置来实现。 在另一个实施例中，参考部件可以附接到膜本身，因此连接测试器的接触点和关键参考部件的流道的长度被最佳地减小。 在又一个实施例中，以IC测试芯片的形式的整个测试电路位于膜上。

公开(公告)号：US5608262A

公开(公告)日：1997-03-04

申请号：US393628

申请日：1995-02-24

申请人： Yinon Degani ,  Thomas D. Dudderar ,  Byung J. Han ,  Alan M. Lyons ,  King L. Tai

发明人： Yinon Degani ,  Thomas D. Dudderar ,  Byung J. Han ,  Alan M. Lyons ,  King L. Tai

IPC分类号： H01L25/18 ,  H01L23/13 ,  H01L23/14 ,  H01L23/31 ,  H01L23/498 ,  H01L25/04 ,  H01L25/065 ,  H01L25/07 ,  H05K3/30 ,  H01L23/34

CPC分类号： H01L23/3107 ,  H01L23/13 ,  H01L23/147 ,  H01L23/4985 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73207 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/157 ,  H01L2924/16152 ,  H01L2924/19041

摘要： Described is a novel packaging of MCM tiles without wire-bond interconnections and in a total thickness which is reduced relative to conventional MCM packaging. The MCM tile includes a substrate with a plurality of peripheral metallizations and at least one chip flip-chip mounted on the substrate. The PWB is provided with an aperture which is smaller than the size of the silicon substrate but larger than the outside dimensions of the mounted chips. The substrate is positioned on the PWB so that its ends overlap areas of the PWB adjacent the aperture and the chips fit into the aperture. Peripheral metallizations on the substrate are interconnected to metallizations on the PWB by either solder reflow technology or conductive adhesive technology.

摘要翻译： 描述了一种新颖的MCM瓦片封装，无需引线键合互连，并且相对于常规MCM封装而言，其总厚度减小。 MCM瓦片包括具有多个外围金属化的基板和安装在基板上的至少一个芯片倒装芯片。 PWB设置有小于硅基板的尺寸但大于安装的芯片的外部尺寸的孔径。 基板被定位在PWB上，使得其端部与邻近孔径的PWB的区域重叠，并且芯片装配到孔中。 衬底上的外围金属化通过焊料回流技术或导电粘合剂技术与PWB上的金属化相互连接。

公开(公告)号：US5385290A

公开(公告)日：1995-01-31

申请号：US158131

申请日：1993-11-24

申请人： Yinon Degani

发明人： Yinon Degani

IPC分类号： B23K35/363 ,  B23K1/00 ,  B23K35/22 ,  H05K3/34 ,  B23K31/02

CPC分类号： B23K1/0016 ,  H05K3/3484 ,  B23K2201/42 ,  H05K2201/0266

摘要： The quality of soldering produced on devices such as printed circuit boards and multichip modules is significantly improved through use of a specific size distribution of solder particles. In particular, the solder includes a vehicle and solder particles of specific size. In general, an appropriate distribution of both large and small particles should be employed. Through this expedient short circuits and soldering defects in fine line devices are reduced.

摘要翻译： 通过使用焊料颗粒的特定尺寸分布，显着提高了在诸如印刷电路板和多芯片组件的器件上产生的焊接的质量。 特别地，焊料包括车辆和特定尺寸的焊料颗粒。 通常，应该使用大颗粒和小颗粒的适当分布。 通过这种方便的方式，减少细线装置中的短路和焊接缺陷。

公开(公告)号：US5125560A

公开(公告)日：1992-06-30

申请号：US787290

申请日：1991-11-04

申请人： Yinon Degani ,  Dean P. Kossives

发明人： Yinon Degani ,  Dean P. Kossives

IPC分类号： H01L21/52 ,  B23K1/00 ,  B23K1/20 ,  H01L21/60 ,  H05K3/34

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K1/203 ,  H05K3/3489 ,  B23K2201/40 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15787

摘要： Soldering is performed and the residues associated with the soldering process are removed through the use of a specific process. Components such as two integrated circuits or an integrated circuit and mounting board are initially tacked by compression bonding or through the use of adhesives. Flux is introduced, and the components to be soldered are brought to reflow temperature. The flux is chosen so that upon reflow and subsequent cooling to a temperature of 100.degree. C., or lower, the flux remains in liquid state. The flux is then easily removed by cleaning with a miscible liquid that is subsequently removed through processes such as spinning and evaporation.

公开(公告)号：US08018027B2

公开(公告)日：2011-09-13

申请号：US12609390

申请日：2009-10-30

申请人： Tatsuo Rao Bizen ,  Yinon Degani ,  Kunquan Sun

发明人： Tatsuo Rao Bizen ,  Yinon Degani ,  Kunquan Sun

IPC分类号： H01L29/00 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L27/016 ,  H01L28/10 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/8184 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/19041 ,  H01L2924/30107 ,  Y10S257/904 ,  H01L2924/00014

摘要： A flip-bonded dual-substrate inductor includes a base substrate, a first inductor body portion provided on a surface of the base substrate, a cover substrate, a second inductor body portion provided on a surface of a cover substrate, and a nanoparticle bonding material provided between the base substrate surface and the cover substrate surface to electrically connect the first inductor body portion and the second inductor body portion. A method for fabricating a flip-bonded dual-substrate inductor including forming a first inductor body portion on a surface of a base substrate, forming a second inductor body portion on a surface of a cover substrate, and attaching the base substrate surface to the cover substrate surface using a nanoparticle bonding material that electrically connects the first inductor body portion and the second inductor body portion.

摘要翻译： 翻转式双基板电感器包括基底基板，设置在基底基板的表面上的第一电感体主体部分，盖基板，设置在覆盖基板的表面上的第二电感体主体部分和纳米粒子接合材料 设置在基底基板表面和盖基板表面之间，以电连接第一电感器主体部分和第二电感器主体部分。 一种用于制造翻转式双基板电感器的方法，包括在基板的表面上形成第一电感体主体部分，在盖基板的表面上形成第二电感体主体部分，并将基板表面附接到盖板 使用电连接第一电感器主体部分和第二电感器主体部分的纳米颗粒接合材料的衬底表面。

公开(公告)号：US20090237175A1

公开(公告)日：2009-09-24

申请号：US12077811

申请日：2008-03-21

申请人： Yinon Degani ,  Yu Fan ,  Charley Chunlei Gao ,  Kunquan Sun ,  Liguo Sun ,  Jian Cheng

发明人： Yinon Degani ,  Yu Fan ,  Charley Chunlei Gao ,  Kunquan Sun ,  Liguo Sun ,  Jian Cheng

IPC分类号： H03H7/42

CPC分类号： H01F17/0013 ,  H01F27/2804 ,  H01F2017/0046 ,  H03H7/42

摘要： Balun transformers are described wherein multiple transformer loops are implemented in a stacked design with the primary and secondary loops overlying one another. By aligning the loops in a vertical direction, instead of offsetting the loops, the area of the device is reduced. Multiple transformer loops are nested on each level, and the transformer loops on a given level are connected together using a crossover located on a different level.

摘要翻译： 描述了平衡 - 不平衡变压器，其中多个变压器回路以堆叠设计实现，其中主回路和次级回路彼此重叠。 通过在垂直方向上对准环路，而不是抵消环路，设备的面积减小。 多个变压器回路嵌套在每个级别上，并且给定级别上的变压器环路使用位于不同级别的交叉连接在一起。

公开(公告)号：US20090184416A1

公开(公告)日：2009-07-23

申请号：US12009805

申请日：2008-01-22

申请人： Yinon Degani ,  Yu Fan ,  Charley Chunlei Gao ,  Kunquan Sun ,  Liquo Sun

发明人： Yinon Degani ,  Yu Fan ,  Charley Chunlei Gao ,  Kunquan Sun ,  Liquo Sun

IPC分类号： H01L23/36 ,  H01L21/58

CPC分类号： H01L25/16 ,  H01L23/66 ,  H01L2223/6672 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/19103 ,  H01L2924/19104

摘要： An RF/IPD package with improved thermal management is described. The IPD substrate is attached to a system substrate with a thin RF chip mounted in the standoff between the IPD substrate and the system substrate. RF interconnections are made between the top of the RF chip and the bottom of the IPD substrate. Heat sinking is provided by bonding a heat sink layer on the RF chip to a heat sink layer on the system substrate. The heat sink may also serve as a ground plane connection. Combinations of other types of integrated devices may be fabricated using this approach.

摘要翻译： 描述了具有改进的热管理的RF / IPD封装。 IPD基板通过安装在IPD基板和系统基板之间的支架中的薄RF芯片连接到系统基板。 在RF芯片的顶部和IPD基板的底部之间形成RF互连。 通过将RF芯片上的散热层结合到系统基板上的散热层来提供散热。 散热器也可以用作接地平面连接。 可以使用这种方法来组合其他类型的集成装置。

公开(公告)号：US07355264B2

公开(公告)日：2008-04-08

申请号：US11520254

申请日：2006-09-13

申请人： Yinon Degani ,  Yinchao Chen ,  Yu Fan ,  Charley Chunlei Gao ,  Kunquan Sun ,  Liquo Sun

发明人： Yinon Degani ,  Yinchao Chen ,  Yu Fan ,  Charley Chunlei Gao ,  Kunquan Sun ,  Liquo Sun

IPC分类号： H01L23/48

CPC分类号： H01F17/0006 ,  H01F2017/002 ,  H01F2017/0086 ,  H01L27/0641 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

摘要： The specification describes flip bonded dual substrate inductors wherein a portion of the inductor is constructed on a base IPD substrate, a mating portion of the inductor is constructed on a cover (second) substrate. The cover substrate is then flip bonded to the base substrate, thus mating the two portions of the inductor. Using this approach, a two level inductor can be constructed without using a multilevel substrate. Using two two-level substrates yields a four-level flip bonded dual substrate inductor.

摘要翻译： 该说明书描述了翻转接合双衬底电感器，其中电感器的一部分构造在基底IPD衬底上，电感器的配合部分构造在覆盖（第二）衬底上。 然后将覆盖基板翻转接合到基底基板，从而将电感器的两部分配合。 使用这种方法，可以在不使用多层衬底的情况下构建双电平电感器。 使用两个两级基板产生四电平翻转接合双基板电感。