公开(公告)号：US06121681A

公开(公告)日：2000-09-19

申请号：US856145

申请日：1997-05-14

Applicant: Shigeru Tanaka ,  Yasuhiro Nakamura ,  Hitoshi Miwa ,  Kazuyuki Miyazawa

Inventor： Shigeru Tanaka ,  Yasuhiro Nakamura ,  Hitoshi Miwa ,  Kazuyuki Miyazawa

IPC: H01L25/10 ,  H01L23/495 ,  H01L25/18 ,  H05K1/18 ,  H05K5/02 ,  H01L23/34

CPC classification number: H05K5/0269 ,  H01L23/49541 ,  H01L24/49 ,  H05K1/181 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01055 ,  H01L2924/01058 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K2201/09236 ,  H05K2201/09772 ,  H05K2201/10689 ,  Y02P70/611

Abstract: A resin-encapsulated semiconductor package and a packaging structure, make it possible to provide for a high density mounting arrangement. Specifically, outer leads protrude from the two long sides of a rectangular package. The inner leads in the package, connected to the outer leads protruding from one long side, are connected through wires to the bonding pads of a semiconductor chip encapsulated in the package, whereas the inner leads in the package, connected to the outer leads protruding from the other long side, are in an electrically floating state in the package. The semiconductor packages are arranged in a direction on a card-shaped mounting board, and the opposed outer leads of adjoining semiconductor packages are electrically connected by wiring on the mounting board. The wirings are laid below the semiconductor packages so that they extend generally linearly.

Abstract translation: 树脂封装的半导体封装和封装结构使得可以提供高密度的安装布置。 具体地说，外引线从矩形封装的两个长边突出。 封装中的内引线，连接到从一个长边突出的外引线，通过导线连接到封装在封装中的半导体芯片的焊盘，而封装中连接到外引线的内引线从 另一个长边在封装中处于电浮动状态。 半导体封装沿着卡形安装板的方向排列，相邻的半导体封装的外引线通过安装板上的布线电连接。 布线布置在半导体封装的下方，使得它们大致线性地延伸。

公开(公告)号：US5777277A

公开(公告)日：1998-07-07

申请号：US714442

申请日：1996-09-16

Applicant: Hideho Inagawa

Inventor： Hideho Inagawa

IPC: H01F17/00 ,  H01R12/00 ,  H05K1/02 ,  H05K1/16 ,  H05K3/22 ,  H05K3/46 ,  H01R9/09

CPC classification number: H01F17/0006 ,  H05K1/0233 ,  H05K1/165 ,  H01F2017/0046 ,  H05K1/0231 ,  H05K2201/09336 ,  H05K2201/09618 ,  H05K2201/09772 ,  H05K2201/10287 ,  H05K2201/10636 ,  H05K3/222 ,  H05K3/4685 ,  Y02P70/611

Abstract: A ground connecting pattern of the printed circuit board is separated by forming a spiral circuit pattern element onto a printed circuit board. The separated ground connecting patterns are electrically connected by an electric part, thereby suppressing radiation noises of the printed circuit board.

Abstract translation: 通过在印刷电路板上形成螺旋形电路图形元件来分离印刷电路板的接地连接图案。 分离的接地连接图案通过电气部件电连接，从而抑制印刷电路板的辐射噪声。

公开(公告)号：US5622770A

公开(公告)日：1997-04-22

申请号：US605337

申请日：1996-02-09

Applicant: Gary L. Dowdy ,  William P. Hart

Inventor： Gary L. Dowdy ,  William P. Hart

IPC: H05K1/00 ,  H05K1/11 ,  H05K3/22 ,  B32B9/00

CPC classification number: H05K1/112 ,  H05K1/029 ,  H05K1/0292 ,  H05K1/0298 ,  H05K2201/09772 ,  H05K2201/10212 ,  H05K2201/10689 ,  H05K2203/175 ,  Y10S428/901 ,  Y10T29/4913 ,  Y10T428/24917

Abstract: A system for modifying a printed circuit board allows parallel design of the printed circuit board and a programmable gate or logic array used on the circuit board. The printed circuit board design can be fixed before the gate array design is complete, which allows for flexibility in pin assignments of the high density integrated circuit mounted on the circuit board. Each pin of the gate array that can vary has a pair of vias connected by a conductive track. Changing signal paths requires cutting this track and using a jumper to make the new connection.

Abstract translation: 用于修改印刷电路板的系统允许并行设计印刷电路板和在电路板上使用的可编程门或逻辑阵列。 印刷电路板设计可以在门阵列设计完成之前固定，这允许安装在电路板上的高密度集成电路的引脚分配灵活性。 可以改变的门阵列的每个引脚具有通过导电轨道连接的一对通孔。 改变信号路径需要切割此轨道并使用跳线进行新的连接。

公开(公告)号：US5563572A

公开(公告)日：1996-10-08

申请号：US247596

申请日：1994-05-23

Applicant: Ullrich Hetzler

Inventor： Ullrich Hetzler

IPC: H01C17/06 ,  H01C1/084 ,  H01C1/142 ,  H01C7/00 ,  H01C13/02 ,  H01C17/245 ,  H05K1/11 ,  H05K1/18 ,  H01C1/02

CPC classification number: H01C1/142 ,  H01C1/084 ,  H01C13/02 ,  H05K1/111 ,  H05K1/181 ,  H05K2201/09281 ,  H05K2201/09772 ,  H05K2201/10022 ,  H05K2201/10636 ,  H05K2203/162 ,  H05K2203/167 ,  Y02P70/611 ,  Y10T29/49099

Abstract: A resistor of SMD (Surface Mounted Device) construction includes a film of a resistive alloy as a resistive track on two electrically separated carrier plate elements of copper, which are constructed as contact elements solderable to the terminals of a printed circuit board to thereby ensure good heat dissipation into a printed circuit board. In order to manufacture such resistors, a resistive film sufficient for a plurality of individual resistors is adhered to but electrically isolated from a large copper plate and the laminate formed thereby is split into the individual resistors after producing the individual resistive tracks and their electrical connections to the copper plate and after producing gaps between the plate elements for each track.

Abstract translation: SMD（表面安装器件）结构的电阻器包括作为电阻轨道的两个电隔离的铜载体元件的电阻合金膜，其被构造为可焊接到印刷电路板的端子的接触元件，从而确保良好 散热成印刷电路板。 为了制造这种电阻器，可以将足够多个单独电阻器的电阻膜粘附到大铜板上而与之电隔离，并且由此形成的层叠体在产生各个电阻轨道及其与 并且在每个轨道的板元件之间产生间隙之后。

公开(公告)号：US5488540A

公开(公告)日：1996-01-30

申请号：US178183

申请日：1994-01-18

Applicant: Hironobu Hatta

Inventor： Hironobu Hatta

IPC: H05K1/02 ,  H05K3/46 ,  H05K9/00 ,  H05K1/11 ,  H03H7/00 ,  H05K7/06

CPC classification number: H05K9/0039 ,  H05K1/0225 ,  H05K1/0233 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09772 ,  H05K2201/1006 ,  H05K2201/10689

Abstract: A multi-layered printed circuit board is provided. This printed circuit board includes generally a substrate formed with first and second base layers, a first conductive pattern block formed on a surface of the first base layer of the substrate to connect with a power terminal of an IC mounted on an opposite surface of the first base layer, a second conductive pattern block formed on the second base layer to connect with a grounding terminals of the IC, a power conductor arranged in the same plane as the first conductive pattern blocks at a preselected interval therebetween, a grounding conductor arranged in the same plane as the second conductive pattern blocks at a preselected interval therebetween, a first EMI filter provided adjacent the IC in connection with the first conductive pattern block for reducing noise concentrated on the first conductive pattern block, and a second EMI filter provided adjacent the IC in connection with the second conductive pattern block for reducing noise concentrated on the second conductive pattern block.

Abstract translation: 提供多层印刷电路板。 该印刷电路板通常包括形成有第一和第二基底层的基板，形成在基板的第一基底层的表面上的第一导电图案块，以与安装在第一和第二基底层的相反表面上的IC的电源端子连接 基底层，形成在所述第二基底层上以与所述IC的接地端子连接的第二导电图案块，布置在与所述第一导电图案以预定间隔在所述第一导电图案块相同的平面内的电力导体，布置在所述基底层中的接地导体 与第二导电图案相同的平面在它们之间以预选的间隔阻挡;第一EMI滤波器，与第一导电图案块相邻设置，用于降低集中在第一导电图案块上的噪声;以及第二EMI滤波器，其设置在IC附近 与用于降低集中在第二导电图案bl上的噪声的第二导电图案块结合 奥克

公开(公告)号：US5375035A

公开(公告)日：1994-12-20

申请号：US35393

申请日：1993-03-22

Applicant: D. Joe Stoddard

Inventor： D. Joe Stoddard

IPC: H01G2/06 ,  H01G4/252 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H01G1/035

CPC classification number: H05K3/3442 ,  H05K1/0231 ,  H05K1/113 ,  H05K1/114 ,  H05K2201/0792 ,  H05K2201/09772 ,  H05K2201/10636 ,  H05K3/0094 ,  Y02P70/611 ,  Y02P70/613

Abstract: A capacitor mounting structure for printed circuit boards wherein the capacitor includes first and second terminals which are connected to first and second conductor planes in the printed circuit board. Three vias are mounted in the printed circuit board in a position to be aligned with the middle of the capacitor. A first conductor pad is mounted underneath one end of the capacitor and includes spaced apart extension portions which electrically attach to the first and third via. A second conductor pad is mounted under the other end of the capacitor and includes a central extension portion which attaches to the second or middle via. In this manner, the region available for generation of parasitic inductance is minimized thereby increasing the operating efficiency of the capacitor.

Abstract translation: 一种用于印刷电路板的电容器安装结构，其中电容器包括连接到印刷电路板中的第一和第二导体平面的第一和第二端子。 三个通孔安装在印刷电路板中与电容器中间对准的位置。 第一导体焊盘安装在电容器的一端下方，并且包括电连接到第一和第三通孔的间隔开的延伸部分。 第二导体焊盘安装在电容器的另一端下方，并且包括连接到第二或中间通孔的中心延伸部分。 以这种方式，可用于产生寄生电感的区域被最小化，从而提高了电容器的工作效率。

公开(公告)号：US4864079A

公开(公告)日：1989-09-05

申请号：US166128

申请日：1988-03-09

Applicant: Alan Barlow

Inventor： Alan Barlow

IPC: H05K3/34

CPC classification number: H05K3/3426 ,  H05K2201/09772 ,  H05K2201/10689 ,  H05K2201/10818 ,  H05K2201/10909 ,  H05K2201/2081 ,  Y02P70/613

Abstract: A surface-mounted electrical component has rectangular section leads that project outwardly from the edges of the component body. The leads are bent down towards the surface of the substrate and are twisted through 90 degrees about their length to make the leads compliant in a direction transverse of their width where they emerge from the body. The lower end of the leads are straight and untwisted, making a vertical butt solder joint with contact pads on the substrate. The twisted region of the leads are treated, such as by nickel plating, to render them non-wetted by solder. Because of the greater spacing possible between the contact pads, conductive tracks can extend through gaps between the contact pads beneath the body of the component.

Abstract translation: 表面安装的电气部件具有从部件主体的边缘向外突出的矩形截面引线。 引线朝向基板的表面向下弯曲并围绕其长度扭转90度，以使引线在横向于其宽度的方向上从它们从主体出来。 引线的下端是直的和未扭曲的，使得在基板上具有接触焊盘的垂直对接焊点。 处理引线的扭曲区域，例如通过镀镍处理，使其不被焊料润湿。 由于接触焊盘之间的间隔越大，导电轨迹可以延伸穿过部件主体下方的接触垫之间的间隙。

公开(公告)号：US20150282314A1

公开(公告)日：2015-10-01

申请号：US14674301

申请日：2015-03-31

Applicant: IBIDEN CO., LTD.

Inventor： Toru FURUTA ,  Takeshi FURUSAWA ,  Tomoya TERAKURA

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/40 ,  H05K1/09 ,  H05K3/06

CPC classification number: H05K3/4007 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/0097 ,  H05K3/282 ,  H05K3/3436 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2201/09745 ,  H05K2201/09772 ,  H05K2203/0369 ,  H05K2203/1536 ,  Y02P70/611 ,  Y10T29/49165

Abstract: A method for manufacturing a printed wiring board with conductive posts includes forming on a first foil provided on carrier a first conductive layer including mounting pattern to connect electronic component via conductive posts, forming on the first foil a laminate including an insulating layer and a second foil to form the laminate on the first conductive layer, removing the carrier, forming a metal film on the laminate and first film, forming resist on the metal film to have pattern exposing portion of the metal film corresponding to the mounting pattern and portion of the second foil for a second conductive layer, forming an electroplating layer on the portion of the metal film not covered by the resist, removing the resist, and applying etching to remove the first and second foils below the metal film exposed by the removing the resist and to form the posts on the mounting pattern.

Abstract translation: 一种用于制造具有导电柱的印刷线路板的方法，包括在载体上形成第一导电层，第一导电层包括安装图案，以经由导电柱连接电子部件，在第一箔上形成包括绝缘层和第二箔 在第一导电层上形成层压体，去除载体，在层压体上形成金属膜和第一膜，在金属膜上形成抗蚀剂，使金属膜的图案曝光部分对应于安装图案和第二导电层的部分 箔片用于第二导电层，在未被抗蚀剂覆盖的金属膜的部分上形成电镀层，去除抗蚀剂，并施加蚀刻以除去通过除去抗蚀剂暴露的金属膜下面的第一和第二箔，并且 形成安装模式上的柱。

公开(公告)号：US08746925B2

公开(公告)日：2014-06-10

申请号：US13600352

申请日：2012-08-31

Applicant: Hua-Chen Fan ,  Te-Hen Lo ,  Cheng-Wei Chang

Inventor： Hua-Chen Fan ,  Te-Hen Lo ,  Cheng-Wei Chang

IPC: F21V21/00

CPC classification number: H05K1/0296 ,  H05K1/189 ,  H05K2201/09227 ,  H05K2201/09772 ,  H05K2201/10106

Abstract: A circuit board circuit apparatus and a light source apparatus including a substrate, a circuit layer, and at least one electronic component are disclosed. The circuit layer is formed on a surface of the substrate. The circuit layer includes a first circuit and a second circuit which are coplanar-disposed. The at least one electronic component is disposed on the circuit layer and connected with the circuit layer. Each electronic component has a first contact and a second contact. At least a part of the second circuit is disposed between the at least one electronic component and the first circuit. The at least one electronic component crosses over the second circuit, so that the second circuit penetrates through the bottom of the electronic component between the first contact and the second contact.

Abstract translation: 公开了一种电路板电路装置和包括基板，电路层和至少一个电子部件的光源装置。 电路层形成在基板的表面上。 电路层包括共面布置的第一电路和第二电路。 至少一个电子部件设置在电路层上并与电路层连接。 每个电子部件具有第一接触和第二接触。 第二电路的至少一部分设置在至少一个电子部件和第一电路之间。 所述至少一个电子部件跨越所述第二电路，使得所述第二电路在所述第一触点和所述第二触点之间穿过所述电子部件的底部。

公开(公告)号：US20140043783A1

公开(公告)日：2014-02-13

申请号：US13953496

申请日：2013-07-29

Applicant: CANON KABUSHIKI KAISHA

Inventor： Masaharu Ohira

IPC: H05K1/02 ,  H05K13/04

CPC classification number: H05K1/0271 ,  H05K1/0207 ,  H05K1/113 ,  H05K13/0465 ,  H05K2201/09772

Abstract: Provided is a printed wiring board including a first heat dissipation pattern placed in one surface layer on which a semiconductor package is to be mounted, a second heat dissipation pattern placed in the other surface layer, and an inner layer conductor pattern placed in an inner layer, in which through holes are formed in the printed wiring board; the first heat dissipation pattern has a joint portion which is placed in an opposed region opposed to a heat sink of the semiconductor package and which is joined to the heat sink with solder; at least one of the through holes is placed in the opposed region; and the second heat dissipation pattern is formed in a pattern in which an end portion of a conductor film in the one of the through holes on the other surface layer side is separated.

Abstract translation: 提供一种印刷线路板，其包括放置在要安装半导体封装的一个表面层中的第一散热图案，设置在另一个表面层中的第二散热图案，以及放置在内层中的内层导体图案 ，其中在印刷线路板中形成有通孔; 第一散热图案具有接合部，该接合部设置在与半导体封装的散热器相对的相对区域中，并且利用焊料与散热器接合; 至少一个通孔被放置在相对的区域中; 并且第二散热图案形成为其中在另一表面层侧的一个通孔中的导体膜的端部分离的图案。