公开(公告)号：US20070105346A1

公开(公告)日：2007-05-10

申请号：US11588438

申请日：2006-10-26

申请人： Masud Beroz ,  Belgacem Haba

发明人： Masud Beroz ,  Belgacem Haba

IPC分类号： H01L21/00

CPC分类号： H01L23/49572 ,  H01L23/4822 ,  H01L23/49541 ,  H01L24/13 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/1302 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2924/00012

摘要： A method of expanding the contact pitch for un-diced chips in an array by pre-slicing the array in a first direction, attaching a lead frame to the chips' contacts, and then slicing the array and attached lead frame in the second direction. The lead frame has leads mechanically connected one another such that slicing the frame in the second direction along the mechanical connections separates the leads. Each lead has a first terminal which is conductively attached to a chip contact and a second terminal extending beyond the boundaries of the chip to which the first terminal is attached. In this manner, the contact pitch is effectively expanded to the terminal pitch of the leads.

摘要翻译： 一种通过在第一方向上预分割阵列来扩展阵列中未切割的芯片的接触间距的方法，将引线框架附接到芯片的触点，然后在第二方向上对阵列和附接的引线框进行切片。 引线框架具有彼此机械连接的引线，使得沿着机械连接沿第二方向切割框架将引线分开。 每个引线具有导电地连接到芯片触点的第一端子和延伸超过与第一端子连接的芯片的边界的第二端子。 以这种方式，接触间距有效地扩展到引线的端子间距。

公开(公告)号：US07205482B2

公开(公告)日：2007-04-17

申请号：US10680112

申请日：2003-10-08

申请人： Toshiki Naito ,  Hiroshi Yamazaki ,  Toshihiko Omote

发明人： Toshiki Naito ,  Hiroshi Yamazaki ,  Toshihiko Omote

IPC分类号： H05K1/03

CPC分类号： H01L23/49572 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K1/0393 ,  H05K3/0097 ,  H05K2201/2009 ,  H05K2203/1545 ,  Y10T428/24777 ,  H01L2924/00

摘要： Electric conductor patterns having inner leads arranged at a pitch of not larger than 60 μm are formed on a front surface of an insulating layer of a tape carrier for TAB. A reinforcing layer of stainless steel foil is formed on a rear surface of the insulating layer so as to be extend along a lengthwise direction at opposite side edge portions in a widthwise direction of the insulating layer. Accordingly, both dimensional accuracy and positional accuracy can be improved at the time of carrying the tape carrier for TAB or at the time of mounting and bonding electronic parts though the insulating layer can be formed so as to be thin.

摘要翻译： 在TAB的带状载体的绝缘层的前表面上形成具有以不大于60μm的间距布置的内部引线的电导体图案。 在绝缘层的后表面上形成不锈钢箔的加强层，以沿着绝缘层的宽度方向的相对侧边缘部分的长度方向延伸。 因此，在携带用于TAB的带载体时或在安装和接合电子部件时，可以提高尺寸精度和位置精度，尽管绝缘层可以形成为薄。

公开(公告)号：US07173341B2

公开(公告)日：2007-02-06

申请号：US10368337

申请日：2003-02-18

申请人： Kwun-Yao Ho ,  Moriss Kung

发明人： Kwun-Yao Ho ,  Moriss Kung

IPC分类号： H01L29/40

CPC分类号： H01L23/49572 ,  H01L23/24 ,  H01L23/36 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A high performance thermally enhanced package and method of fabricating the same is provided. A chip (a wire bond chip or a flip chip) and a carrier (lead frame or tape carrier) are bonded together using flip-chip technology and thermal compression. The chip and the carrier are encapsulated using a molding compound. The package has a smaller overall size and the capacity to withstand electromagnetic interference.

摘要翻译： 提供了一种高性能热增强封装及其制造方法。 使用倒装芯片技术和热压缩将芯片（引线框架或带状载体）和引线框架或带载体结合在一起。 使用模塑料封装芯片和载体。 该封装具有较小的总体尺寸和耐受电磁干扰的能力。

公开(公告)号：US07138722B2

公开(公告)日：2006-11-21

申请号：US11057495

申请日：2005-02-15

申请人： Toshio Miyamoto ,  Asao Nishimura ,  Koki Noguchi ,  Satoshi Michishita ,  Masashi Horiguchi ,  Masaharu Kubo ,  Kazuyoshi Shiba

发明人： Toshio Miyamoto ,  Asao Nishimura ,  Koki Noguchi ,  Satoshi Michishita ,  Masashi Horiguchi ,  Masaharu Kubo ,  Kazuyoshi Shiba

IPC分类号： H01L23/48

CPC分类号： H01L24/50 ,  H01L23/49572 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L27/10897 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/16245 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12033 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.

公开(公告)号：US20060194363A1

公开(公告)日：2006-08-31

申请号：US10551309

申请日：2004-03-30

申请人： Jacobus Giesberg ,  Monique Beenhakkers ,  Cornelis Johannus Hermanus Rijpert ,  Gerwin Gelinck ,  Fredericus Touwslager

发明人： Jacobus Giesberg ,  Monique Beenhakkers ,  Cornelis Johannus Hermanus Rijpert ,  Gerwin Gelinck ,  Fredericus Touwslager

IPC分类号： H01L29/08 ,  H01L51/40

CPC分类号： H01L27/1214 ,  H01L21/76251 ,  H01L23/49572 ,  H01L23/4985 ,  H01L23/5387 ,  H01L29/78681 ,  H01L51/0001 ,  H01L51/0097 ,  H01L51/052 ,  H01L51/0545 ,  H01L2924/0002 ,  Y02E10/549 ,  Y02P70/521 ,  H01L2924/00

摘要： An electrical element, such as a thin-film transistor, is defined on a flexible substrate, in that the substrate is attached to a carrier by an adhesive layer, and is delaminated after definition of the transistor. This is for instance due to illumination by UV-radiation. An opaque coating is provided to protect any semiconductor material. A heat treatment is preferably given before application of the layers of the transistor to reduce stress in the adhesive layer.

摘要翻译： 在柔性基板上限定了诸如薄膜晶体管的电气元件，因为基板通过粘合剂层附着到载体上，并且在晶体管定义之后被分层。 这是因为例如由于UV辐射的照明。 提供不透明涂层以保护任何半导体材料。 在施加晶体管层之前优选进行热处理以减少粘合剂层中的应力。

公开(公告)号：US07091620B2

公开(公告)日：2006-08-15

申请号：US11116209

申请日：2005-04-28

申请人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

发明人： Chuichi Miyazaki ,  Yukiharu Akiyama ,  Masnori Shibamoto ,  Tomoaki Kudaishi ,  Ichiro Anjoh ,  Kunihiko Nishi ,  Asao Nishimura ,  Hideki Tanaka ,  Ryosuke Kimoto ,  Kunihiro Tsubosaki ,  Akio Hasebe ,  Takehiro Ohnishi ,  Noriou Shimada ,  Shuji Eguchi ,  Hiroshi Koyama ,  Akira Nagai ,  Masahiko Ogino

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/50 ,  H01L2224/85951 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

公开(公告)号：US20060157830A1

公开(公告)日：2006-07-20

申请号：US11377324

申请日：2006-03-15

申请人： Jae-young Hoag

发明人： Jae-young Hoag

IPC分类号： H01L23/495 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/49572 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/86 ,  H01L2223/6611 ,  H01L2224/05554 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a method of manufacturing the same: The package includes a substrate, an external connection terminal portion on at least one edge thereof; a semiconductor chip bonded to the substrate, the semiconductor chip including a plurality of bonding pads; and a flexible film, which electrically connects the semiconductor chip to the external connection terminal portion. The flexible film includes an insulating film; a plurality of first terminals extending through the insulating film, the first terminals contacting external connection terminals of the external connection terminal portion; a plurality of second terminals extending through the insulating film and spaced a predetermined distance apart from the first terminals, the second terminals contacting the bonding pads; and conductive line patterns formed on a top surface of the insulating film, the conductive line patterns electrically connecting the first terminals to the second terminals that respectively correspond to the first terminals.

公开(公告)号：US20060145314A1

公开(公告)日：2006-07-06

申请号：US11202898

申请日：2005-08-12

申请人： Hung-Che Shen ,  Hung-Hsin Liu ,  Geng-Shin Shen

发明人： Hung-Che Shen ,  Hung-Hsin Liu ,  Geng-Shin Shen

IPC分类号： H01L23/495

CPC分类号： H01L23/49572 ,  H01L23/13 ,  H01L24/50 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14

摘要： The invention provides a tape for a tape carrier package. The tape includes a flexible insulating film. The flexible insulating film is divided into a plurality of units arranged successively, and each of the units has a device hole and a plurality of leads. The plurality of leads are formed on the flexible insulating film and protrude to the device hole. The device hole has a plurality of corners formed in a form of a notch for preventing the stress from concentrating on and breaking the leads.

摘要翻译： 本发明提供了一种用于带载包装的带子。 胶带包括柔性绝缘膜。 柔性绝缘膜被分成依次布置的多个单元，并且每个单元具有装置孔和多个引线。 多个引线形成在柔性绝缘膜上并突出到器件孔。 设备孔具有形成为凹口形式的多个拐角，用于防止应力集中和断开引线。

公开(公告)号：US07061078B2

公开(公告)日：2006-06-13

申请号：US10978327

申请日：2004-11-01

申请人： Pai-Sheng Cheng

发明人： Pai-Sheng Cheng

IPC分类号： H01L23/495

CPC分类号： H01L24/50 ,  H01L23/49541 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327

摘要： A semiconductor package includes a chip and a carrier. The chip has an active surface and a lateral surface. The active surface has a number of first bumps and a number of second bumps. The first bumps are spaced by the second bumps. The first bumps are farther from the lateral surface than the second bumps are. The carrier has a base and a number of first inner leads. Each first inner lead has a body portion and a distal end bonding portion. The width of the body portion is smaller than that of the distal end bonding portion. The distal end bonding portions are electrically bonded to the first bumps such that the chip is disposed on the carrier, and each of the body portions is located between the two adjacent second bumps.

摘要翻译： 半导体封装包括芯片和载体。 芯片具有活性表面和侧表面。 活性表面具有多个第一凸块和多个第二凸块。 第一凸起由第二凸块隔开。 第一凸起比第二凸块更远离侧面。 载体具有基部和多个第一内部引线。 每个第一内引线具有主体部分和远端接合部分。 主体部的宽度比前端接合部的宽度小。 远端接合部分电连接到第一凸起，使得芯片设置在载体上，并且每个主体部分位于两个相邻的第二凸起之间。

公开(公告)号：US20060113648A1

公开(公告)日：2006-06-01

申请号：US11261260

申请日：2005-10-28

申请人： Ye-Chung Chung ,  Dong-Han Kim ,  Sa-Yoon Kang

发明人： Ye-Chung Chung ,  Dong-Han Kim ,  Sa-Yoon Kang

IPC分类号： H01L23/02

CPC分类号： H01L23/49838 ,  H01L21/4839 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/13 ,  H01L24/17 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor chip, having an active surface including a peripheral area and a central area, presents a connection area formed on a portion of the peripheral area. The semiconductor chip includes output pads formed in the peripheral area of the active surface and input pads formed in the central area of the active surface. The input pads may be connected to wiring patterns of a TAB tape passing over the connection area.

摘要翻译： 具有包括周边区域和中心区域的活性表面的半导体芯片具有形成在周边区域的一部分上的连接区域。 半导体芯片包括形成在有源表面的周边区域中的输出焊盘和形成在有源表面的中心区域中的输入焊盘。 输入焊盘可以连接到通过连接区域的TAB磁带的布线图案。