公开(公告)号：US08159062B2

公开(公告)日：2012-04-17

申请号：US13243583

申请日：2011-09-23

申请人： Masachika Masuda ,  Toshihiko Usami

发明人： Masachika Masuda ,  Toshihiko Usami

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  B82Y10/00 ,  G06K19/077 ,  G06K19/07732 ,  G11C5/02 ,  H01L22/32 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5388 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/074 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H05K1/0268 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/10159 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method including forming an intermediate product, the intermediate product being configured to include a wiring substrate including a plurality of first electrodes, a plurality of second electrodes and a plurality of test electrodes, a first semiconductor chip mounted over the wiring substrate and including a plurality of first pads electrically connected respectively to the first electrodes, and a second semiconductor chip stacked over the first semiconductor chip and including a plurality of second pads electrically connected respectively to the second electrodes; encapsulating the first and second semiconductor chips; and performing electrical tests on the first and second semiconductor chips by use of the test electrodes, after the encapsulating of the first and second semiconductor chips.

摘要翻译： 一种包括形成中间产品的方法，所述中间产品被配置为包括布线基板，所述布线基板包括多个第一电极，多个第二电极和多个测试电极，第一半导体芯片安装在所述布线基板上并且包括多个 分别与第一电极电连接的第一焊盘和堆叠在第一半导体芯片上并包括分别电连接到第二电极的多个第二焊盘的第二半导体芯片; 封装第一和第二半导体芯片; 以及在封装了第一和第二半导体芯片之后，通过使用测试电极对第一和第二半导体芯片进行电测试。

公开(公告)号：US08097957B2

公开(公告)日：2012-01-17

申请号：US12702207

申请日：2010-02-08

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Jajen Chen

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Jajen Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/18 ,  H01L23/5387 ,  H01L23/5388 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.

摘要翻译： 公开了一种闪存卡，其包括衬底，在衬底顶部的闪存存储器管芯，在闪存存储器管芯的顶部上的控制器管芯，以及与控制器管芯连接并在闪存管芯的顶部上的插入器，其中， 插入器导致大大减少了与基板的引线接合。 插入器可以围绕或与控制器管芯并排放置。 根据本发明的系统和方法实现了以下目的：（1）尽可能地利用尽可能大的闪存存储器管芯，通过减少衬底上的引线接合焊盘的数量来增加闪存卡的密度 并且能够插入可以装配在给定卡内部边界内的最大的模具; （2）更有效地堆叠闪存芯片，增加闪存卡的密度; 和（3）尽可能少的与基板的接合线数量，以提高产量。

公开(公告)号：US20110269268A1

公开(公告)日：2011-11-03

申请号：US13179468

申请日：2011-07-08

申请人： NOBUYASU MUTO ,  Naoki Kawanabe ,  Hiroshi Ono ,  Tamaki Wada

发明人： NOBUYASU MUTO ,  Naoki Kawanabe ,  Hiroshi Ono ,  Tamaki Wada

IPC分类号： H01L21/60

CPC分类号： H01L24/85 ,  H01L23/5388 ,  H01L24/27 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/743 ,  H01L24/78 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48455 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/78301 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/838 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85191 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： The degree of freedom of the chip layout in a semiconductor device is improved, and improvement in packaging density is aimed at.Since it becomes possible to form the wire of two directions on the pad of a memory chip by performing the over-bonding of reverse bonding by ball bonding, an effect equivalent to continuation stitch bonding of wedge bonding can be produced by ball bonding. Hereby, the degree of freedom of a chip layout and the degree of freedom of the lead layout of substrate 3 can be improved, and the packaging density on a substrate in a chip lamination type semiconductor device (memory card) can be improved.

摘要翻译： 提高了半导体器件中的芯片布局的自由度，并且旨在提高封装密度。 由于可以通过通过球接合进行反向接合的过粘结而在存储芯片的焊盘上形成两个方向的线，因此可以通过球接合产生与楔形接合的连续接合接合相当的效果。 因此，可以提高芯片布局的自由度和基板3的引线布局的自由度，并且可以提高芯片层叠型半导体器件（存储卡）中的基板上的封装密度。

公开(公告)号：US20110233788A1

公开(公告)日：2011-09-29

申请号：US13158430

申请日：2011-06-12

申请人： MINORU SHINOHARA ,  Makoto Araki ,  Michiaki Sugiyama

发明人： MINORU SHINOHARA ,  Makoto Araki ,  Michiaki Sugiyama

IPC分类号： H01L27/12

CPC分类号： G06F1/185 ,  G11C5/02 ,  G11C5/063 ,  H01L23/5388 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A memory card has a wiring board, four memory chips stacked on a main surface of the wiring board, and a controller chip and an interposer mounted on a surface of the memory chip of the uppermost layer. The memory chips are stacked on the surface of the wiring board so that their long sides are directed in the same direction as that of the long side of the wiring board. The memory chip of the lowermost layer is mounted on the wiring board in a dislocated manner by a predetermined distance in a direction toward a front end of the memory card so as not to overlap the pads of the wiring board. The three memory chips stacked on the memory chip of the lowermost layer are disposed so that their short sides on which pads are formed are located at the front end of the memory card.

摘要翻译： 存储卡具有布线板，堆叠在布线板的主表面上的四个存储芯片，以及安装在最上层的存储芯片的表面上的控制器芯片和插入器。 存储芯片堆叠在布线板的表面上，使得它们的长边沿着与布线板的长边方向相同的方向。 最下层的存储芯片以错位的方式在朝向存储卡前端的方向上以预定的距离安装在布线板上，以便不与布线板的焊盘重叠。 堆叠在最下层的存储芯片上的三个存储芯片被布置成使得它们在其上形成焊盘的短边位于存储卡的前端。

公开(公告)号：US07989960B2

公开(公告)日：2011-08-02

申请号：US12365806

申请日：2009-02-04

申请人： Minoru Shinohara ,  Makoto Araki ,  Michiaki Sugiyama

发明人： Minoru Shinohara ,  Makoto Araki ,  Michiaki Sugiyama

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： G06F1/185 ,  G11C5/02 ,  G11C5/063 ,  H01L23/5388 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A memory card has a wiring board, four memory chips stacked on a main surface of the wiring board, and a controller chip and an interposer mounted on a surface of the memory chip of the uppermost layer. The memory chips are stacked on the surface of the wiring board so that their long sides are directed in the same direction as that of the long side of the wiring board. The memory chip of the lowermost layer is mounted on the wiring board in a dislocated manner by a predetermined distance in a direction toward a front end of the memory card so as not to overlap the pads of the wiring board. The three memory chips stacked on the memory chip of the lowermost layer are disposed so that their short sides on which pads are formed are located at the front end of the memory card.

摘要翻译： 存储卡具有布线板，堆叠在布线板的主表面上的四个存储芯片，以及安装在最上层的存储芯片的表面上的控制器芯片和插入器。 存储芯片堆叠在布线板的表面上，使得它们的长边沿着与布线板的长边方向相同的方向。 最下层的存储芯片以错位的方式在朝向存储卡前端的方向上以预定的距离安装在布线板上，以便不与布线板的焊盘重叠。 堆叠在最下层的存储芯片上的三个存储芯片被布置成使得它们在其上形成焊盘的短边位于存储卡的前端。

公开(公告)号：US07879647B2

公开(公告)日：2011-02-01

申请号：US12574184

申请日：2009-10-06

申请人： Masachika Masuda ,  Toshihiko Usami

发明人： Masachika Masuda ,  Toshihiko Usami

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  B82Y10/00 ,  G06K19/077 ,  G06K19/07732 ,  G11C5/02 ,  H01L22/32 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5388 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/074 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H05K1/0268 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/10159 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A technique for mounting two semiconductor chips over a wiring substrate including mounting a first chip having first bonding pads over a surface of the wiring substrate having electrodes and stacking the second chip having second bonding pads over the first chip; connecting each of the first bonding pads to an associated one of the electrodes of the wiring substrate via an associated first wire; and connecting each of the second bonding pads to an associated one of the electrodes of the wiring substrate via an associated second wire. The bondings being carried out using a reverse bonding method in which at least one of the first and second wires are first bonded to an associated one of the electrodes of the wiring substrate followed by the bonding thereof to an associated one of the bonding pads of the first or second semiconductor chip.

摘要翻译： 一种用于在布线基板上安装两个半导体芯片的技术，包括：在具有电极的布线基板的表面上安装具有第一焊盘的第一芯片，并将具有第二焊盘的第二芯片堆叠在第一芯片上; 通过相关联的第一线将每个第一接合焊盘连接到布线基板的相关联的一个电极; 以及通过相关联的第二线将每个第二接合焊盘连接到布线基板的相关联的一个电极。 使用反向接合方法进行接合，其中第一和第二线中的至少一个首先接合到布线基板的相关联的一个电极，然后将其接合到相关联的一个接合焊盘 第一或第二半导体芯片。

公开(公告)号：US07866562B2

公开(公告)日：2011-01-11

申请号：US11770661

申请日：2007-06-28

申请人： Siew Sin Hiew ,  Nan Nan ,  Abraham Chih-Kang Ma ,  Jim Chin-Nan Ni

发明人： Siew Sin Hiew ,  Nan Nan ,  Abraham Chih-Kang Ma ,  Jim Chin-Nan Ni

IPC分类号： G06K19/06

CPC分类号： G06K19/07724 ,  G06K19/077 ,  G06K19/07732 ,  G11C5/04 ,  G11C2029/4402 ,  H01L23/5388 ,  H01L25/50 ,  H01L2924/0002 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/284 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2201/10053 ,  H05K2201/10159 ,  H05K2201/10446 ,  H05K2203/1316 ,  Y10T29/49155 ,  H01L2924/00

摘要： In an embodiment of the present invention, a memory card includes a bottom plastic piece having a plurality of lateral sides, one of which includes a notch, and a cavity interposed along the lateral sides. A printed circuit board (PCB) assembly, including memory, is positioned in the cavity. A fin-structure is created as part of the manufacturing process of the bottom plastic piece of the card. The memory card is configured to function in a read-write mode when the fin-structure is present, and in a write-protect mode when the fins are snapped off, and the notch is exposed. Alternatively, a plug device can be insertably positioned into the notch, causing the memory card to function in a read-write mode when the plug device is positioned into the notch, and in a write-protect mode when the plug device is removed and the notch is exposed.

摘要翻译： 在本发明的一个实施例中，存储卡包括底部塑料片，其具有多个横向侧面，其中一个包括凹口，以及沿横向插入的空腔。 包括存储器的印刷电路板（PCB）组件位于空腔中。 作为卡的底部塑料件的制造过程的一部分，形成翅片结构。 当存在鳍结构时，存储卡被配置为以读写模式工作，并且当散热片被卡扣并且凹口暴露时以写保护模式工作。 或者，插头装置可插入凹口中，当插头装置位于凹口中时，存储卡以读写模式工作，并且当插头装置被移除时以写保护模式 缺口暴露。

公开(公告)号：US07795714B2

公开(公告)日：2010-09-14

申请号：US11744125

申请日：2007-05-03

申请人： Siew Sin Hiew ,  Nan Nan ,  Abraham Chih-Kang Ma ,  Paul Hsueh

发明人： Siew Sin Hiew ,  Nan Nan ,  Abraham Chih-Kang Ma ,  Paul Hsueh

IPC分类号： H01L23/02 ,  H05K1/14 ,  G06K19/06

CPC分类号： G06K19/077 ,  G06K19/07724 ,  G06K19/07732 ,  G11C5/04 ,  G11C2029/4402 ,  H01L23/5388 ,  H01L25/50 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/284 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2201/10053 ,  H05K2201/10446 ,  H05K2203/1316 ,  Y10T29/49002 ,  H01L2924/00014

摘要： A molded secured digital (SD) card having a bottom plastic piece having a plurality of lateral sides, said bottom plastic piece further having a cavity interposed along said plurality of lateral sides, in accordance with an embodiment of the present invention. The molded SD card further having a printed circuit board (PCB) assembly positioned in said cavity, one of said plurality of lateral sides of said bottom plastic piece having a notch recess, said molded SD card further having a male guide insertably positioned into said notch recess, said molded SD card further having a female switch clamped onto said male guide to form a write-protect switch.

摘要翻译： 根据本发明的实施例，一种具有多个侧面的底部塑料片的模制的固定数字（SD）卡，所述底部塑料件还具有沿所述多个侧面插入的空腔。 所述模制SD卡还具有位于所述空腔中的印刷电路板（PCB）组件，所述底部塑料件的所述多个横向侧中的一个具有凹口凹槽，所述模制的SD卡还具有可插入地定位在所述凹口中的阳导向件 所述模制的SD卡还具有夹在所述阳引导件上的母开关以形成写保护开关。

公开(公告)号：US20100133673A1

公开(公告)日：2010-06-03

申请号：US12702207

申请日：2010-02-08

申请人： Ben Wei CHEN ,  David Hong-Dien CHEN ,  Jason Jajen CHEN

发明人： Ben Wei CHEN ,  David Hong-Dien CHEN ,  Jason Jajen CHEN

IPC分类号： H01L23/52

CPC分类号： H01L25/18 ,  H01L23/5387 ,  H01L23/5388 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.

摘要翻译： 公开了一种闪存卡，其包括衬底，在衬底顶部的闪存存储器管芯，在闪存存储器管芯的顶部上的控制器管芯，以及与控制器管芯连接并在闪存管芯的顶部上的插入器，其中， 插入器导致大大减少了与基板的引线接合。 插入器可以围绕或与控制器管芯并排放置。 根据本发明的系统和方法实现了以下目的：（1）尽可能地利用尽可能大的闪存存储器管芯，通过减少衬底上的引线接合焊盘的数量来增加闪存卡的密度 并且能够插入可以装配在给定卡内部边界内的最大的模具; （2）更有效地堆叠闪存芯片，增加闪存卡的密度; 和（3）尽可能少的与基板的接合线数量，以提高产量。

公开(公告)号：US20100068850A1

公开(公告)日：2010-03-18

申请号：US12574184

申请日：2009-10-06

申请人： Masachika Masuda ,  Toshihiko Usami

发明人： Masachika Masuda ,  Toshihiko Usami

IPC分类号： H01L21/98

CPC分类号： H01L25/0657 ,  B82Y10/00 ,  G06K19/077 ,  G06K19/07732 ,  G11C5/02 ,  H01L22/32 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5388 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/074 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H05K1/0268 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/10159 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A technique for mounting two semiconductor chips over a wiring substrate including mounting a first chip having first bonding pads over a surface of the wiring substrate having electrodes and stacking the second chip having second bonding pads over the first chip; connecting each of the first bonding pads to an associated one of the electrodes of the wiring substrate via an associated first wire; and connecting each of the second bonding pads to an associated one of the electrodes of the wiring substrate via an associated second wire. The bondings being carried out using a reverse bonding method in which at least one of the first and second wires are first bonded to an associated one of the electrodes of the wiring substrate followed by the bonding thereof to an associated one of the bonding pads of the first or second semiconductor chip.

摘要翻译： 一种用于在布线基板上安装两个半导体芯片的技术，包括：在具有电极的布线基板的表面上安装具有第一焊盘的第一芯片，并将具有第二焊盘的第二芯片堆叠在第一芯片上; 通过相关联的第一线将每个第一接合焊盘连接到布线基板的相关联的一个电极; 以及通过相关联的第二线将每个第二接合焊盘连接到布线基板的相关联的一个电极。 使用反向接合方法进行接合，其中第一和第二线中的至少一个首先接合到布线基板的相关联的一个电极，然后将其接合到相关联的一个接合焊盘 第一或第二半导体芯片。