公开(公告)号：US06437447B1

公开(公告)日：2002-08-20

申请号：US09697296

申请日：2000-10-27

申请人： Chien-Ping Huang ,  Chin-Yuan Hung ,  Chang-Fu Chen ,  Jenn-Shyh Yu ,  Jui-Hsiang Hung

发明人： Chien-Ping Huang ,  Chin-Yuan Hung ,  Chang-Fu Chen ,  Jenn-Shyh Yu ,  Jui-Hsiang Hung

IPC分类号： H01L2348

CPC分类号： H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： In a dual-sided chip package without a die pad according to the invention, a first die can be fixed directly on the lead fingers of a leadframe, a support bar, or bus bars, while a second die is attached to the first die. Without a die pad, the distance between the surfaces of the dies and the plastic surface of the package therefore gets longer. Thus, the invention enables a large decrease in the probability of generating voids in the plastic and there is no need to grind the dies. Besides, it improves the vibration and floating characteristics of the dies in the manufacturing process and thus prevents the exposure of the bonding wires and the shelling off or breaking of the dies. The invention can raise the yield of chip packages.

摘要翻译： 在根据本发明的没有芯片焊盘的双面芯片封装中，第一裸片可以直接固定在引线框架，支撑杆或汇流条的引线上，而第二裸片附接到第一裸片。 没有管芯焊盘，因此，模具表面与封装的塑料表面之间的距离变长。 因此，本发明能够大大降低在塑料中产生空隙的可能性，并且不需要研磨模具。 此外，在制造过程中，提高了模具的振动和浮动特性，防止了接合线的暴露和模具脱壳或断裂。 本发明可以提高芯片封装的产量。

公开(公告)号：US06396707B1

公开(公告)日：2002-05-28

申请号：US09454006

申请日：1999-12-03

申请人： Chien-Ping Huang ,  Grace Yang

发明人： Chien-Ping Huang ,  Grace Yang

IPC分类号： H05K702

CPC分类号： H01L23/49816 ,  H01L2924/0002 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/0989 ,  H01L2924/00

摘要： A ball grid array package comprises a substrate having a first surface and a second surface, a chip, an insulating material, and a solder ball. The surface of the substrate comprises ball pads, conducting traces, and solder masks wherein the conducting traces are disposed in between the adjacent ball pads, and are covered by the solder mask, in addition, a portion of each of the ball pads is also covered by the solder mask. The solder mask includes an opening positioned in the area corresponding to the ball pads wherein the opening exposes a portion of the surface the ball pad and a portion of the side wall of the ball pad. The chip is disposed on the second surface of the substrate, and is sealed and encapsulated by the insulated material. The solder balls are disposed on the first surface of the substrate, and are positioned at the openings of the ball pads. Additionally, the solder balls are electrically connected to a portion of the surface of the ball pads and a portion of the side wall of the ball pads disposed at the ball pad openings.

摘要翻译： 球栅阵列封装包括具有第一表面和第二表面的衬底，芯片，绝缘材料和焊球。 衬底的表面包括球垫，导电迹线和焊接掩模，其中导电迹线设置在相邻的球垫之间，并被焊接掩模覆盖，此外，每个球垫的一部分也被覆盖 通过焊接面罩。 焊接掩模包括位于对应于球垫的区域中的开口，其中开口暴露表面的一部分球垫和球垫的侧壁的一部分。 芯片设置在基板的第二表面上，并被绝缘材料密封和封装。 焊球设置在基板的第一表面上，并且位于球垫的开口处。 此外，焊球与电极焊盘表面的一部分电连接，球垫侧壁的一部分设置在球垫开口处。

公开(公告)号：US06350669B1

公开(公告)日：2002-02-26

申请号：US09699888

申请日：2000-10-30

申请人： Han-Ping Pu ,  Chien-Ping Huang

发明人： Han-Ping Pu ,  Chien-Ping Huang

IPC分类号： H01L2144

CPC分类号： H01L24/11 ,  H01L21/4846 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/14505 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/094 ,  H05K2201/10234 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/613 ,  H01L2224/05599

摘要： A method is proposed for bonding a BGA (Ball Grid Array) package to a circuit board without causing the collapsing of the BGA package against the circuit board. The proposed method is characterized in the use of two groups of solder balls of different reflow collapse degrees, which are arranged in an interspersed manner among each other in the ball grid array. In one embodiment, the first group of solder balls are homogenously made of a solder material of a specific melting point; and the second group of solder balls each include an outer portion and a core portion, with the outer portion having substantially the same melting point as the first group of solder balls, and the core portion being greater in melting point than the outer portion. In another embodiment, the second group of solder balls are greater in melting point than the first group of solder balls. During the solder-reflow process, when the first group of solder balls are entirely melted, the second group of solder balls are only partly melted or entirely unmelted and thus are capable of providing a solid support to the BGA package to prevent the collapsing of BGA package against circuit board.

摘要翻译： 提出了一种用于将BGA（球栅阵列）封装结合到电路板而不引起BGA封装相对于电路板折叠的方法。 所提出的方法的特征在于使用不同回流塌陷度的两组焊球，其在球栅阵列中以散布的方式相互排列。 在一个实施例中，第一组焊球由具有特定熔点的焊料均质地制成; 并且第二组焊球各自包括外部部分和芯部分，外部部分具有与第一组焊球基本相同的熔点，并且芯部分的熔点大于外部部分。 在另一个实施例中，第二组焊球的熔点高于第一组焊球。 在焊料回流工艺期间，当第一组焊球完全熔化时，第二组焊球仅部分熔化或完全未熔化，因此能够为BGA封装提供固体支撑以防止BGA的塌陷 封装电路板。

公开(公告)号：US06306682B1

公开(公告)日：2001-10-23

申请号：US09547157

申请日：2000-04-11

申请人： Chien-Ping Huang ,  Randy H. Y. Lo ,  Tzong-Da Ho ,  Eric Ko ,  Jui-Meng Jao

发明人： Chien-Ping Huang ,  Randy H. Y. Lo ,  Tzong-Da Ho ,  Eric Ko ,  Jui-Meng Jao

IPC分类号： H01L2144

CPC分类号： H01L21/56 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A method of fabricating a BGA (Ball Grid Array) IC package of the type having an encapsulating body is proposed, which allows the BGA IC package to be manufactured without having to use conventional organic substrate and encapsulating-body mold having cavity, so that the manufacture process can be more cost-effective to carry out than the prior art. The proposed method is characterized in the use of a copper piece which is selectively removed to form an encapsulating-body cavity for the forming of an encapsulating body therein. The proposed method requires no use of mold with cavity for the forming of the encapsulating body, allowing the same mold to be used for the fabrication of various BGA IC packages of different sizes. Moreover, the proposed method allows fan-in design as well as fan-out design, thus allowing the number of I/O ports to be increased while making the overall package configuration compact in size, and also allows the implantation of the electrically-conductive balls to be easier to carry out and more precisely controlled than the prior art, making the ball implantation more assured in quality than the prior art. Therefore, the proposed method is more advantageous and cost-effective to use than the prior art.

摘要翻译： 提出了一种制造具有封装体的BGA（球栅阵列）IC封装的方法，其允许制造BGA IC封装，而不必使用传统的有机衬底和具有空腔的封装体模具， 制造工艺比现有技术更具成本效益。 所提出的方法的特征在于使用铜片，其被选择性地去除以形成用于在其中形成封装体的封装体腔体。 所提出的方法不需要使用具有空腔的模具来形成封装体，允许相同的模具用于制造不同尺寸的各种BGA IC封装。 此外，所提出的方法允许风扇设计以及扇出式设计，从而允许增加I / O端口的数量，同时使整个封装结构的尺寸紧凑，并且还允许将导电 球比现有技术更容易实施和更精确地控制，使得球注入在质量上比现有技术更加确保。 因此，所提出的方法比现有技术更有利且成本有效。

公开(公告)号：US06290481B1

公开(公告)日：2001-09-18

申请号：US09574878

申请日：2000-05-19

申请人： Chien-Ping Huang

发明人： Chien-Ping Huang

IPC分类号： B29C4514

CPC分类号： B29C45/2701 ,  H01L21/565 ,  H01L2924/0002 ,  H01L2924/00

摘要： A flash-free mold structure is designed for use in the molding of an encapsulant for encapsulating a semiconductor die. The flash-free mold structure includes a first molding piece and a second molding piece. The second molding piece is formed with a resin passage for an encapsulating material to flow therethrough during molding process. It is a characteristic feature of this flash-free mold structure that a cutaway portion, which can be either an one-step cutaway portion or a multi-step cutaway portion, is formed at the rim of the resin passage. The cutaway portion is dimensioned significantly smaller than the resin passage for the retarding the flow speed of the encapsulating material from the resin passage into the cutaway portion during the molding process, thereby preventing the encapsulating material from entering the fissure in the junction between the first and second molding pieces. The resin passage can be either a cull, a runner, or a subrunner defined by the first and second molding pieces. With this flash-free mold structure, the IC packaging quality can be assured and fabrication tools can be prevented from contamination.

摘要翻译： 无闪光模具结构被设计用于模制用于封装半导体管芯的密封剂。 无闪光模具结构包括第一成型件和第二成型件。 第二成型件在模制过程中由用于密封材料的树脂通道形成为流过其中。 这种无闪光模具结构的特征在于，在树脂通道的边缘处形成有可以是一步切口部分或多段切口部分的切口部分。 切割部分的尺寸明显小于树脂通道，用于在模制过程中阻止封装材料从树脂通道进入切除部分的流动速度，从而防止封装材料在第一和第二部分之间的接合处进入裂缝 第二个成型件。 树脂通道可以是由第一和第二成型件限定的剔除，流道或辅助材料。 利用这种无闪光模具结构，可以确保IC封装质量，并可防止制造工具的污染。

公开(公告)号：US08963298B2

公开(公告)日：2015-02-24

申请号：US12769053

申请日：2010-04-28

申请人： Chin-Tsai Yao ,  Chien-Ping Huang ,  Chun-Chi Ke

发明人： Chin-Tsai Yao ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC分类号： H01L23/552 ,  H01L23/00

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L21/78 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/85 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： An EMI shielding package structure includes a substrate unit having a first surface with a die mounting area and a second surfaces opposite to the first surface, metallic pillars formed on the first surface, a chip mounted on and electrically connected to the die-mounting area, an encapsulant covering the chip and the first surface while exposing a portion of each of the metallic pillars from the encapsulant, and a shielding film enclosing the encapsulant and electrically connecting to the metallic pillars. A fabrication method of the above structure by two cutting processes is further provided. The first cutting process forms grooves by cutting the encapsulant. After a shielding film is formed in the grooves and electrically connected to the metallic pillars, the complete package structure is formed by the second cutting process, thereby simplifying the fabrication process while overcoming inferior grounding of the shielding film as encountered in prior techniques.

摘要翻译： EMI屏蔽封装结构包括具有第一表面和芯片安装区域的基板单元和与第一表面相对的第二表面，形成在第一表面上的金属柱，安装在芯片安装区域上并与之电连接的芯片， 在将所述金属柱的一部分从所述密封剂暴露出来的同时覆盖所述芯片和所述第一表面的密封剂以及封装所述密封剂并电连接到所述金属柱的屏蔽膜。 进一步提供通过两个切割工艺的上述结构的制造方法。 第一切割工艺通过切割密封剂形成凹槽。 在凹槽中形成屏蔽膜并与金属柱电连接之后，通过第二切割工艺形成完整的封装结构，从而在克服现有技术中遇到的屏蔽膜的不良接地的同时简化制造工艺。

公开(公告)号：US08546183B2

公开(公告)日：2013-10-01

申请号：US12241847

申请日：2008-09-30

申请人： Chien-Ping Huang ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Chih-Ming Huang

IPC分类号： H01L21/02

CPC分类号： H01L23/3677 ,  H01L21/4871 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3733 ,  H01L23/4334 ,  H01L23/49548 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/351 ,  Y10T29/49126 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.

摘要翻译： 提供散热半导体封装及其制造方法。 半导体芯片安装在芯片载体上。 散热器安装在芯片上，并且包括绝缘芯层，形成在绝缘芯层的上表面和下表面中的每一个上的薄金属层和形成在绝缘芯层中的热通孔。 进行成型工艺以用密封剂封装芯片和散热器以形成封装单元。 执行单个处理以周边地切割包装单元。 在散热器的上表面上的薄金属层上方的一部分密封剂被去除，使得散热器上表面上的薄金属层被暴露，并且由芯片产生的热量可以通过热量散发 水槽。

公开(公告)号：US08421199B2

公开(公告)日：2013-04-16

申请号：US12770028

申请日：2010-04-29

申请人： Pang-Chun Lin ,  Chun-Yuan Li ,  Chien-Ping Huang ,  Chun-Chi Ke

发明人： Pang-Chun Lin ,  Chun-Yuan Li ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC分类号： H01L23/495 ,  H01L23/48

CPC分类号： H01L23/495 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/4951 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/181 ,  Y10T29/49117 ,  Y10T29/49171 ,  Y10T29/49172 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package structure includes: a dielectric layer; a metal layer disposed on the dielectric layer and having a die pad and traces, the traces each including a trace body, a bond pad extending to the periphery of the die pad, and an opposite trace end; metal pillars penetrating the dielectric layer with one ends thereof connecting to the die pad and the trace ends while the other ends thereof protruding from the dielectric layer; a semiconductor chip mounted on the die pad and electrically connected to the bond pads through bonding wires; and an encapsulant covering the semiconductor chip, the bonding wires, the metal layer, and the dielectric layer. The invention is characterized by disposing traces with bond pads close to the die pad to shorten bonding wires and forming metal pillars protruding from the dielectric layer to avoid solder bridging encountered in prior techniques.

公开(公告)号：US20130063059A1

公开(公告)日：2013-03-14

申请号：US13589936

申请日：2012-08-20

申请人： Chien-Yu Chi ,  Chien-Ping Huang

发明人： Chien-Yu Chi ,  Chien-Ping Huang

IPC分类号： H02P6/14

CPC分类号： H02P27/08 ,  H02M2001/385

摘要： Proposed is a driver having dead-time compensation function. The driver having dead-time compensation function generates an output voltage according to a voltage command and a frequency command. The driver includes an inverter, an output current detector and a control unit. The inverter receives a DC voltage and operates with a pulse width modulation mode so that the driver outputs the output voltage and an output current. The output current detector detects the current value of the output current to generate a output current detecting signal. The control unit outputs a switching control signal to inverter according to the voltage command and the frequency command. The control unit corrects a reference command according to dead-time and the output current detecting signal related to the output current so that amplitude and waveform smoothness of the output voltage and the output current are compensated.

摘要翻译： 建议是具有死区补偿功能的驾驶员。 具有死区补偿功能的驱动器根据电压指令和频率指令产生输出电压。 驱动器包括逆变器，输出电流检测器和控制单元。 逆变器接收直流电压并以脉冲宽度调制模式工作，以便驱动器输出输出电压和输出电流。 输出电流检测器检测输出电流的当前值以产生输出电流检测信号。 控制单元根据电压指令和频率指令向逆变器输出切换控制信号。 控制单元根据死区时间和与输出电流相关的输出电流检测信号来校正参考命令，从而补偿输出电压和输出电流的振幅和波形平滑度。

公开(公告)号：US08390118B2

公开(公告)日：2013-03-05

申请号：US12859635

申请日：2010-08-19

申请人： Pang-Chun Lin ,  Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

发明人： Pang-Chun Lin ,  Chun-Yuan Li ,  Fu-Di Tang ,  Chien-Ping Huang ,  Chun-Chi Ke

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/568 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/85001 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad and the traces therein, and the cavities exposing the die pad and the traces; a solder mask layer formed in the cavities and having a plurality of openings for exposing the trace ends and a portion of the die pad; and solder balls formed in the openings and electrically connected to the trace ends. Engaging the solder mask layer with the encapsulant enhances adhesion strength of the solder mask layer so as to prolong the moisture permeation path and enhance package reliability.

摘要翻译： 具有电连接结构的半导体封装包括：具有管芯焊盘和围绕管芯焊盘的迹线的导电层; 一个芯片 接合线; 具有多个空腔的密封剂，其深度大于管芯焊盘的厚度，以及用于将管芯焊盘和其中的迹线嵌入其中的迹线，以及使裸片焊盘和迹线露出的空腔; 形成在所述空腔中的焊料掩模层，并且具有用于暴露所述迹线端部和所述管芯焊盘的一部分的多个开口; 以及形成在开口中并电连接到迹线端的焊球。 将焊料掩模层与密封剂接合，增强了焊料掩模层的粘合强度，从而延长了水分渗透路径并提高了封装的可靠性。