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公开(公告)号:US6093242A
公开(公告)日:2000-07-25
申请号:US126527
申请日:1998-07-30
IPC分类号: C30B23/02 , C30B25/02 , C30B25/18 , G02B6/12 , G02F1/03 , H01L21/02 , H01L21/28 , H01L21/314 , H01L21/316 , H01L29/51 , H01L29/78 , C30B33/04
CPC分类号: C30B23/02 , C30B25/02 , C30B25/18 , C30B29/32 , G02F1/03 , H01L21/02197 , H01L21/02293 , H01L21/28158 , H01L21/28167 , H01L21/28291 , H01L21/31691 , H01L29/513 , H01L29/517 , H01L29/78391 , G02B2006/12142 , G02B2006/12159 , H01L21/28194 , H01L28/56
摘要: A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.
摘要翻译: 用于半导体应用的半导体结构和器件利用诸如硅的半导体材料的衬底,以及晶体氧化物的薄膜,其单位电池能够显示覆盖衬底表面的各向异性行为。 在该结构内,晶体氧化物的单元电池暴露于影响单元电池的几何形状的面内染色,从而将单元电池的方向依赖的质量相对于衬底排列在易于取向的方向上。 单位单元的方向依赖质量的这种倾向使得器件能够在操作期间获得结构特征的有益优点。 例如,在其中结构的结晶氧化物是钙钛矿,尖晶石或类似相关的立方结构的氧化物的情况下,该结构可以在适当的半导体器件内呈现铁电,压电,热电,电光 ,铁磁性,反铁磁性,磁光学或大介电性质,其协同地耦合到下面的半导体衬底。
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公开(公告)号:US20240347613A1
公开(公告)日:2024-10-17
申请号:US18642385
申请日:2024-04-22
发明人: Kimimori HAMADA , Fei HU
IPC分类号: H01L29/423 , H01L21/02 , H01L21/8234 , H01L29/66 , H01L29/78 , H01L29/786
CPC分类号: H01L29/4236 , H01L21/02293 , H01L21/823418 , H01L29/66712 , H01L29/7813 , H01L29/78696
摘要: A semiconductor device includes an N-type semiconductor substrate, an epitaxial layer, a trench structure, a gate, an interlayer dielectric layer, a source, and a drain. The trench structure is disposed at the epitaxial layer. The trench structure includes a plurality of first trenches and one second trench. The plurality of first trenches extend in a first direction and are arranged at intervals in a second direction. The second trench extends in the second direction. The second trench and each of the plurality of first trenches are disposed in a cross manner and communicate with each other. The interlayer dielectric layer covers the gate, and has a contact hole that extends in the second direction. The source is disposed at the interlayer dielectric layer, and is in contact, through the contact hole, with the epitaxial layer.
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公开(公告)号:US12040384B2
公开(公告)日:2024-07-16
申请号:US17459469
申请日:2021-08-27
发明人: Lung Chen
IPC分类号: H01L29/66 , H01L21/02 , H01L21/8234 , H01L29/08 , H01L29/78
CPC分类号: H01L29/66795 , H01L21/02293 , H01L21/823431 , H01L29/0847 , H01L29/7851
摘要: The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a recess structure in a substrate and forming a first semiconductor layer over the recess structure. The process of forming the first semiconductor layer can include doping first and second portions of the first semiconductor layer with a first n-type dopant having first and second doping concentrations, respectively. The second doping concentration can be greater than the first doping concentration. The method can further include forming a second semiconductor layer over the second portion of the first semiconductor layer. The process of forming the second semiconductor layer can include doping the second semiconductor layer with a second n-type dopant.
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公开(公告)号:US11967617B2
公开(公告)日:2024-04-23
申请号:US16759004
申请日:2018-08-08
CPC分类号: H01L29/2003 , C23C16/34 , C30B25/18 , C30B29/38 , C30B29/40 , H01L21/02293 , H01L21/02389 , H01L21/02433
摘要: A nitride semiconductor substrate including a group III nitride semiconductor crystal and having a main surface, wherein a low index crystal plane is (0001) plane curved in a concave spherical shape to the main surface, and the off-angle (θm, θa) at a position (x, y) in the main surface approximated by x representing a coordinate in a direction along axis, y is a coordinate in a direction along axis, (0, 0) represents a coordinate (x, y) of the center, θm represents a direction component along axis in an off-angle of axis with respect to a normal, θa represents a direction component along axis in the off-angle, (M1, A1) represents a rate of change in the off-angle (θm, θa) with respect to the position (x, y) in the main surface, and (M2, A2) represents the off-angle (θm, θa) at the center.
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公开(公告)号:US20240112904A1
公开(公告)日:2024-04-04
申请号:US18370452
申请日:2023-09-20
发明人: Kezia Cheng , Kwang Jae Shin , Taecheol Shon , Yong Woo Jeon , Alan Sangone Chen
IPC分类号: H01L21/02 , H01L21/687
CPC分类号: H01L21/02274 , H01L21/02293 , H01L21/02359 , H01L21/68714
摘要: Disclosed are systems and methods for improving front-side process uniformity by back-side doping. In some implementations, a highly conductive doped layer can be formed on the back side of a semiconductor wafer prior to certain process steps such as plasma-based processes. Presence of such a back-side doped layer reduces variations in, for example, thickness of a deposited and/or etched layer resulting from the plasma-based processes. Such reduction in thickness variations can result from reduced variation in radio-frequency (RF) coupling during the plasma-based processes.
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公开(公告)号:US20240087884A1
公开(公告)日:2024-03-14
申请号:US18513297
申请日:2023-11-17
发明人: GYEOM KIM , Dongwoo Kim , Jihye Yi , JINBUM KIM , Sangmoon Lee , Seunghun Lee
IPC分类号: H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8234 , H01L23/485 , H01L29/06 , H01L29/08 , H01L29/165 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/78 , H01L29/786
CPC分类号: H01L21/02293 , H01L21/28518 , H01L21/76897 , H01L21/823431 , H01L21/823481 , H01L23/485 , H01L29/0673 , H01L29/0847 , H01L29/165 , H01L29/41766 , H01L29/41791 , H01L29/42392 , H01L29/66439 , H01L29/66553 , H01L29/6656 , H01L29/775 , H01L29/7848 , H01L29/78696
摘要: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.
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公开(公告)号:US20240071818A1
公开(公告)日:2024-02-29
申请号:US17950120
申请日:2022-09-22
发明人: I-Wei Chi , Te-Chang Hsu , Yao-Jhan Wang , Meng-Yun Wu , Chun-Jen Huang
IPC分类号: H01L21/768 , H01L21/02 , H01L29/66
CPC分类号: H01L21/76829 , H01L21/02041 , H01L21/02293 , H01L21/02529 , H01L21/02532 , H01L29/66795
摘要: A semiconductor device and method of fabricating the same include a substrate, a first epitaxial layer, a first protection layer, and a contact etching stop layer. The substrate includes a PMOS transistor region, and the first epitaxial layer is disposed on the substrate, within the PMOS transistor region. The first protection layer is disposed on the first epitaxial layer, covering surfaces of the first epitaxial layer. The contact etching stop layer is disposed on the first protection layer and the substrate, wherein a portion of the first protection layer is exposed from the contact etching stop layer.
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公开(公告)号:US11869765B2
公开(公告)日:2024-01-09
申请号:US17853990
申请日:2022-06-30
发明人: Gyeom Kim , Dongwoo Kim , Jihye Yi , Jinbum Kim , Sangmoon Lee , Seunghun Lee
IPC分类号: H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8234 , H01L23/485 , H01L29/06 , H01L29/08 , H01L29/165 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/78 , H01L29/786 , H01L23/532 , B82Y10/00 , H01L29/10 , H01L29/161 , H01L21/28
CPC分类号: H01L21/02293 , H01L21/28518 , H01L21/76897 , H01L21/823431 , H01L21/823481 , H01L23/485 , H01L29/0673 , H01L29/0847 , H01L29/165 , H01L29/41766 , H01L29/41791 , H01L29/42392 , H01L29/6656 , H01L29/66439 , H01L29/66553 , H01L29/775 , H01L29/7848 , H01L29/78696
摘要: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.
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公开(公告)号:US11848202B2
公开(公告)日:2023-12-19
申请号:US17456967
申请日:2021-11-30
发明人: Zhepeng Cong , Mostafa Baghbanzadeh , Tao Sheng , Enle Choo
CPC分类号: H01L21/02293 , C23C16/4412 , C23C16/455 , C23C16/463 , C23C16/52 , G01B17/02 , G01B17/025
摘要: The present disclosure generally relates to process chambers for semiconductor processing. In one embodiment, a growth monitor for substrate processing is provided. The growth monitor includes a sensor holder and a crystal disposed in the sensor holder having a front side and a back side. An opening is formed in the sensor holder exposing a front side of the crystal. A gas inlet is disposed through the sensor holder to a plenum formed by the back side of the crystal and the sensor holder. A gas outlet is fluidly coupled to the plenum.
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公开(公告)号:US20230402280A1
公开(公告)日:2023-12-14
申请号:US18232881
申请日:2023-08-11
发明人: Kazuki TANEMURA , Shota SAMBONSUGE , Naoki OKUNO
CPC分类号: H01L21/02266 , C23C14/08 , C23C14/34 , H01L21/02172 , H01L21/02293
摘要: A method for depositing a metal oxynitride film by epitaxial growth at a low temperature is provided. It is a method for manufacturing a metal oxynitride film, in which the metal oxynitride film is epitaxially grown on a single crystal substrate by a sputtering method using an oxide target with a gas containing a nitrogen gas introduced. The oxide target contains zinc, the substrate during the deposition of the metal oxynitride film is higher than or equal to 80° C. and lower than or equal to 400° C., and the flow rate of the nitrogen gas is greater than or equal to 50% and lower than or equal to 100% of the total flow rate of the gas.
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