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公开(公告)号：US10667410B2
公开(公告)日：2020-05-26
申请号：US15842310
申请日：2017-12-14
发明人： James J. Rathburn
IPC分类号： H05K3/20 , H05K3/46 , H05K3/00 , H05K3/18 , H05K3/06 , H01L21/48 , H05K3/42 , H01L23/538 , H01L23/66 , H05K1/11
摘要： A method of making a fusion bonded circuit structure. Each major surface of an LCP substrate is provided with a seed layers of a conductive material. Resist layers are deposited on the seed layers. The resist layers are processed to create recesses corresponding to a desired circuitry layers on each side of the LCP substrate. The recesses expose portions of the seed layers of conductive material. The LCP substrate is electroplated to simultaneously create conductive traces defined by the first recesses on both sides of the LCP substrate. The resist layers are removed to reveal the conductive traces. The LCP substrate is etched to remove exposed portions of the seed layers adjacent the conductive traces. LCP layers are fusion bonded to the major surfaces of the LCP substrate to encapsulate the conductive traces in an LCP material. The LCP layers can be laser drilled to expose the conductive traces.
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2.发明申请公开(公告)号：US20180012832A1
公开(公告)日：2018-01-11
申请号：US15698271
申请日：2017-09-07
发明人： James J. Rathburn
IPC分类号： H01L23/498 , H01L21/48 , H01R12/52 , H05K3/32 , H05K3/36
CPC分类号： H01L23/49861 , H01L21/4853 , H01L21/486 , H01L23/49811 , H01L23/49827 , H01L2224/16145 , H01L2224/16238 , H01R12/52 , H05K3/32 , H05K3/368 , H05K2201/10189 , H05K2201/10734 , H05K2201/10962
摘要： An electrical connectors with electrodeposited terminals that are grown in place by electroplating cavities formed in a series of resist layers. The resist layers are subsequently stripped away. The resulting terminal shape is defined by the shape of the cavity created in the resist layers. Complex terminal shapes are possible. The present conductive terminals are particularly useful for electrical interconnects and semiconductor packaging substrates.
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3.发明申请公开(公告)号：US20160276763A1
公开(公告)日：2016-09-22
申请号：US15062138
申请日：2016-03-06
发明人： James J. Rathburn
IPC分类号： H01R12/70 , H01R43/20 , H01R13/405 , H01R12/71
CPC分类号： H01R12/7076 , H01R12/7082 , H01R13/405 , H01R43/205 , H05K3/3436 , H05K2201/10325 , Y02P70/613
摘要： An electrical interconnect and a method of making the same. A plurality of contact members are located in through holes in a substrate so distal portions of the contact members extend above a first surface of the substrate in a cantilevered configuration and proximal portions of the contact members are accessible along a second surface of the substrate. A flowable polymeric material located on the second surface of the substrate is fusion bonded to the proximal portions of the contact members so the flowable polymeric material substantially seals the through holes in the substrate. An insulator housing is bonded to the first surface of the substrate with the distal portions of the contact members located in through holes in an insulator housing, so the distal portions are accessible from a second surface of the insulator housing.
摘要翻译： 电互连及其制作方法。 多个接触构件位于衬底中的通孔中，使得接触构件的远侧部分以悬臂结构在衬底的第一表面上方延伸，并且接触构件的近侧部分沿着衬底的第二表面可访问。 位于基底的第二表面上的可流动的聚合物材料被熔接在接触构件的近端部分上，因此可流动的聚合物材料基本上密封基底中的通孔。 绝缘体外壳接合到基板的第一表面，其中接触构件的远端位于绝缘体外壳的通孔中，因此远端部分可从绝缘体外壳的第二表面接近。
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公开(公告)号：US09076884B2
公开(公告)日：2015-07-07
申请号：US14086029
申请日：2013-11-21
发明人： James Rathburn
IPC分类号： H01L21/00 , H01L23/00 , H01L23/498 , H01L23/538 , H05K1/18
CPC分类号： H01L24/82 , H01L23/49811 , H01L23/5389 , H01L24/18 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/20 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/12044 , H01L2924/1306 , H01L2924/14 , H01L2924/15153 , H01L2924/15174 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3011 , H01L2924/3025 , H05K1/185 , H01L2924/00
摘要： A method of making a package for a semiconductor device having electrical terminals. At least one semiconductor device is located on a substrate. A first dielectric layer is printed on at least a portion of the semiconductor device to include first recesses aligned with a plurality of the electrical terminals. A conductive material is deposited in the first recesses forming contact members. A second dielectric layer is printed on at least a portion of the first dielectric layer to include second recesses aligned with a plurality of the first recesses. A conductive material is deposited in at least a portion of the second recesses to include a circuit geometry and a plurality of exposed terminals. A compliant material is deposited in recesses in one or more of the first and second dielectric layers adjacent to a plurality of the exposed terminals.
摘要翻译： 一种制造具有电端子的半导体器件的封装的方法。 至少一个半导体器件位于衬底上。 在半导体器件的至少一部分上印刷第一电介质层以包括与多个电端子对准的第一凹部。 在形成接触构件的第一凹部中沉积导电材料。 第二电介质层印刷在第一电介质层的至少一部分上，以包括与多个第一凹槽对准的第二凹槽。 导电材料沉积在第二凹槽的至少一部分中以包括电路几何形状和多个暴露端子。 兼容材料沉积在与多个暴露端子相邻的第一和第二电介质层中的一个或多个中的凹槽中。
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公开(公告)号：US20150091600A1
公开(公告)日：2015-04-02
申请号：US14565724
申请日：2014-12-10
发明人： JAMES RATHBURN
CPC分类号： G01R1/0466 , Y10T29/49222
摘要： A test socket for IC devices includes a multi-layered socket housing with at least one center layer and first and second surface layers. The first and second surface layers have a thickness and dielectric constant less than that of the center layers. A plurality of contact members are located in center openings in the center layer with distal ends extending into openings in the first and second layers. The distal ends of the contact members having at least one dimension greater than the openings in the first and second surface layers to retain the contact members in the socket housing. The contact members include center portions with major diameters less than the diameters of the center openings, such that an air gap is maintained between the contact members and the center layer.
摘要翻译： 用于IC器件的测试插座包括具有至少一个中心层和第一和第二表面层的多层插座外壳。 第一和第二表面层的厚度和介电常数小于中心层的厚度和介电常数。 多个接触构件位于中心层的中心开口中，其远端延伸到第一层和第二层中的开口中。 接触构件的远端具有比第一和第二表面层中的开口更大的至少一个尺寸，以将接触构件保持在插座壳体中。 接触构件包括具有小于中心开口的直径的中心部分，使得在接触构件和中心层之间保持气隙。
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公开(公告)号：US20140043782A1
公开(公告)日：2014-02-13
申请号：US14058863
申请日：2013-10-21
发明人： James Rathburn
IPC分类号： H01L23/522 , H05K3/40
CPC分类号： H01L23/34 , G01R1/0416 , H01L23/522 , H01L2224/13 , H05K3/325 , H05K3/4007 , H05K2201/0133 , H05K2201/0187 , H05K2201/09036 , H05K2201/09481 , H05K2201/0949 , H05K2201/10378 , H05K2203/162 , Y10T29/49165
摘要： An electrical interconnect between terminals on an IC device and contact pads on a printed circuit board (PCB). The electrical interconnect includes a substrate with a first surface having a plurality of openings arranged to correspond to the terminals on the IC device. A compliant material is located in the openings. A plurality of first conductive traces extend along the first surface of the substrate and onto the compliant material. The compliant material provides a biasing force that resists flexure of the first conductive traces into the openings. Vias extending through the substrate are electrically coupled the first conductive traces. A plurality of second conductive traces extend along the second surface of the substrate and are electrically coupled to a vias. The second conductive traces are configured to electrical couple with the contact pads on the PCB.
摘要翻译： IC器件上的端子和印刷电路板（PCB）上的接触焊盘之间的电气互连。 电互连包括具有第一表面的基板，该第一表面具有多个开口，其布置成对应于IC器件上的端子。 柔性材料位于开口中。 多个第一导电迹线沿着衬底的第一表面延伸到柔性材料上。 柔性材料提供抵抗第一导电迹线弯曲到开口中的偏压力。 延伸穿过衬底的通孔电耦合第一导电迹线。 多个第二导电迹线沿着衬底的第二表面延伸并且电耦合到通孔。 第二导电迹线被配置为与PCB上的接触焊盘电耦合。
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公开(公告)号：US10159154B2
公开(公告)日：2018-12-18
申请号：US14864215
申请日：2015-09-24
发明人： James Rathburn
IPC分类号： H05K3/46 , C25D7/12 , H05K1/03 , C25D5/02 , C23C18/16 , H05K3/42 , B23K103/12 , B23K103/00 , C23C18/38
摘要： A method of making a multilayered, fusion bonded circuit structure. A first circuitry layer is attached to a first major surface of a first LCP substrate. A plurality of first recesses are formed that extend from a second major surface of the first substrate to the first circuitry layer. The first recesses are then plated to form a plurality of first conductive pillars of solid metal that substantially fill the first recesses. A plurality of second recesses are formed in a second LCP substrate corresponding to a plurality of the first conductive pillars. The second recess are plated to form a plurality of second conductive structures that extend between first and second major surfaces of the second substrate. The second major surface of the first substrate is positioned adjacent to the second major surface of the second substrate. The first conductive pillars are aligned with the second conductive structures. The stack is then fusion bonded to mechanically couple the first conductive pillars to the second conductive structures.
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8.发明授权公开(公告)号：US09699906B2
公开(公告)日：2017-07-04
申请号：US14408205
申请日：2013-03-13
发明人： James Rathburn
CPC分类号： H05K1/181 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H05K1/0216 , H05K1/0256 , H05K1/0284 , H05K1/16 , H05K3/107 , H05K3/4664 , H05K3/4694 , H05K2201/0344 , H05K2201/10674 , H05K2201/10734 , Y10T29/49155 , H01L2924/00014
摘要： A high density region for a low density circuit. At least a first liquid dielectric layer is deposited on the first surface of a first circuitry layer. The dielectric layer is imaged to create plurality of first recesses. Surfaces of the first recesses are plated electro-lessly with a conductive material to form first conductive structures electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A plating resist is applied. A conductive material is electro-plated to the first conductive structure to substantially fill the first recesses, and the plating resist is removed.
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公开(公告)号：US09689897B2
公开(公告)日：2017-06-27
申请号：US14565724
申请日：2014-12-10
发明人： James Rathburn
IPC分类号： G01R1/04
CPC分类号： G01R1/0466 , Y10T29/49222
摘要： A test socket for IC devices includes a multi-layered socket housing with at least one center layer and first and second surface layers. The first and second surface layers have a thickness and dielectric constant less than that of the center layers. A plurality of contact members are located in center openings in the center layer with distal ends extending into openings in the first and second layers. The distal ends of the contact members having at least one dimension greater than the openings in the first and second surface layers to retain the contact members in the socket housing. The contact members include center portions with major diameters less than the diameters of the center openings, such that an air gap is maintained between the contact members and the center layer.
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公开(公告)号：US20160276762A1
公开(公告)日：2016-09-22
申请号：US15062136
申请日：2016-03-06
发明人： James J. Rathburn
IPC分类号： H01R12/70 , H01R43/20 , H01R13/405 , H01R12/71
CPC分类号： H01R12/7076 , H01R12/7082 , H01R13/405 , H01R43/205 , H05K3/3436 , H05K2201/10325 , Y02P70/613
摘要： An electrical connector and a method of make the same. The electrical connector includes an insulator housing formed with a plurality of through holes extending from a first surface to a second surface of the insulator housing. A flowable polymeric material is located adjacent at least one retention region in each of the through holes. Contact members are positioned within each of the through holes. Energy and/or pressure is applied to the electrical connector so the flowable polymeric material flows into engagement with retention features on the contact members. The electrical connector is cooled so the flowable polymeric material fuses to the contact members in a retention regions.
摘要翻译： 电连接器及其制造方法。 电连接器包括形成有从绝缘体外壳的第一表面延伸到第二表面的多个通孔的绝缘体外壳。 可流动的聚合材料位于每个通孔中的至少一个保持区域附近。 接触构件位于每个通孔内。 能量和/或压力被施加到电连接器，使得可流动的聚合物材料流入与接触构件上的保留特征的接合。 电连接器被冷却，使得可流动的聚合材料在保持区域中熔化到接触构件。
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