公开(公告)号：US06446818B1

公开(公告)日：2002-09-10

申请号：US09636515

申请日：2000-08-10

申请人： Ajit M. Dubey ,  Raj N. Master ,  Ot Ong ,  C S Chan

发明人： Ajit M. Dubey ,  Raj N. Master ,  Ot Ong ,  C S Chan

IPC分类号： A47F700

CPC分类号： H01L21/67333 ,  H01L21/67028 ,  H01L2221/68313

摘要： A boat for cleaning semiconductor packages, including cleaning ball grid array packages in centrifugal cleaners. The boat includes a bottom plate with receptacles for receiving semiconductor packages and a top plate having through holes, where each through hole is smaller than the receptacle with which it corresponds in the bottom plate. An alignment mechanism ensures that the top plate is aligned with the bottom plate in a manner that results in each through hole being positioned directly over a respective one of the receptacles. An attachment mechanism releasably attaches the top plate to the bottom plate in a co-planar relationship that results in the presence of a vertical space between the two plates.

摘要翻译： 用于清洁半导体封装的船，包括清洁球栅阵列包装在离心清洁器中。 船包括具有用于接收半导体封装的插座的底板和具有通孔的顶板，其中每个通孔小于在底板中与其对应的插座。 对准机构确保顶板与底板对齐，使得每个通孔直接定位在相应的一个容器上。 附接机构以平行关系可释放地将顶板附接到底板，导致两个板之间存在垂直空间。

公开(公告)号：US06333210B1

公开(公告)日：2001-12-25

申请号：US09577675

申请日：2000-05-25

申请人： Ajit M. Dubey ,  Raj N. Master

发明人： Ajit M. Dubey ,  Raj N. Master

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K1/0269 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/613

摘要： A method of maintaining z-height of an integrated circuit component, such as a multi-chip module, a chip or a die, and of visualizing alignment of an integrated circuit package during positioning of an integrated circuit component, is disclosed. The method maintains the z-height of an integrated circuit component during a solder reflow step by applying high-melting solder balls to interconnect pads on the package substrate surface. Such high-melting solder balls, for instance 90 Pb/10 Sn, do not collapse at temperatures sufficient to accomplish reflowing. The high-melting solder balls also make convenient visualization marks for alignment of the package substrate on an integrated circuit component placement tool, such as a die placement tool. A package substrate bearing high-melting solder balls in a pre-determined pattern is easily aligned by an integrated circuit placement tool using machine vision. Use of high-melting solder balls as visualization marks obviates the need for screen-printing of fiducial marks on the package substrate surface.

摘要翻译： 公开了一种在集成电路部件的定位期间保持诸如多芯片模块，芯片或芯片的集成电路部件的z高度以及集成电路封装的可视化对准的方法。 该方法通过施加高熔点焊球以在封装衬底表面上互连焊盘来在焊料回流步骤期间保持集成电路部件的z高度。 这种高熔点焊球，例如90 Pb / 10 Sn，在足以完成回流的温度下不会塌陷。 高熔点焊球还使得集成电路部件放置工具（例如管芯放置工具）上的封装基板对准的便利的可视标记。 通过使用机器视觉的集成电路放置工具容易地对准以预定图案承载高熔点焊球的封装衬底。 使用高熔点焊球作为可视化标记避免了在封装衬底表面上对基准标记进行丝网印刷的需要。

公开(公告)号：US06591992B1

公开(公告)日：2003-07-15

申请号：US10227382

申请日：2002-08-26

申请人： Ajit M. Dubey ,  Raj N. Master ,  Ong Ot ,  Chan Cs

发明人： Ajit M. Dubey ,  Raj N. Master ,  Ong Ot ,  Chan Cs

IPC分类号： A47F700

CPC分类号： H01L21/67333 ,  H01L21/67028 ,  H01L2221/68313

摘要： A boat for cleaning semiconductor packages, including cleaning ball grid array packages in centrifugal cleaners. The boat includes a bottom plate with receptacles for receiving semiconductor packages and a top plate having through holes, where each through hole is smaller than the receptacle with which it corresponds in the bottom plate. An alignment mechanism ensures that the top plate is aligned with the bottom plate in a manner that results in each through hole being positioned directly over a respective one of the receptacles. An attachment mechanism releasably attaches the top plate to the bottom plate in a co-planar relationship that results in the presence of a vertical space between the two plates.

公开(公告)号：US07923850B2

公开(公告)日：2011-04-12

申请号：US12198227

申请日：2008-08-26

申请人： Mohammad Khan ,  Jun Zhai ,  Ranjit Gannamani ,  Raj N. Master

发明人： Mohammad Khan ,  Jun Zhai ,  Ranjit Gannamani ,  Raj N. Master

IPC分类号： H01L23/448 ,  H01L21/56

CPC分类号： H01L23/16 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/562 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/0401

摘要： Various semiconductor chip arrangements and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip that has an external peripheral wall to a first side of a substrate. A first metallic ring is coupled to the first side of the substrate. The first metallic ring has an internal peripheral wall that frames the semiconductor chip and is separated from the external peripheral wall by a gap. The first metallic ring has a coefficient of thermal expansion less than about 6.0 10−6 K−1.

摘要翻译： 公开了各种半导体芯片布置及其制造方法。 一方面，提供一种制造方法，其包括将具有外周壁的半导体芯片与基板的第一侧耦合。 第一金属环耦合到衬底的第一侧。 第一金属环具有框架半导体芯片并且与外周壁隔开间隙的内周壁。 第一金属环的热膨胀系数小于约6.0×10 -6 K -1。

公开(公告)号：US20080227310A1

公开(公告)日：2008-09-18

申请号：US11687529

申请日：2007-03-16

申请人： Seah Sun Too ,  Raj N. Master ,  Jacquana Diep ,  Mohammad Khan

发明人： Seah Sun Too ,  Raj N. Master ,  Jacquana Diep ,  Mohammad Khan

IPC分类号： H01R12/00

CPC分类号： H01L23/433 ,  H01L23/467 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2924/3511 ,  H01R12/7076 ,  H05K7/1061 ,  H01L2224/0401

摘要： Various sockets for packaged integrated circuits and methods of making the same are provided. In one aspect, a method of mounting a semiconductor chip is provided that includes providing a package that has a base substrate with a first side and a second side opposite the first side. The second side has a central region. The package includes a semiconductor chip and a lid coupled to the first side. A socket is provided for receiving the base substrate. The socket includes a mound that projects toward the second side of the base substrate when the base substrate is seated in the socket to provide support for the central region of the base substrate. The package is mounted in the socket. The mound provides support for the central region of the base substrate.

摘要翻译： 提供了用于封装集成电路的各种插座及其制造方法。 一方面，提供了一种安装半导体芯片的方法，其包括提供具有第一侧和与第一侧相对的第二侧的基底的封装。 第二边有一个中部地区。 该封装包括半导体芯片和连接到第一侧的盖子。 提供了用于接收基底的插座。 插座包括当基底座位于插座中时朝向基底基板的第二侧突出的墩，以为基底基板的中心区域提供支撑。 包装安装在插座中。 土丘为基底的中心区域提供支撑。

公开(公告)号：US06372544B1

公开(公告)日：2002-04-16

申请号：US09599530

申请日：2000-06-23

申请人： Jonathan D. Halderman ,  Raj N. Master

发明人： Jonathan D. Halderman ,  Raj N. Master

IPC分类号： H01L2144

CPC分类号： H01L21/563 ,  H01L24/31 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83859 ,  H01L2224/83951 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/05599

摘要： A softened and compliant fillet portion of a cured polymeric underfill in a flip-chip arrangement reduces occurences of fillet crackings caused by thermal stresses. The softening of the fillet is achieved by chemically breaking cross-links in the cured polymeric underfill material using a chemical solvent. In another embodiment, the softening of the fillet is achieved by applying heat using a controllable beam of thermal energy to break up the cross-links to thereby soften the fillet.

摘要翻译： 固化的聚合物底部填充物的软化且柔顺的圆角部分以倒装芯片布置减少了由热应力引起的圆角裂纹的发生。 通过使用化学溶剂化学破坏固化的聚合物底部填充材料中的交联来实现圆角的软化。 在另一个实施例中，通过使用可控的热能束施加热来实现圆角的软化，以分解交联以便软化圆角。

公开(公告)号：US5543584A

公开(公告)日：1996-08-06

申请号：US843684

申请日：1992-02-28

申请人： Edward F. Handford ,  Joseph M. Harvilchuck ,  Mario J. Interrante ,  Raymond A. Jackson ,  Raj N. Master ,  Sudipta K. Ray ,  William E. Sablinski ,  Thomas A. Wassick

发明人： Edward F. Handford ,  Joseph M. Harvilchuck ,  Mario J. Interrante ,  Raymond A. Jackson ,  Raj N. Master ,  Sudipta K. Ray ,  William E. Sablinski ,  Thomas A. Wassick

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L23/498 ,  H01L23/52 ,  H01L23/525 ,  H01L23/538 ,  H05K3/00 ,  H05K3/02 ,  H05K3/22 ,  H05K3/34 ,  H05K1/11

CPC分类号： H01L21/76892 ,  H01L23/49866 ,  H01L23/525 ,  H05K3/225 ,  H01L2924/0002 ,  H05K2201/10181 ,  H05K2201/10234 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2203/0769 ,  H05K2203/107 ,  H05K2203/121 ,  H05K2203/173 ,  H05K2203/175 ,  H05K3/0017 ,  H05K3/027 ,  H05K3/34 ,  Y10T29/49124

摘要： The present invention relates generally to a new method of repairing electrical lines, and more particularly to repairing electrical lines having an opening at the module level with devices in place. Various methods and processes are used to repair this open or defective portion in an electrical conductor line. It could be repaired by securing a jumper wire or nugget across the open or the repair could be made by a deposition process, which includes but is not limited to filling the opening with a solder type material or inserting a solder coated electrical wire and heating the solder and allowing the solder to melt and repair the open. One of the attributes of this invention is the ability to repair on a substrate or module on which active components such as chips, and passive components such as pins, capacitors, etc. have been attached. The invention also allows repair of fine line patterns which are normally not repairable by conventional techniques.

摘要翻译： 本发明一般涉及一种修复电线的新方法，更具体地说，涉及在装置的适当位置修复具有模块级开口的电线。 使用各种方法和过程来修复电导体线中的这个开路或有缺陷的部分。 它可以通过将跨接线或熔核固定在整个开口处进行修复，或者可以通过沉积工艺进行修复，该沉积工艺包括但不限于用焊料型材料填充开口或插入焊料涂覆的电线并加热 焊接并允许焊料熔化并修复开路。 本发明的一个特征是在其上附着有诸如引脚，电容器等的诸如芯片和无源部件的有源部件的基板或模块上进行修复的能力。 本发明还允许修复通常不能通过常规技术修复的细线图案。

公开(公告)号：US4234367A

公开(公告)日：1980-11-18

申请号：US23112

申请日：1979-03-23

申请人： Lester W. Herron ,  Raj N. Master ,  Rao R. Tummala

发明人： Lester W. Herron ,  Raj N. Master ,  Rao R. Tummala

IPC分类号： H05K3/46 ,  C03C10/00 ,  C03C27/00 ,  H01L21/48 ,  H01L23/52 ,  H05K1/00 ,  H05K1/03 ,  B32B31/24 ,  C03B32/00 ,  C04B39/00

CPC分类号： C03C10/0045 ,  C03C10/00 ,  C03C27/00 ,  H01L21/4807 ,  H01L21/4867 ,  H01L2924/01078 ,  H05K1/0306 ,  H05K3/4629 ,  H05K3/4676

摘要： The formation of sintered glass-ceramic substrates containing multi-level, interconnected thick-film circuit patterns of copper-based conductors obtained by firing in a controlled ambient of hydrogen and H.sub.2 O at temperatures below the melting point of copper.

摘要翻译： 形成烧结的玻璃 - 陶瓷衬底，其包含铜基导体的多层互连厚膜电路图案，其通过在低于铜熔点的温度下在受控环境的氢气和H 2 O中进行烧制获得。

公开(公告)号：US20080124841A1

公开(公告)日：2008-05-29

申请号：US11462993

申请日：2006-08-07

申请人： Seah Sun Too ,  Raj N. Master ,  Jacquana Diep ,  Mohammad Khan

发明人： Seah Sun Too ,  Raj N. Master ,  Jacquana Diep ,  Mohammad Khan

IPC分类号： H01L21/58

CPC分类号： H01L23/10 ,  H01L24/32 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/16152 ,  H01L2924/166 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/0401

摘要： Various method and apparatus for packaging an integrated circuit are provided. In one aspect, a method of packaging an integrated circuit is provided that includes coupling an integrated circuit to a substrate, mixing an adhesive with a plurality of particles, and coupling a lid to the substrate with the adhesive. At least a portion of the plurality of particles in the adhesive oppose compressive force from the lid to restrict rotation of the lid relative to the substrate.

摘要翻译： 提供了用于封装集成电路的各种方法和装置。 一方面，提供一种封装集成电路的方法，其包括将集成电路耦合到基板，将粘合剂与多个颗粒混合，以及用盖子将盖子与粘合剂连接。 粘合剂中多个颗粒的至少一部分与来自盖的压缩力相反，以限制盖相对于基底的旋转。

公开(公告)号：US20070284737A1

公开(公告)日：2007-12-13

申请号：US11422795

申请日：2006-06-07

申请人： Seah Sun Too ,  Hsiang Wan Liau ,  Janet Kirkland ,  Tek Seng Tan ,  Maxat Touzelbaev ,  Raj N. Master

发明人： Seah Sun Too ,  Hsiang Wan Liau ,  Janet Kirkland ,  Tek Seng Tan ,  Maxat Touzelbaev ,  Raj N. Master

IPC分类号： H01L23/48

CPC分类号： H01L23/42 ,  H01L23/367 ,  H01L23/3736 ,  H01L23/4338 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2924/3511

摘要： Thermal interface materials and method of using the same in packaging are provided. In one aspect, a thermal interface material is provided that includes an indium preform that has a first surface and a second surface opposite to the first surface, an interior portion and a peripheral boundary. The indium preform has a channel extending from the peripheral boundary towards the interior portion. The channel enables flux to liberate during thermal cycling.

摘要翻译： 提供热界面材料及其在包装中的使用方法。 在一个方面，提供一种热界面材料，其包括具有第一表面和与第一表面相对的第二表面的铟预制件，内部部分和外围边界。 铟预制件具有从周边边界向内部延伸的通道。 该通道使热通量在热循环期间释放。