公开(公告)号：US09526285B2

公开(公告)日：2016-12-27

申请号：US13717909

申请日：2012-12-18

申请人： Aleksandar Aleksov ,  Ravindranath V. Mahajan ,  Sairam Agraharam ,  Ian A. Young ,  John C. Johnson ,  Debendra Mallik ,  John S. Guzek

发明人： Aleksandar Aleksov ,  Ravindranath V. Mahajan ,  Sairam Agraharam ,  Ian A. Young ,  John C. Johnson ,  Debendra Mallik ,  John S. Guzek

IPC分类号： H05K1/02 ,  H05K3/30 ,  A41D31/00 ,  H05K1/03 ,  H05K1/18 ,  H05K3/32 ,  H05K3/34

CPC分类号： A41D31/00 ,  H05K1/0274 ,  H05K1/038 ,  H05K1/188 ,  H05K3/323 ,  H05K3/3436 ,  Y10T29/4913

摘要： A flexible computing fabric and a method of forming thereof. The flexible computing fabric includes an electronic substrate including one or more channels and including at least two ends. At least one computational element is mounted on the electronic substrate between the two ends and at least one functional element is mounted on the electronic substrate between the two ends. The channels form an interconnect between the elements. In addition, the electronic substrate is flexible and exhibits a flexural modulus in the range of 0.1 GPa to 30 GPa.

摘要翻译： 一种灵活的计算结构及其形成方法。 柔性计算结构包括包括一个或多个通道并且包括至少两个端部的电子基板。 至少一个计算元件安装在两端之间的电子基板上，并且至少一个功能元件安装在两端之间的电子基板上。 通道形成元件之间的互连。 此外，电子基板是柔性的并且具有在0.1GPa至30GPa范围内的挠曲模量。

公开(公告)号：US20140166080A1

公开(公告)日：2014-06-19

申请号：US13717186

申请日：2012-12-17

申请人： Aleksandar Aleksov ,  Brian S. Doyle ,  Ravindranath V. Mahajan

发明人： Aleksandar Aleksov ,  Brian S. Doyle ,  Ravindranath V. Mahajan

IPC分类号： H01L31/048 ,  H01L31/0203 ,  H01G9/20 ,  H01L31/0232

CPC分类号： H01L31/0488 ,  H01L27/301 ,  H02S20/26 ,  Y02B10/10 ,  Y02E10/50

摘要： An apparatus for collecting solar energy, including a first panel, wherein the first panel allows at least 50% of incident light having a wavelength in the range of 1 nm to 1,500 nm to pass through said panel and a second panel, wherein the second panel allows at least 50% of incident light having a wavelength in the range of 410 nm to 650 nm to pass through said panel. A photovoltaic cell is disposed between the first panel and second panel, which includes a first electrode disposed adjacent to the first panel, a second electrode disposed adjacent to the second panel, a photovoltaic component contacting the first and second electrodes. The photovoltaic component absorbs at least 50% of light having a wavelength in one of the following ranges: greater than 650 nm, less than 410 nm and combinations thereof.

摘要翻译： 一种用于收集太阳能的装置，包括第一面板，其中所述第一面板允许波长在1nm至1,500nm范围内的至少50％的入射光通过所述面板和第二面板，其中所述第二面板 允许波长在410nm至650nm范围内的至少50％的入射光通过所述面板。 光伏电池设置在第一面板和第二面板之间，其包括邻近第一面板设置的第一电极，邻近第二面板设置的第二电极，与第一和第二电极接触的光伏组件。 光伏组件吸收至少50％的具有以下范围之一的波长的光：大于650nm，小于410nm及其组合。

公开(公告)号：US20150255411A1

公开(公告)日：2015-09-10

申请号：US14198509

申请日：2014-03-05

申请人： Omkar G. Karhade ,  Debendra Mallik ,  Ravindranath V. Mahajan ,  Amruthavalli P. Alur

发明人： Omkar G. Karhade ,  Debendra Mallik ,  Ravindranath V. Mahajan ,  Amruthavalli P. Alur

IPC分类号： H01L23/00 ,  G06F1/16 ,  H01L23/36

CPC分类号： H01L24/09 ,  G06F1/1658 ,  G06F1/1686 ,  G06F1/1688 ,  G06F1/1694 ,  G06F1/1698 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0807 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/1703 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/80138 ,  H01L2224/8085 ,  H01L2224/80897 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/83127 ,  H01L2224/83129 ,  H01L2224/83855 ,  H01L2224/92242 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2924/00012

摘要： Embodiments of the present disclosure are directed towards die-to-die bonding and associated integrated circuit (IC) package configurations. In one embodiment, a package assembly includes a package substrate having a solder resist layer disposed on a first side and a second side disposed opposite to the first side, a first die mounted on the first side and having an active side that is electrically coupled with the package substrate by one or more first die-level interconnects and a second die bonded with the active side of the first die using one or more second die-level interconnects, wherein at least a portion of the second die is disposed in a cavity that extends into the solder resist layer. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及芯片到芯片的结合和相关联的集成电路（IC）封装配置。 在一个实施例中，封装组件包括封装衬底，其具有设置在第一侧上的阻焊层和与第一侧相对设置的第二侧，安装在第一侧上的第一管芯，并且具有与 所述封装衬底通过一个或多个第一裸片级互连和使用一个或多个第二管芯级互连件与所述第一管芯的所述有源侧接合的第二管芯，其中所述第二管芯的至少一部分设置在腔中， 延伸到阻焊层中。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20140167688A1

公开(公告)日：2014-06-19

申请号：US13716376

申请日：2012-12-17

申请人： Brian S. Doyle ,  Aleksandar Aleksov ,  Ravindranath V. Mahajan

发明人： Brian S. Doyle ,  Aleksandar Aleksov ,  Ravindranath V. Mahajan

IPC分类号： H02J7/00

CPC分类号： H02J7/0004 ,  H02J7/0013 ,  H02J7/0042 ,  H02J7/0044 ,  H02J7/025 ,  H02J50/00 ,  H02J50/10 ,  H02J50/12 ,  H02J50/40 ,  H02J50/70 ,  H02J50/80 ,  Y02B40/90 ,  Y02E60/12

摘要： A wireless charging system includes a microelectronic package (110) containing a system on chip (120) (an SoC), an energy transfer unit (140), and a software protocol (127). The SoC includes a processing device (121), a memory device (122) coupled to the processing device, and a communications device (123) coupled to the processing device and the memory device. The communications device is capable of communicating wirelessly with an external electronic device (130). The energy transfer unit is capable of transferring energy to the external electronic device. The software protocol is implemented in the memory device and is capable of detecting a charging profile of the external electronic device and capable of adjusting a parameter of the energy transfer unit according to a requirement of the charging profile.

摘要翻译： 一种无线充电系统包括一个包含片上系统（SoC），能量传输单元（140）和软件协议（127）的微电子封装（110）。 SoC包括处理设备（121），耦合到处理设备的存储设备（122）以及耦合到处理设备和存储设备的通信设备（123）。 通信设备能够与外部电子设备（130）进行无线通信。 能量传递单元能够将能量传递到外部电子设备。 软件协议在存储装置中实现，能够检测外部电子装置的充电曲线，并且能够根据充电曲线的要求调整能量转移单元的参数。

公开(公告)号：US20140357020A1

公开(公告)日：2014-12-04

申请号：US13908016

申请日：2013-06-03

申请人： Aleksandar Aleksov ,  Ravindranath V. Mahajan ,  Omkar Karhade ,  Nitin Deshpande

发明人： Aleksandar Aleksov ,  Ravindranath V. Mahajan ,  Omkar Karhade ,  Nitin Deshpande

IPC分类号： H01L23/00

CPC分类号： H01L24/83 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/67709 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/15 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/82 ,  H01L24/92 ,  H01L24/96 ,  H01L2221/68309 ,  H01L2221/68313 ,  H01L2221/68331 ,  H01L2221/68363 ,  H01L2224/04105 ,  H01L2224/2101 ,  H01L2224/2919 ,  H01L2224/32237 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/8312 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00

摘要： The subject matter of the present description relates to methods for the precise integration of microelectronic dice within a multichip package which substantially reduce or eliminate any misalign caused by the movement of the microelectronic dice during the integration process. These methods may include the use of a temporary adhesive in conjunction with a carrier having at least one recess for microelectronic die alignment, the use of a precision molded carrier for microelectronic die alignment, the use of magnetic alignment of microelectronic dice on a reusable carrier, and/or the use of a temporary adhesive with molding processes on a reusable carrier.

摘要翻译： 本说明书的主题涉及用于在多芯片封装内精确地集成微电子管芯的方法，其基本上减少或消除了在整合过程期间由微电子管芯的移动引起的任何不对准。 这些方法可以包括使用临时粘合剂与具有用于微电子管芯对准的至少一个凹部的载体的使用，使用用于微电子管芯对准的精密模制载体，在可重复使用的载体上使用微电子骰子的磁对准， 和/或在可重复使用的载体上使用具有模制工艺的临时粘合剂。

公开(公告)号：US09368455B2

公开(公告)日：2016-06-14

申请号：US14229771

申请日：2014-03-28

申请人： Ravindranath V. Mahajan ,  John S. Guzek ,  Adel A. Elsherbini ,  Nitin Ashok Deshpande

发明人： Ravindranath V. Mahajan ,  John S. Guzek ,  Adel A. Elsherbini ,  Nitin Ashok Deshpande

IPC分类号： H01L23/00 ,  H01L23/552 ,  H01L21/56

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L21/568 ,  H01L24/16 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/81

摘要： An electromagnetic interference shield is described for semiconductor chip packages. In some embodiments, a package has a semiconductor die. a redistribution layer, a mold compound over the die, a plurality of vias through the mold compound and outside the die to form a shield, and a metal film over the vias. and over the mold compound.

摘要翻译： 半导体芯片封装描述了电磁干扰屏蔽。 在一些实施例中，封装具有半导体管芯。 再分布层，模具上的模具化合物，通过模具化合物的多个通孔和模具外部以形成屏蔽，以及在通孔上方的金属膜。 并在模具化合物上。

公开(公告)号：US20150279789A1

公开(公告)日：2015-10-01

申请号：US14229771

申请日：2014-03-28

申请人： Ravindranath V. Mahajan ,  John S. Guzek ,  Adel A. Elshebini ,  Nitin Ashok Deshpande

发明人： Ravindranath V. Mahajan ,  John S. Guzek ,  Adel A. Elshebini ,  Nitin Ashok Deshpande

IPC分类号： H01L23/552 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L21/568 ,  H01L24/16 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/81

摘要： An electromagnetic interference shield is described for semiconductor chip packages. In some embodiments, a package has a semiconductor die. a redistribution layer, a mold compound over the die, a plurality of vias through the mold compound and outside the die to form a shield, and a metal film over the vias. and over the mold compound.

摘要翻译： 半导体芯片封装描述了电磁干扰屏蔽。 在一些实施例中，封装具有半导体管芯。 再分布层，模具上的模具化合物，通过模具化合物的多个通孔和模具外部以形成屏蔽，以及在通孔上方的金属膜。 并在模具化合物上。

公开(公告)号：US06981849B2

公开(公告)日：2006-01-03

申请号：US10323084

申请日：2002-12-18

申请人： Sarah E. Kim ,  R. Scott List ,  James Maveety ,  Alan Myers ,  Quat T. Vu ,  Ravi Prasher ,  Ravindranath V. Mahajan

发明人： Sarah E. Kim ,  R. Scott List ,  James Maveety ,  Alan Myers ,  Quat T. Vu ,  Ravi Prasher ,  Ravindranath V. Mahajan

IPC分类号： F04B44/08

CPC分类号： F04B19/006 ,  H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure relates generally to microelectronic technology, and more specifically, to an apparatus used for the cooling of active electronic devices utilizing electro-osmotic pumps and micro-channels.

摘要翻译： 本公开一般涉及微电子技术，更具体地，涉及使用电渗透泵和微通道来冷却有源电子器件的装置。

公开(公告)号：US10685947B2

公开(公告)日：2020-06-16

申请号：US15869637

申请日：2018-01-12

申请人： Wilfred Gomes ,  Mark T. Bohr ,  Rajesh Kumar ,  Robert L. Sankman ,  Ravindranath V. Mahajan ,  Wesley D. Mc Cullough

发明人： Wilfred Gomes ,  Mark T. Bohr ,  Rajesh Kumar ,  Robert L. Sankman ,  Ravindranath V. Mahajan ,  Wesley D. Mc Cullough

IPC分类号： H01L23/48 ,  H01L25/18 ,  H01L25/00 ,  H01L23/00 ,  H01L23/538 ,  H01L23/522 ,  H01L25/16 ,  H01L25/065 ,  H01L23/498

摘要： The present disclosure is directed to systems and methods of conductively coupling a plurality of relatively physically small core dies to a relatively physically larger base die using an electrical mesh network that is formed in whole or in part in, on, across, or about all or a portion of the base die. Electrical mesh networks beneficially permit the positioning of the cores in close proximity to support circuitry carried by the base die. The minimal separation between the core circuitry and the support circuitry advantageously improves communication bandwidth while reducing power consumption. Each of the cores may include functionally dedicated circuitry such as processor core circuitry, field programmable logic, memory, or graphics processing circuitry. The use of core dies beneficially and advantageously permits the use of a wide variety of cores, each having a common or similar interface to the electrical mesh network.

公开(公告)号：US08609532B2

公开(公告)日：2013-12-17

申请号：US12787968

申请日：2010-05-26

申请人： Rajasekaran Swaminathan ,  Ravindranath V. Mahajan

发明人： Rajasekaran Swaminathan ,  Ravindranath V. Mahajan

IPC分类号： H01L21/4763

CPC分类号： H01L23/49822 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76898 ,  H01L23/49827 ,  H01L23/49866 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2224/05552

摘要： The present disclosure relates to the field of fabricating microelectronic packages, wherein microelectronic components of the microelectronic packages may have sintered conductive vias comprising sintered metal and magnetic particles.

摘要翻译： 本公开涉及制造微电子封装的领域，其中微电子封装的微电子部件可以具有包括烧结金属和磁性颗粒的烧结导电通孔。