公开(公告)号：US06566741B2

公开(公告)日：2003-05-20

申请号：US09425275

申请日：1999-10-21

申请人： Arthur K. Lin ,  Robert A. Anderson ,  Kuljeet Singh

发明人： Arthur K. Lin ,  Robert A. Anderson ,  Kuljeet Singh

IPC分类号： H01L2302

CPC分类号： H01L21/565 ,  H01L23/60 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： An apparatus and method for dissipating static electrical charge following a manufacturing operation is disclosed. A semiconductor package is provided with ground pads that are located to assure electrical contact with ejection pins used to translate the package from one position to another. Static electricity builds up on the semiconductor package. The ejection pins provide the pathway for dissipating static electrical charge out of the semiconductor package.

摘要翻译： 公开了一种用于在制造操作之后消散静电荷的装置和方法。 半导体封装设置有接地焊盘，其被定位成确保与用于将封装从一个位置转换到另一个位置的弹出销的电接触。 半导体封装产生静电。 喷射销提供用于将静电电荷从半导体封装中散出的路径。

公开(公告)号：US06764877B2

公开(公告)日：2004-07-20

申请号：US10374415

申请日：2003-02-25

申请人： Arthur K. Lin ,  Robert A. Anderson ,  Kuljeet Singh

发明人： Arthur K. Lin ,  Robert A. Anderson ,  Kuljeet Singh

IPC分类号： H01L2144

CPC分类号： H01L21/565 ,  H01L23/60 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： An apparatus and method for dissipating static electrical charge following a manufacturing operation is disclosed. A semiconductor package is provided with ground pads that are located to assure electrical contact with ejection pins used to translate the package from one position to another. Static electricity builds up on the semiconductor package. The ejection pins provide the pathway for dissipating static electrical charge out of the semiconductor package.

摘要翻译： 公开了一种用于在制造操作之后消散静电荷的装置和方法。 半导体封装设置有接地焊盘，其被定位成确保与用于将封装从一个位置转换到另一个位置的弹出销的电接触。 半导体封装产生静电。 喷射销提供用于将静电电荷从半导体封装中散出的路径。

公开(公告)号：US06885102B2

公开(公告)日：2005-04-26

申请号：US10228524

申请日：2002-08-26

申请人： Kuljeet Singh ,  Kevin E. Wells ,  Julius Delino

发明人： Kuljeet Singh ,  Kevin E. Wells ,  Julius Delino

IPC分类号： H01L23/498 ,  H05K1/11 ,  H05K1/16

CPC分类号： H05K1/111 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K2201/094 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10S439/907 ,  Y10T29/49126 ,  H01L2924/00

摘要： An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

摘要翻译： 描述了一种电子组件，其具有衬底和在衬底上的接触，其间隔开并且以允许更密集的接触布置的方式布置，但仍然允许在触点之间布置迹线。

公开(公告)号：US07064431B2

公开(公告)日：2006-06-20

申请号：US10993866

申请日：2004-11-18

申请人： Kuljeet Singh ,  Kevin E. Wells ,  Julius Delino

发明人： Kuljeet Singh ,  Kevin E. Wells ,  Julius Delino

IPC分类号： H05K1/16 ,  H01L23/04 ,  H01L23/48 ,  H01L29/40 ,  H01L23/52

CPC分类号： H05K1/111 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K2201/094 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10S439/907 ,  Y10T29/49126 ,  H01L2924/00

摘要： An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

摘要翻译： 描述了一种电子组件，其具有衬底和在衬底上的接触，其间隔开并且以允许更密集的接触布置的方式布置，但仍然允许在触点之间布置迹线。

公开(公告)号：US20050090125A1

公开(公告)日：2005-04-28

申请号：US10993866

申请日：2004-11-18

申请人： Kuljeet Singh ,  Kevin Wells ,  Julius Delino

发明人： Kuljeet Singh ,  Kevin Wells ,  Julius Delino

IPC分类号： H01L23/498 ,  H05K1/11 ,  H01R12/00

CPC分类号： H05K1/111 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K2201/094 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10S439/907 ,  Y10T29/49126 ,  H01L2924/00

摘要： An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

公开(公告)号：US07247517B2

公开(公告)日：2007-07-24

申请号：US10676883

申请日：2003-09-30

申请人： Christopher L. Rumer ,  Kuljeet Singh

发明人： Christopher L. Rumer ,  Kuljeet Singh

IPC分类号： H01L21/48 ,  H01L21/50

CPC分类号： H01L23/055 ,  H01L23/481 ,  H01L23/49833 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2224/92143 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor die having a through via formed therein is disclosed. A first conductive layer is formed on the front side of the die and a second conductive layer is formed on the backside of the die, and coupled with the through via. A first package substrate is electrically coupled with the first conductive layer, and a second package substrate is electrically coupled with the second conductive layer. In another embodiment, a substrate ball electrically couples the first and second package substrates. In a further embodiment, a flip chip bump is attached to the first package substrate.

摘要翻译： 公开了一种其中形成有通孔的半导体管芯。 第一导电层形成在管芯的前侧，并且第二导电层形成在管芯的背面，并与通孔相连。 第一封装衬底与第一导电层电耦合，并且第二封装衬底与第二导电层电耦合。 在另一个实施例中，衬底球电耦合第一和第二封装衬底。 在另一实施例中，倒装芯片凸块附接到第一封装衬底。

公开(公告)号：US06715663B2

公开(公告)日：2004-04-06

申请号：US10052089

申请日：2002-01-16

申请人： Krishna Seshan ,  Kuljeet Singh

发明人： Krishna Seshan ,  Kuljeet Singh

IPC分类号： B23K3102

CPC分类号： H01L24/48 ,  H01L22/32 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/0392 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/0517 ,  H01L2224/05184 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48769 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01043 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/48744

摘要： The present invention relates to a device that includes a low-ohmic test. The device includes a metallization copper pad such as metal-six, a metal first film such as Ni that is disposed above the metallization copper pad, and a metal second film such as Au that is disposed above the metal first film. The present invention also relates to a wire-bonding process, and to a method of pulling a first wire bond and making a second wire bond.

公开(公告)号：US07282796B2

公开(公告)日：2007-10-16

申请号：US10994057

申请日：2004-11-18

申请人： Kuljeet Singh ,  Kevin E. Wells ,  Julius Delino

发明人： Kuljeet Singh ,  Kevin E. Wells ,  Julius Delino

IPC分类号： H01L23/04 ,  H01L23/48 ,  H01L23/52

CPC分类号： H05K1/111 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K2201/094 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10S439/907 ,  Y10T29/49126 ,  H01L2924/00

摘要： An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

摘要翻译： 描述了一种电子组件，其具有衬底和在衬底上的接触，其间隔开并且以允许更密集的接触布置的方式布置，但仍然允许在触点之间布置迹线。

公开(公告)号：US20050087858A1

公开(公告)日：2005-04-28

申请号：US10994057

申请日：2004-11-18

申请人： Kuljeet Singh ,  Kevin Wells ,  Julius Delino

发明人： Kuljeet Singh ,  Kevin Wells ,  Julius Delino

IPC分类号： H01L23/498 ,  H05K1/11 ,  H01L23/04

CPC分类号： H05K1/111 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K2201/094 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10S439/907 ,  Y10T29/49126 ,  H01L2924/00

摘要： An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts.

公开(公告)号：US20050067714A1

公开(公告)日：2005-03-31

申请号：US10676883

申请日：2003-09-30

申请人： Christopher Rumer ,  Kuljeet Singh

发明人： Christopher Rumer ,  Kuljeet Singh

IPC分类号： H01L21/768 ,  H01L23/055 ,  H01L23/48 ,  H01L23/498 ,  H01L21/48 ,  H01L29/40

CPC分类号： H01L23/055 ,  H01L23/481 ,  H01L23/49833 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2224/92143 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor die having a through via formed therein is disclosed. A first conductive layer is formed on the front side of the die and a second conductive layer is formed on the backside of the die, and coupled with the through via. A first package substrate is electrically coupled with the first conductive layer, and a second package substrate is electrically coupled with the second conductive layer. In another embodiment, a substrate ball electrically couples the first and second package substrates. In a further embodiment, a flip chip bump is attached to the first package substrate.

摘要翻译： 公开了一种其中形成有通孔的半导体管芯。 第一导电层形成在管芯的前侧，并且第二导电层形成在管芯的背面，并与通孔相连。 第一封装衬底与第一导电层电耦合，并且第二封装衬底与第二导电层电耦合。 在另一个实施例中，衬底球电耦合第一和第二封装衬底。 在另一实施例中，倒装芯片凸块附接到第一封装衬底。