公开(公告)号：US20120162283A1

公开(公告)日：2012-06-28

申请号：US13313592

申请日：2011-12-07

申请人： Hidekazu MIYAIRI ,  Hiroyuki MIYAKE ,  Kouhei TOYOTAKA ,  Susumu KAWASHIMA

发明人： Hidekazu MIYAIRI ,  Hiroyuki MIYAKE ,  Kouhei TOYOTAKA ,  Susumu KAWASHIMA

IPC分类号： G09G3/36 ,  G09G5/10

CPC分类号： G09G3/3413 ,  G09G3/342 ,  G09G3/3677 ,  G09G2310/0235 ,  G09G2320/0242 ,  G09G2320/0247 ,  G09G2320/0261

摘要： Input of image signals to part of a plurality of pixels included in a particular region of a pixel portion and supply of light to part of another plurality of pixels which is different from the part are performed concurrently. Therefore, it is not necessary to provide a period in which light is supplied to all of the plurality of pixels included in the region after the image signals are input thereto. In other words, it is possible to start input of the next image signals to all of the plurality of pixels included in the region just after the image signals are input thereto. Accordingly, it is possible to increase the input frequency of the image signals. As a result, it is possible to suppress deteriorations of display caused in the field-sequential liquid crystal display device.

摘要翻译： 将图像信号输入到包括在像素部分的特定区域中的多个像素的一部分并且向与该部分不同的另一多个像素的一部分提供光的同时进行。 因此，不需要在输入图像信号之后，向该区域中包含的多个像素的全部提供光。 换句话说，可以开始输入下一个图像信号到刚好在输入图像信号之后的区域中包括的多个像素的全部。 因此，可以增加图像信号的输入频率。 结果，可以抑制在场顺序液晶显示装置中引起的显示的恶化。

公开(公告)号：US20120229747A1

公开(公告)日：2012-09-13

申请号：US13407891

申请日：2012-02-29

申请人： Hidekazu MIYAIRI ,  Tetsuji Ishitani ,  Dajsuke Kobota ,  Toshiyuki Isa ,  Kouhei Toyotaka ,  Susumu Kawashima

发明人： Hidekazu MIYAIRI ,  Tetsuji Ishitani ,  Dajsuke Kobota ,  Toshiyuki Isa ,  Kouhei Toyotaka ,  Susumu Kawashima

IPC分类号： G02F1/1333

CPC分类号： G02F1/133345 ,  G02F1/134363 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/124

摘要： Provided are a liquid crystal display device with horizontal electric field mode, in which a decrease in driving speed can be suppressed by reducing the resistance of a wiring even when the number of pixels is increased, and a manufacturing method thereof. One of a scan wiring and a signal wiring is divided in an intersection portion where the scan wiring and the signal wiring intersect with each other, and the separated wirings are connected with a connection electrode positioned over a thick insulating film. Accordingly, parasitic capacitance at the intersection portion can be reduced, preventing the decrease in the driving speed. The connection electrode is formed at the same time as formation of a pixel electrode and a common electrode using a low-resistance metal, which contributes to the reduction in manufacturing process of the liquid crystal display device.

摘要翻译： 提供一种具有水平电场模式的液晶显示装置及其制造方法，其中即使增加像素数也可以通过降低布线的电阻来抑制驱动速度的降低。 扫描布线和信号布线之一被划分在扫描布线和信号布线彼此相交的交叉部分中，并且分离的布线与位于厚绝缘膜上的连接电极连接。 因此，可以减少交叉部分处的寄生电容，防止驱动速度的降低。 连接电极与使用低电阻金属的像素电极和公共电极的形成同时形成，这有助于液晶显示装置的制造工艺的减少。

公开(公告)号：US20130002624A1

公开(公告)日：2013-01-03

申请号：US13613811

申请日：2012-09-13

申请人： Shunpei YAMAZAKI ,  Takeshi OSADA ,  Hidekazu MIYAIRI ,  Yasuhiro JINBO

发明人： Shunpei YAMAZAKI ,  Takeshi OSADA ,  Hidekazu MIYAIRI ,  Yasuhiro JINBO

IPC分类号： G09G5/00 ,  B32B3/10 ,  B32B15/04 ,  H05K1/14

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/1365 ,  H01L27/1214 ,  H01L27/1229 ,  H01L27/1251 ,  H01L27/1255 ,  H01L29/04 ,  H01L29/78648 ,  Y10T428/24331

摘要： A display device of which frame can be narrowed and of which display characteristics are excellent is provided. In a display device including a switch portion or a buffer portion, a logic circuit portion, and a pixel portion, the pixel portion includes a first inverted staggered TFT and a pixel electrode which is connected to a wiring of the first inverted staggered TFT, the switch portion or the buffer portion includes a second inverted staggered TFT in which a first insulating layer, a semiconductor layer, and a second insulating layer are interposed between a first gate electrode and a second gate electrode, the logic circuit portion includes an inverter circuit including a third inverted staggered thin film transistor and a fourth inverted staggered thin film transistor, and the first to the fourth inverted staggered thin film transistors have the same polarity. The inverter circuit may be an EDMOS circuit.

公开(公告)号：US20120299006A1

公开(公告)日：2012-11-29

申请号：US13477373

申请日：2012-05-22

申请人： Hidekazu MIYAIRI ,  Atsushi HIROSE ,  Yoshitaka YAMAMOTO ,  Tomohiro KIMURA

发明人： Hidekazu MIYAIRI ,  Atsushi HIROSE ,  Yoshitaka YAMAMOTO ,  Tomohiro KIMURA

IPC分类号： H01L27/06

CPC分类号： H01L29/78696 ,  H01L29/04 ,  H01L29/78633 ,  H01L29/78648

摘要： An object is to prevent light leakage caused due to misregistration even when the width of a black matrix layer is not expanded to a designed value or larger. One embodiment of the present invention is a semiconductor device including a single-gate thin film transistor in which a first semiconductor layer is sandwiched between a bottom-gate electrode and a first black matrix layer. The first semiconductor layer and the first black matrix layer overlap with each other.

摘要翻译： 目的是防止黑色矩阵层的宽度未扩大到设计值以上的情况下由于配准不良引起的漏光。 本发明的一个实施例是一种包括单栅极薄膜晶体管的半导体器件，其中第一半导体层夹在底栅电极和第一黑矩阵层之间。 第一半导体层和第一黑矩阵层彼此重叠。

公开(公告)号：US20120262940A1

公开(公告)日：2012-10-18

申请号：US13446244

申请日：2012-04-13

申请人： Hidekazu MIYAIRI ,  Emi KOEZUKA ,  Koichiro TANAKA

发明人： Hidekazu MIYAIRI ,  Emi KOEZUKA ,  Koichiro TANAKA

IPC分类号： G09F13/04 ,  F21V8/00

CPC分类号： G09G3/3413 ,  G02B6/0028 ,  G02B6/003 ,  G02B6/0031 ,  G02B6/0038 ,  G02B6/0078 ,  G02F1/133615 ,  G02F1/133621 ,  G02F2001/133622

摘要： An object is to provide a novel structure of a backlight unit using color-scan backlight drive, which can relieve a color mixture problem. A backlight unit including a plurality of light guide elements is used. The light guide element has a shape extended in the x direction. The light guide element has a shape of rectangular column. Grooves are provided on a bottom surface of the light guide element so as to traverse it in the y direction. Light sources are provided at the ends of the light guide element in the x direction to supply light into the light guide element. Light supplied into the light guide element is reflected by the grooves in the z direction, and emitted to the outside of the light guide element through the top surface. A reflective layer may be provided under the bottom surface of the light guide element.

摘要翻译： 本发明的目的是提供使用彩色背光驱动的背光单元的新颖结构，其可以减轻混色问题。 使用包括多个导光元件的背光单元。 导光元件具有沿x方向延伸的形状。 导光体具有矩形柱状。 凹槽设置在导光元件的底表面上，以在y方向上穿过它。 光源设置在导光元件的x方向的端部，以将光提供到导光元件中。 供应到导光元件的光在z方向上被凹槽反射，并且通过顶表面发射到导光元件的外部。 反射层可以设置在导光元件的底表面下方。

公开(公告)号：US20120248513A1

公开(公告)日：2012-10-04

申请号：US13517879

申请日：2012-06-14

申请人： Hidekazu MIYAIRI

发明人： Hidekazu MIYAIRI

IPC分类号： H01L29/78

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1266 ,  H01L29/66765 ,  H01L29/78681 ,  H01L29/7869

摘要： A space is provided under part of a semiconductor layer. Specifically, a structure in which an eaves portion (a projecting portion, an overhang portion) is formed in the semiconductor layer. The eaves portion is formed as follows: a stacked-layer structure in which a conductive layer, an insulating layer, and a semiconductor layer are stacked in this order is etched collectively to determine a pattern of a gate electrode; and a pattern of the semiconductor layer is formed while side-etching is performed.

摘要翻译： 在半导体层的一部分下方设置有空间。 具体而言，在半导体层中形成有檐部（突出部，突出部）的结构。 檐部形成如下：将依次层叠导体层，绝缘层和半导体层的叠层结构体共同地蚀刻，以确定栅电极的图案; 并且在进行侧面蚀刻时形成半导体层的图案。

公开(公告)号：US20120108007A1

公开(公告)日：2012-05-03

申请号：US13346963

申请日：2012-01-10

申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC分类号： H01L21/336

CPC分类号： H01L29/66969 ,  H01L21/46 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

摘要翻译： 本发明的目的是提供一种包括具有良好的电性能和高可靠性的薄膜晶体管的半导体器件，以及一种以高生产率制造半导体器件的方法。 在倒置交错（底栅极）薄膜晶体管中，使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且在半导体层和源之间设置使用金属氧化物层形成的缓冲层， 漏电极层。 有意地提供金属氧化物层作为半导体层与源极和漏极电极层之间的缓冲层，从而获得欧姆接触。

公开(公告)号：US20120100309A1

公开(公告)日：2012-04-26

申请号：US13273258

申请日：2011-10-14

申请人： Hidekazu MIYAIRI ,  Yoichiro NUMASAWA ,  Takayuki INOUE ,  Kojiro TAKAHASHI ,  Mitsuhiro ICHIJO

发明人： Hidekazu MIYAIRI ,  Yoichiro NUMASAWA ,  Takayuki INOUE ,  Kojiro TAKAHASHI ,  Mitsuhiro ICHIJO

IPC分类号： C23C16/50 ,  C23C16/52 ,  C23C16/455

CPC分类号： H01J37/3244 ,  C23C16/45565 ,  C23C16/45574

摘要： A plasma treatment apparatus includes a treatment chamber covered with a chamber wall, where an upper electrode faces a lower electrode; and a line chamber separated from the treatment chamber by the upper electrode and an insulator, covered with the chamber wall, and connected to a first gas diffusion chamber between a dispersion plate and a shower plate. The first gas diffusion chamber is connected to a second gas diffusion chamber between the dispersion plate and the upper electrode. The second gas diffusion chamber is connected to a first gas pipe in the upper electrode. The upper electrode and the chamber wall are provided on the same axis. The dispersion plate includes a center portion with no gas hole and a peripheral portion with plural gas holes. The center portion faces a gas introduction port of the first gas pipe, connected to an electrode plane of the upper electrode.

摘要翻译： 等离子体处理装置包括被室壁覆盖的处理室，其中上电极面向下电极; 以及通过所述上部电极和所述处理室与所述室壁隔开并与所述分隔板和喷淋板之间的第一气体扩散室连接的管线室。 第一气体扩散室与分散板和上部电极之间的第二气体扩散室连接。 第二气体扩散室与上部电极中的第一气体管连接。 上电极和室壁设置在同一轴线上。 分散板包括没有气孔的中心部分和具有多个气孔的周边部分。 中心部分面向与上电极的电极平面连接的第一气体管的气体导入口。

公开(公告)号：US20120052637A1

公开(公告)日：2012-03-01

申请号：US13211565

申请日：2011-08-17

申请人： Ryu KOMATSU ,  Yasuhiro JINBO ,  Hidekazu MIYAIRI

发明人： Ryu KOMATSU ,  Yasuhiro JINBO ,  Hidekazu MIYAIRI

IPC分类号： H01L21/336 ,  H01L21/205

CPC分类号： H01L21/02532 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78648 ,  H01L29/78672 ,  H01L29/78678 ,  H01L29/78696 ,  H01L31/03685 ,  H01L31/068 ,  H01L31/1824 ,  Y02E10/545 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： A seed crystal including mixed phase grains having high crystallinity at a low density is formed under a first condition over an insulating film, and then a first microcrystalline semiconductor film is formed over the seed crystal under a second condition that allows the mixed phase grains to grow and a space between the mixed phase grains to be filled. Then, a second microcrystalline semiconductor film is formed over the first microcrystalline semiconductor film under a third condition that allows formation of a microcrystalline semiconductor film having high crystallinity without increasing the space between the mixed phase grains included in the first microcrystalline semiconductor film.

摘要翻译： 在第一条件下，在绝缘膜上形成包含低密度结晶度的混合相的晶种，然后在允许混合晶粒生长的第二条件下在晶种上形成第一微晶半导体膜 以及要填充的混合相颗粒之间的空间。 然后，在允许形成具有高结晶度的微晶半导体膜而不增加包含在第一微晶半导体膜中的混晶相之间的空间的第三条件下，在第一微晶半导体膜上形成第二微晶半导体膜。

公开(公告)号：US20120034765A1

公开(公告)日：2012-02-09

申请号：US13185742

申请日：2011-07-19

申请人： Hidekazu MIYAIRI ,  Takashi IENAGA ,  Masao MORIGUCHI ,  Yosuke KANZAKI

发明人： Hidekazu MIYAIRI ,  Takashi IENAGA ,  Masao MORIGUCHI ,  Yosuke KANZAKI

IPC分类号： H01L21/20

CPC分类号： H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/32105 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to provide a manufacturing method of a microcrystalline silicon film with improved adhesion between an insulating film and the microcrystalline silicon film. The microcrystalline silicon film is formed in the following manner. Over an insulating film, a microcrystalline silicon grain having a height that allows the microcrystalline silicon grain to be completely oxidized by later plasma oxidation (e.g., a height greater than 0 nm and less than or equal to 5 nm), or a microcrystalline silicon film or an amorphous silicon film having a thickness that allows the microcrystalline silicon film or the amorphous silicon film to be completely oxidized by later plasma oxidation (e.g., a thickness greater than 0 nm and less than or equal to 5 nm) is formed. Plasma treatment in an atmosphere including oxygen or plasma oxidation is performed on the microcrystalline silicon grain, the microcrystalline silicon film, or the amorphous silicon film, so that a silicon oxide grain or a silicon oxide film is formed over the insulating film. A microcrystalline silicon film is formed over the silicon oxide grain or the silicon oxide film.

摘要翻译： 本发明的目的是提供一种具有改善的绝缘膜和微晶硅膜之间的粘附性的微晶硅膜的制造方法。 以下述方式形成微晶硅膜。 在绝缘膜上，具有通过稍后的等离子体氧化（例如，高于0nm且小于或等于5nm的高度）使微晶硅晶粒完全氧化的高度的微晶硅晶粒或微晶硅膜 或具有通过稍后的等离子体氧化（例如，厚度大于0nm且小于或等于5nm）使微晶硅膜或非晶硅膜完全氧化的厚度的非晶硅膜。 在微晶硅晶粒，微晶硅膜或非晶硅膜上进行包括氧或等离子体氧化的气氛中的等离子体处理，使得在绝缘膜上形成氧化硅晶粒或氧化硅膜。 在氧化硅晶粒或氧化硅膜上形成微晶硅膜。