公开(公告)号：US06326284B1

公开(公告)日：2001-12-04

申请号：US08610488

申请日：1996-03-04

申请人： Hideo Miura ,  Shuji Ikeda ,  Norio Suzuki ,  Yasuhide Hagiwara ,  Hiroyuki Ohta ,  Asao Nishimura

发明人： Hideo Miura ,  Shuji Ikeda ,  Norio Suzuki ,  Yasuhide Hagiwara ,  Hiroyuki Ohta ,  Asao Nishimura

IPC分类号： H01L2176

CPC分类号： H01L21/28185 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/321 ,  H01L21/76202 ,  H01L29/518

摘要： A semiconductor device produced by forming an oxide film on a substrate, heat treating the oxide film at a temperature of 800° C. or higher in an inert atmosphere, followed by conventional steps for formation of a transistor, is improved in electrical reliability due to relaxation of stress generated in the oxide film or in the surface of substrate.

摘要翻译： 通过在基板上形成氧化膜而制造的半导体装置，在惰性气氛中，在800℃以上的温度下进行氧化膜的热处理，接着是用于形成晶体管的常规步骤，由于 松弛在氧化膜或衬底表面产生的应力。

公开(公告)号：US06559037B2

公开(公告)日：2003-05-06

申请号：US09809046

申请日：2001-03-16

申请人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

发明人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

IPC分类号： H01L2120

CPC分类号： H01L21/02667 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/45561 ,  C23C16/52 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/28035 ,  H01L21/28525 ,  H01L21/28556 ,  H01L29/045 ,  H01L29/4916 ,  H01L29/66757 ,  H01L31/182 ,  H01L2924/0002 ,  Y02E10/546 ,  Y02P70/521 ,  H01L2924/00

摘要： A semiconductor device containing a polycrystalline silicon thin film wherein crystal grains of the silicon thin film have mainly a columnar structure and a crystal orientation of individual crystal grains is almost in a uniform direction can be produced by depositing a non-impurity-doped silicon thin film or an impurity layer on an interface of underlying film, followed by deposition of impurity-doped silicon thin film, if necessary, followed by heat treatment for polycrystallization.

摘要翻译： 包含多晶硅薄膜的半导体器件可以通过沉积非杂质掺杂的硅薄膜来制造，其中硅薄膜的晶粒主要具有柱状结构和单个晶粒的晶体取向几乎是均匀的方向 或下层膜的界面上的杂质层，然后如果需要，沉积杂质掺杂的硅薄膜，然后进行多结晶热处理。

公开(公告)号：US06204155B1

公开(公告)日：2001-03-20

申请号：US09597985

申请日：2000-06-19

申请人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

发明人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

IPC分类号： H01L2120

CPC分类号： H01L21/02667 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/45561 ,  C23C16/52 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/28035 ,  H01L21/28525 ,  H01L21/28556 ,  H01L29/045 ,  H01L29/4916 ,  H01L29/66757 ,  H01L31/182 ,  H01L2924/0002 ,  Y02E10/546 ,  Y02P70/521 ,  H01L2924/00

摘要： A semiconductor device containing a polycrystalline silicon thin film wherein crystal grains of the silicon thin film have mainly a columnar structure and a crystal orientation of individual crystal grains is almost in a uniform direction can be produced by depositing a non-impurity-doped silicon thin film or an impurity layer on an interface of underlying film, followed by deposition of impurity-doped silicon thin film, if necessary, followed by heat treatment for polycrystallization.

公开(公告)号：US06187100B1

公开(公告)日：2001-02-13

申请号：US09413890

申请日：1999-10-07

申请人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

发明人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

IPC分类号： C23C1600

CPC分类号： H01L21/02667 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/45561 ,  C23C16/52 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/28035 ,  H01L21/28525 ,  H01L21/28556 ,  H01L29/045 ,  H01L29/4916 ,  H01L29/66757 ,  H01L31/182 ,  H01L2924/0002 ,  Y02E10/546 ,  Y02P70/521 ,  H01L2924/00

摘要： A semiconductor device containing a polycrystalline silicon thin film wherein crystal grains of the silicon thin film have mainly a columnar structure and a crystal orientation of individual crystal grains is almost in a uniform direction can be produced by depositing a non-impurity-doped silicon thin film or an impurity layer on an interface of underlying film, followed by deposition of impurity-doped silicon thin film, if necessary, followed by heat treatment for polycrystallization.

摘要翻译： 包含多晶硅薄膜的半导体器件可以通过沉积非杂质掺杂的硅薄膜来制造，其中硅薄膜的晶粒主要具有柱状结构和单个晶粒的晶体取向几乎是均匀的方向 或下层膜的界面上的杂质层，然后如果需要，沉积杂质掺杂的硅薄膜，然后进行多结晶热处理。

公开(公告)号：US5670793A

公开(公告)日：1997-09-23

申请号：US527942

申请日：1995-09-14

申请人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

发明人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

IPC分类号： H01L21/8247 ,  C23C16/24 ,  C23C16/44 ,  C23C16/455 ,  C23C16/52 ,  H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/04 ,  H01L29/49 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L31/18

CPC分类号： C23C16/45561 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/52 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/28035 ,  H01L21/28525 ,  H01L21/28556 ,  H01L29/045 ,  H01L29/4916 ,  H01L29/66757 ,  H01L31/182 ,  H01L2924/0002 ,  Y02E10/546 ,  Y02P70/521

摘要： A semiconductor device containing a polycrystalline silicon thin film wherein crystal grains of the silicon thin film have mainly a columnar structure and a crystal orientation of individual crystal grains is almost in a uniform direction can be produced by depositing a non-impurity-doped silicon thin film or an impurity layer on an interface of underlying film, followed by deposition of impurity-doped silicon thin film, if necessary, followed by heat treatment for polycrystallization.

摘要翻译： 包含多晶硅薄膜的半导体器件可以通过沉积非杂质掺杂的硅薄膜来制造，其中硅薄膜的晶粒主要具有柱状结构和单个晶粒的晶体取向几乎是均匀的方向 或下层膜的界面上的杂质层，然后如果需要，沉积杂质掺杂的硅薄膜，然后进行多结晶热处理。

公开(公告)号：US6080611A

公开(公告)日：2000-06-27

申请号：US880445

申请日：1997-06-24

申请人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

发明人： Hideo Miura ,  Shunji Moribe ,  Hisayuki Kato ,  Atsuyoshi Koike ,  Shuji Ikeda ,  Asao Nishimura

IPC分类号： H01L21/8247 ,  C23C16/24 ,  C23C16/44 ,  C23C16/455 ,  C23C16/52 ,  H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/04 ,  H01L29/49 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L31/18 ,  H01L21/8238

CPC分类号： C23C16/45561 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/52 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/28035 ,  H01L21/28525 ,  H01L21/28556 ,  H01L29/045 ,  H01L29/4916 ,  H01L29/66757 ,  H01L31/182 ,  H01L2924/0002 ,  Y02E10/546 ,  Y02P70/521

摘要： A semiconductor device containing a polycrystalline silicon thin film wherein crystal grains of the silicon thin film have mainly a columnar structure and a crystal orientation of individual crystal grains is almost in a uniform direction can be produced by depositing a non-impurity-doped silicon thin film or an impurity layer on an interface of underlying film, followed by deposition of impurity-doped silicon thin film, if necessary, followed by heat treatment for polycrystallization.

公开(公告)号：US5643805A

公开(公告)日：1997-07-01

申请号：US401678

申请日：1995-03-10

申请人： Hiroyuki Ohta ,  Hideo Miura ,  Hiroo Masuda ,  Yoichi Tamaki ,  Takahide Ikeda ,  Asao Nishimura ,  Takashi Hashimoto

发明人： Hiroyuki Ohta ,  Hideo Miura ,  Hiroo Masuda ,  Yoichi Tamaki ,  Takahide Ikeda ,  Asao Nishimura ,  Takashi Hashimoto

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/8249 ,  H01L23/485 ,  H01L27/06 ,  H01L29/732 ,  H01L21/265

CPC分类号： H01L23/4855 ,  H01L23/485 ,  H01L2924/0002 ,  Y10S148/01 ,  Y10S148/124 ,  Y10S148/135

摘要： A bipolar device having a level difference between the contact area level of a base electrode and a base region in a silicon substrate, and the contact area level of an emitter electrode and an emitter region in the silicon substrate in the range of 0.03 .mu.m to 0.1 .mu.m by removing undesirable impurities from the emitter region and a predetermined horizontal distance between a sidewall and a device isolation film does not generate dislocation and show good electric characteristics.

摘要翻译： 具有硅基板中的基极的接触面积电平与基极区域之间的电平差的硅双极器件，以及硅基板的发射电极和发射极区域的接触面积电平为0.03μm〜 通过从发射极区域去除不需要的杂质并且侧壁和器件隔离膜之间的预定水平距离不产生位错并且显示出良好的电特性，0.1μm。

公开(公告)号：US5619069A

公开(公告)日：1997-04-08

申请号：US458655

申请日：1995-06-02

申请人： Hiroyuki Ohta ,  Hideo Miura ,  Hiroo Masuda ,  Yoichi Tamaki ,  Takahide Ikeda ,  Asao Nishimura ,  Takashi Hashimoto

发明人： Hiroyuki Ohta ,  Hideo Miura ,  Hiroo Masuda ,  Yoichi Tamaki ,  Takahide Ikeda ,  Asao Nishimura ,  Takashi Hashimoto

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/8249 ,  H01L23/485 ,  H01L27/06 ,  H01L29/732 ,  H01L23/48

CPC分类号： H01L23/4855 ,  H01L23/485 ,  H01L2924/0002 ,  Y10S148/01 ,  Y10S148/124 ,  Y10S148/135

摘要： A bipolar device having a level difference between the contact area level of a base electrode and a base region in a silicon substrate, and the contact area level of an emitter electrode and an emitter region in the silicon substrate in the range of 0.03 .mu.m to 0.1 .mu.m by removing undesirable impurities from the emitter region and a predetermined horizontal distance between a sidewall and a device isolation film does not generate dislocation and show good electric characteristics.

摘要翻译： 具有硅基板中的基极的接触面积电平与基极区域之间的电平差的硅双极器件，以及硅基板的发射电极和发射极区域的接触面积电平为0.03μm〜 通过从发射极区域去除不需要的杂质并且侧壁和器件隔离膜之间的预定水平距离不产生位错并且显示出良好的电特性，0.1μm。

公开(公告)号：US07038322B2

公开(公告)日：2006-05-02

申请号：US10919331

申请日：2004-08-17

申请人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

发明人： Atsushi Kazama ,  Akihiro Yaguchi ,  Hideo Miura ,  Asao Nishimura

IPC分类号： H01L21/31

CPC分类号： H01L23/3157 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip module has at least two semiconductor chips. Each of the semiconductor chips has chip electrodes of the semiconductor chip, electrically conductive interconnections for electrically connection with the chip electrodes, electrically conductive lands for electrically connection with the interconnections, external terminals placed on the lands, and a stress-relaxation layer intervening between the lands and the semiconductor chip. The semiconductor chips are placed on a mounting board via the external terminals. The stress-relaxation layer of a first semiconductor chip is thicker than the stress-relaxation layer of a second semiconductor chip having a distance from a center thereof to an external terminal positioned at an outermost end portion thereof smaller than that of the first semiconductor chip.

公开(公告)号：US06927489B1

公开(公告)日：2005-08-09

申请号：US09787526

申请日：2000-03-14

申请人： Akihiro Yaguchi ,  Hideo Miura ,  Atsushi Kazama ,  Asao Nishimura

发明人： Akihiro Yaguchi ,  Hideo Miura ,  Atsushi Kazama ,  Asao Nishimura

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/31 ,  H01L23/485 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/207 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： In a small semiconductor device having external terminals on a semiconductor element and a semiconductor module mounted with the small semiconductor device, disconnection of the external terminals is prevented when a temperature change occurs under the conditions that the semiconductor device is mounted on a printed circuit board. To achieve this a projection is formed on a land which is an external terminal bonding area of the semiconductor device, and a protruded portion of the projection is bonded to the external terminal. An intervening portion of a protective film made of resin material is formed between the lands and semiconductor element.

摘要翻译： 在半导体元件上具有外部端子的小半导体器件和安装有小型半导体器件的半导体模块中，在半导体器件安装在印刷电路板上的条件下发生温度变化时，可防止外部端子断开。 为了实现这一点，在作为半导体器件的外部端子接合区域的焊盘上形成突起，突起的突出部分接合到外部端子。 在平台和半导体元件之间形成由树脂材料构成的保护膜的中间部分。