High density trench field effect transistor
    1.
    发明授权
    High density trench field effect transistor 有权
    高密度沟槽场效应晶体管

    公开(公告)号:US08278702B2

    公开(公告)日:2012-10-02

    申请号:US12211654

    申请日:2008-09-16

    IPC分类号: H01L29/66

    摘要: A semiconductor structure comprises trenches extending into a semiconductor region. Portions of the semiconductor region extend between adjacent trenches forming mesa regions. A gate electrode is in each trench. Well regions of a first conductivity type extend in the semiconductor region between adjacent trenches. Source regions of a second conductivity type are in the well regions. Heavy body regions of the first conductivity type are in the well regions. The source regions and the heavy body regions are adjacent trench sidewalls, and the heavy body regions extend over the source regions along the trench sidewalls to a top surface of the mesa regions.

    摘要翻译: 半导体结构包括延伸到半导体区域中的沟槽。 半导体区域的部分在形成台面区域的相邻沟槽之间延伸。 栅电极在每个沟槽中。 第一导电类型的阱区在相邻沟槽之间的半导体区域中延伸。 第二导电类型的源极区位于阱区中。 第一导电类型的重体区域在井区域中。 源极区域和重体区域是相邻的沟槽侧壁,并且重体区域沿着沟槽侧壁延伸到源区域上方到台面区域的顶表面。

    High density trench field effect transistor
    2.
    发明申请
    High density trench field effect transistor 有权
    高密度沟槽场效应晶体管

    公开(公告)号:US20100065904A1

    公开(公告)日:2010-03-18

    申请号:US12211654

    申请日:2008-09-16

    IPC分类号: H01L29/78

    摘要: A semiconductor structure comprises trenches extending into a semiconductor region. Portions of the semiconductor region extend between adjacent trenches forming mesa regions. A gate electrode is in each trench. Well regions of a first conductivity type extend in the semiconductor region between adjacent trenches. Source regions of a second conductivity type are in the well regions. Heavy body regions of the first conductivity type are in the well regions. The source regions and the heavy body regions are adjacent trench sidewalls, and the heavy body regions extend over the source regions along the trench sidewalls to a top surface of the mesa regions.

    摘要翻译: 半导体结构包括延伸到半导体区域中的沟槽。 半导体区域的部分在形成台面区域的相邻沟槽之间延伸。 栅电极在每个沟槽中。 第一导电类型的阱区在相邻沟槽之间的半导体区域中延伸。 第二导电类型的源极区位于阱区中。 第一导电类型的重体区域在井区域中。 源极区域和重体区域是相邻的沟槽侧壁,并且重体区域沿着沟槽侧壁延伸到源区域上方到台面区域的顶表面。

    Shield Contacts in a Shielded Gate MOSFET
    6.
    发明申请
    Shield Contacts in a Shielded Gate MOSFET 有权
    屏蔽栅极MOSFET中的屏蔽触点

    公开(公告)号:US20110018059A1

    公开(公告)日:2011-01-27

    申请号:US12509379

    申请日:2009-07-24

    IPC分类号: H01L29/78 H01L21/28

    摘要: A semiconductor structure comprises an active region comprising trenches extending into a semiconductor region. Each trench includes a shield electrode and a gate electrode. The semiconductor structure also comprises a shield contact region adjacent to the active region. The shield contact region comprises at least one contact trench extending into the semiconductor region. The shield electrode from at least one of the trenches in the active region extends along a length of the contact trench. The semiconductor structure also comprises an interconnect layer extending over the active region and the shield contact region. In the active region the interconnect layer is isolated from the gate electrode in each trench by a dielectric layer and contacts mesa surfaces of the semiconductor region adjacent to the trenches. In the shield contact region the interconnect layer contacts the shield electrode and the mesa surfaces of the semiconductor region adjacent to the contact trench.

    摘要翻译: 半导体结构包括包括延伸到半导体区域中的沟槽的有源区。 每个沟槽包括屏蔽电极和栅电极。 半导体结构还包括与有源区相邻的屏蔽接触区。 屏蔽接触区域包括延伸到半导体区域中的至少一个接触沟槽。 有源区域中至少一个沟槽的屏蔽电极沿接触沟槽的长度延伸。 半导体结构还包括在有源区域和屏蔽接触区域上延伸的互连层。 在有源区域中,互连层通过介电层与每个沟槽中的栅电极隔离,并接触与沟槽相邻的半导体区域的台面表面。 在屏蔽接触区域中,互连层与屏蔽电极和与接触沟槽相邻的半导体区域的台面表面接触。

    Method of manufacturing a trench transistor having a heavy body region
    8.
    发明授权
    Method of manufacturing a trench transistor having a heavy body region 有权
    制造具有重体区域的沟槽晶体管的方法

    公开(公告)号:US07696571B2

    公开(公告)日:2010-04-13

    申请号:US12329509

    申请日:2008-12-05

    IPC分类号: H01L29/78

    摘要: A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.

    摘要翻译: 提供了沟槽场效应晶体管,其包括(a)半导体衬底,(b)在半导体衬底中延伸预定深度的沟槽,(c)位于沟槽相对侧上的一对掺杂源极结(d )掺杂的重体,其位于与沟槽的源极结的相对侧上的每个源极结附近,重体的最深部分比沟槽的预定深度更深地延伸到所述半导体衬底中,以及(e)掺杂 很好地围着沉重的身体下面的沉重的身体。

    SHIELD CONTACTS IN A SHIELDED GATE MOSFET
    9.
    发明申请
    SHIELD CONTACTS IN A SHIELDED GATE MOSFET 有权
    屏蔽栅MOSFET中的屏蔽触点

    公开(公告)号:US20110275208A1

    公开(公告)日:2011-11-10

    申请号:US13104006

    申请日:2011-05-09

    IPC分类号: H01L21/28

    摘要: A semiconductor structure is formed as follows. Trenches are formed in a semiconductor region and a shield electrode is formed in each trench. Gate electrodes are formed in a portion of the trenches that form an active region. Each gate electrode is disposed over the shield electrode and is isolated from the shield electrode by an inter-electrode dielectric. An interconnect layer is formed extending over the trenches. The interconnect layer is isolated from the gate electrodes in the active region by a dielectric layer and contacts the shield electrodes in a shield contact region separate from the active region. The interconnect layer contacts mesa surfaces between adjacent trenches in the shield contact region.

    摘要翻译: 如下形成半导体结构。 沟槽形成在半导体区域中,并且在每个沟槽中形成屏蔽电极。 栅电极形成在形成有源区的沟槽的一部分中。 每个栅电极设置在屏蔽电极之上,并且通过电极间电介质与屏蔽电极隔离。 形成在沟槽上延伸的互连层。 互连层通过介电层与有源区域中的栅电极隔离,并且在与有源区分离的屏蔽接触区域中与屏蔽电极接触。 互连层接触屏蔽接触区域中相邻沟槽之间的台面。

    Method of manufacturing a trench transistor having a heavy body region
    10.
    发明授权
    Method of manufacturing a trench transistor having a heavy body region 有权
    制造具有重体区域的沟槽晶体管的方法

    公开(公告)号:US08044463B2

    公开(公告)日:2011-10-25

    申请号:US12755966

    申请日:2010-04-07

    IPC分类号: H01L29/76

    摘要: A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.

    摘要翻译: 提供了沟槽场效应晶体管,其包括(a)半导体衬底,(b)在半导体衬底中延伸预定深度的沟槽,(c)位于沟槽相对侧上的一对掺杂源极结(d )掺杂的重体,其位于与沟槽的源极结的相对侧上的每个源极结附近,重体的最深部分比沟槽的预定深度更深地延伸到所述半导体衬底中,以及(e)掺杂 很好地围着沉重的身体下面的沉重的身体。