System and method for dampening high pressure impact on porous materials
    4.
    发明授权
    System and method for dampening high pressure impact on porous materials 失效
    用于抑制高压冲击多孔材料的系统和方法

    公开(公告)号:US06875285B2

    公开(公告)日:2005-04-05

    申请号:US10422339

    申请日:2003-04-24

    摘要: System and method for reducing damage to a semiconductor substrate when using cleaning fluids at elevated pressures to clean the semiconductor substrates. A preferred embodiment comprises applying the cleaning fluid at a first pressure for a first time period, wherein the first pressure is relatively low, and then increasing the pressure of the cleaning fluid to a pressure level that can effectively clean the semiconductor substrate and maintaining the pressure level for a second time period. The application of the cleaning fluid at the relatively low initial pressure acts as a temporary filler and creates a buffer of the cleaning fluid on the semiconductor substrate and helps to dampen the impact of the subsequent high pressure application of the cleaning fluid on the semiconductor substrate.

    摘要翻译: 当在高压下使用清洁流体以清洁半导体衬底时,减少对半导体衬底的损伤的系统和方法。 优选实施例包括在第一时间段内施加第一压力的清洁流体,其中第一压力相对较低,然后将清洁流体的压力提高到可以有效地清洁半导体衬底并保持压力的压力水平 水平第二次。 以相对较低的初始压力施加清洁流体作为临时填料并在半导体衬底上产生清洗液的缓冲液,并且有助于抑制随后的高压施加清洁流体对半导体衬底的冲击。

    FIB exposure of alignment marks in MIM technology
    5.
    发明申请
    FIB exposure of alignment marks in MIM technology 审中-公开
    MIM技术中FIB曝光对准标记

    公开(公告)号:US20050186753A1

    公开(公告)日:2005-08-25

    申请号:US10786187

    申请日:2004-02-25

    摘要: A new and improved method for exposing alignment marks on a substrate by locally cutting through a metal or non-metal layer or layers sequentially deposited on the substrate above the alignment marks, using focused ion beam (FIB) technology. In a preferred embodiment, a method for exposing alignment marks on a substrate can be carried out by first providing a substrate that has multiple alignment marks provided thereon and at least one overlying opaque layer, typically but not necessarily metal, deposited on the substrate above the alignment marks. A focused ion beam is then directed against the overlying opaque layer or layers to cut through the layer or layers and expose the alignment marks on the substrate. A noble gas, preferably argon, is typically used as the ion source for the focused ion beam.

    摘要翻译: 一种新的和改进的方法,通过使用聚焦离子束(FIB)技术,通过局部切割穿过对准标记上方的基板上的金属或非金属层或层而在基板上曝光对准标记。 在优选实施例中,用于在衬底上曝光对准标记的方法可以通过首先提供其上设置有多个对准标记的衬底和沉积在衬底上方的至少一个上覆的不透明层(通常但不一定是金属) 对齐标记 然后将聚焦离子束定向到上覆的不透明层或层以切穿该层或者暴露衬底上的对准标记。 惰性气体,优选氩气通常用作聚焦离子束的离子源。

    Supercritical water application for oxide formation
    6.
    发明申请
    Supercritical water application for oxide formation 审中-公开
    氧化物形成的超临界水应用

    公开(公告)号:US20050106895A1

    公开(公告)日:2005-05-19

    申请号:US10715326

    申请日:2003-11-17

    摘要: The present disclosure provides for a method and system for fabricating an insulating layer on a substrate. The method and system provide a fluid to a substrate, wherein the fluid is provided in an aerosol form. The method and system also provides for generating a supercritical process environment proximate to the substrate. The method and system further provides a proximate supercritical process environment having a supercritical process temperature and a supercritical process pressure for altering the fluid, and placing the substrate in contact with the altered fluid, wherein the insulating layer is formed on the substrate by a reaction between the substrate and the fluid.

    摘要翻译: 本公开提供了用于在基板上制造绝缘层的方法和系统。 该方法和系统向基材提供流体,其中流体以气溶胶形式提供。 该方法和系统还提供用于生成靠近基底的超临界过程环境。 该方法和系统还提供了一种具有超临界过程温度和超临界过程压力的邻近超临界过程环境,用于改变流体,并使衬底与改变的流体接触,其中绝缘层通过 基材和流体。

    Advanced process control approach for Cu interconnect wiring sheet resistance control
    8.
    发明申请
    Advanced process control approach for Cu interconnect wiring sheet resistance control 失效
    Cu互连布线电阻控制的先进工艺控制方法

    公开(公告)号:US20050112997A1

    公开(公告)日:2005-05-26

    申请号:US10723236

    申请日:2003-11-26

    摘要: A wafer based APC method for controlling an oxide (Cu, or TaN) polish step is described and combines a feed forward model that compensates for incoming wafer variations with a feed backward model which compensates for CMP variations. The method is geared toward minimizing Rs 3σ variations. A Rs target value is inputted with metrology data from previous processes that affects the width and thickness of the copper layer. A copper thickness target and polish time for the first wafer is determined. Post CMP measurement data of the first wafer is used to modify the polish rate with a disturbance factor and an updated polish time is computed for subsequent wafers. The CMP recipe for each wafer is adjusted with metrology data and post CMP measurements. The APC method is successful in controlling copper Rs variations for the 90 nm technology node and is independent of copper pattern density.

    摘要翻译: 描述了用于控制氧化物(Cu或TaN)抛光步骤的基于晶圆的APC方法,并且组合了用于补偿进入晶片变化的前馈模型与补偿CMP变化的馈送反向模型。 该方法面向最小化Rs 3sigma变化。 输入Rs目标值,其中来自先前工艺的测量数据影响铜层的宽度和厚度。 确定第一晶片的铜厚度目标和抛光时间。 第一晶片的CMP后测量数据被用于利用干扰因子修改抛光速率,并且为随后的晶片计算更新的抛光时间。 每个晶片的CMP配方用测量数据和后CMP测量进行调整。 APC方法成功地控制了90nm技术节点的铜Rs变化,并且与铜图案密度无关。

    Advanced process control approach for Cu interconnect wiring sheet resistance control
    9.
    发明授权
    Advanced process control approach for Cu interconnect wiring sheet resistance control 失效
    Cu互连布线电阻控制的先进工艺控制方法

    公开(公告)号:US07083495B2

    公开(公告)日:2006-08-01

    申请号:US10723236

    申请日:2003-11-26

    IPC分类号: B24B49/00 B24B1/00

    摘要: A wafer based APC method for controlling an oxide (Cu, or TaN) polish step is described and combines a feed forward model that compensates for incoming wafer variations with a feed backward model which compensates for CMP variations. The method is geared toward minimizing Rs 3σ variations. A Rs target value is inputted with metrology data from previous processes that affects the width and thickness of the copper layer. A copper thickness target and polish time for the first wafer is determined. Post CMP measurement data of the first wafer is used to modify the polish rate with a disturbance factor and an updated polish time is computed for subsequent wafers. The CMP recipe for each wafer is adjusted with metrology data and post CMP measurements. The APC method is successful in controlling copper Rs variations for the 90 nm technology node and is independent of copper pattern density.

    摘要翻译: 描述了用于控制氧化物(Cu或TaN)抛光步骤的基于晶圆的APC方法,并且组合了用于补偿进入晶片变化的前馈模型与补偿CMP变化的馈送反向模型。 该方法面向最小化Rs 3sigma变化。 输入Rs目标值,其中来自先前工艺的测量数据影响铜层的宽度和厚度。 确定第一晶片的铜厚度目标和抛光时间。 第一晶片的CMP后测量数据被用于利用干扰因子修改抛光速率,并且为随后的晶片计算更新的抛光时间。 每个晶片的CMP配方用测量数据和后CMP测量进行调整。 APC方法成功地控制了90nm技术节点的铜Rs变化,并且与铜图案密度无关。

    Method to pattern small features by using a re-flowable hard mask
    10.
    发明申请
    Method to pattern small features by using a re-flowable hard mask 审中-公开
    通过使用可再流动的硬掩模来绘制小特征的方法

    公开(公告)号:US20050089777A1

    公开(公告)日:2005-04-28

    申请号:US10988349

    申请日:2004-11-12

    摘要: A method of forming small features, comprising the following steps. A substrate having a dielectric layer formed thereover is provided. A spacing layer is formed over the dielectric layer. The spacing layer has a thickness equal to the thickness of the small feature to be formed. A patterned, re-flowable masking layer is formed over the spacing layer. The masking layer having a first opening with a width “L”. The patterned, re-flowable masking layer is re-flowed to form a patterned, re-flowed masking layer having a re-flowed first opening with a lower width “l”. The re-flowed first opening lower width “l” being less than the pre-re-flowed first opening width “L”. The spacing layer is etched down to the dielectric layer using the patterned, re-flowed masking layer as a mask to form a second opening within the etched spacing layer having a width equal to the re-flowed first opening lower width “l”. Removing the patterned, re-flowed masking layer. A small feature material is then formed within the second opening and any excess small feature material above the etched spacing layer is removed. The etched spacing layer is removed to form the small feature comprised of the small feature material.

    摘要翻译: 一种形成小特征的方法,包括以下步骤。 提供其上形成有介电层的基板。 在电介质层上形成间隔层。 间隔层的厚度等于要形成的小特征的厚度。 在间隔层上形成图案化的可重新流动的掩模层。 掩模层具有宽度“L”的第一开口。 图案化的可重新流动的掩模层被再流动以形成具有较低宽度“l”的具有再流动的第一开口的图案化的再流过的掩蔽层。 再流出的第一开口下部宽度“l”小于预先流动的第一开口宽度“L”。 使用图案化的再流过的掩模层作为掩模将间隔层蚀刻到介电层上,以在蚀刻的间隔层内形成具有等于再流动的第一开口下宽度“l”的宽度的第二开口。 去除图案化的再流过的掩蔽层。 然后在第二开口内形成小的特征材料,并且去除蚀刻的间隔层上方的任何过量的小特征材料。 蚀刻的间隔层被去除以形成由小特征材料组成的小特征。