公开(公告)号：US20020037655A1

公开(公告)日：2002-03-28

申请号：US09963385

申请日：2001-09-27

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Masahiko Hasunuma ,  Hideshi Miyajima ,  Hisashi Kaneko ,  Rempei Nakata

IPC分类号： H01L021/31

CPC分类号： H01L21/67253 ,  H01L21/67017 ,  H01L21/76828

摘要： A method for manufacturing a semiconductor device, comprising controlling a humidity in an atmosphere around a low dielectric constant insulating film at 30% or less, during a processing period and a transfer period between processing equipments, in which at least a part of said low dielectric constant insulating film is exposed to the atmosphere

摘要翻译： 一种制造半导体器件的方法，包括在处理期间和处理设备之间的转移期间，在低介电常数绝缘膜周围的气氛中控制30％以下的湿度，其中至少部分所述低电介质 恒定绝缘膜暴露在大气中

公开(公告)号：US20020130421A1

公开(公告)日：2002-09-19

申请号：US10085067

申请日：2002-03-01

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Sachiyo Ito ,  Masahiko Hasunuma

IPC分类号： H01L023/52

CPC分类号： H01L23/5329 ,  H01L23/53223 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A semiconductor device is structured to include a wiring made of Al, a first insulation film made of silicon oxide including an organic content formed in contact with an upper surface of the wiring, and a second insulation film formed in contact with an upper surface of the first insulation film and made of an F-added SiO2 film having a higher Young's modulus than that of the first insulation film. The wiring has a film thickness dM of 400 nm, the first insulation film has a film thickness ds of 400 nm, and the second insulation film has a film thickness dh of 10 nm.

公开(公告)号：US20040159951A1

公开(公告)日：2004-08-19

申请号：US10776202

申请日：2004-02-12

申请人： Kabushiki Kaisha Toshiba

发明人： Hiroshi Toyoda ,  Mitsuhiro Nakao ,  Masahiko Hasunuma ,  Hisashi Kaneko ,  Atsuko Sakata ,  Toshiaki Komukai

IPC分类号： H01L023/48

CPC分类号： H01L21/76846 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76858 ,  H01L21/76886 ,  H01L21/76888 ,  H01L22/32 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05017 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05093 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05546 ,  H01L2224/05552 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05605 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/0562 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/1312 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/45105 ,  H01L2224/45109 ,  H01L2224/45111 ,  H01L2224/45113 ,  H01L2224/45116 ,  H01L2224/4512 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48611 ,  H01L2224/48616 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48711 ,  H01L2224/48716 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48799 ,  H01L2224/48805 ,  H01L2224/48811 ,  H01L2224/48813 ,  H01L2224/48816 ,  H01L2224/4882 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/85375 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/01327 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2224/05609 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2224/48713 ,  H01L2224/48705 ,  H01L2224/4872 ,  H01L2224/48605 ,  H01L2224/48613 ,  H01L2224/4862 ,  H01L2924/00015

摘要： A semiconductor device, which is comprised of a copper wiring layer which is formed above a semiconductor substrate, a pad electrode layer which conducts electrically to the copper wiring layer and has an alloy, which contains copper and a metal whose oxidation tendency is higher than copper, formed to extend to the bottom surface, and an insulating protective film which has an opening extended to the pad electrode layer, is provided.

摘要翻译： 一种半导体器件，其由形成在半导体衬底上的铜布线层构成，该电极层与铜布线层电连接并具有合金，所述焊接电极层含有铜和氧化倾向高于铜的金属 形成为延伸到底表面，并且具有延伸到焊盘电极层的开口的绝缘保护膜。

公开(公告)号：US20040043602A1

公开(公告)日：2004-03-04

申请号：US10650974

申请日：2003-08-29

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Junichi Wada ,  Atsuko Sakata ,  Tomio Katata ,  Takamasa Usui ,  Masahiko Hasunuma ,  Hideki Shibata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura

IPC分类号： H01L021/4763 ,  H01L021/44

CPC分类号： H01L21/76867 ,  H01L21/2855 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76864 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76886 ,  H01L21/76889

摘要： A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在具有布线层的Si衬底上形成绝缘膜，形成与布线层连接的接触孔和绝缘膜中的布线槽，用Si 膜，依次在基板上形成Al膜和Ti膜，进行热处理，从而将Al膜替代为Ti膜，并使Si膜被Ti膜吸收，由此填充接触孔 和Al膜的布线槽，除去由Ti膜和多余Ti吸收Si膜形成的由Ti硅化物构成的Ti / Ti硅化物，由此用Al塞填充接触孔，并填充 布线槽与Al接线。

公开(公告)号：US20030116854A1

公开(公告)日：2003-06-26

申请号：US10247378

申请日：2002-09-20

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Sachiyo Ito ,  Masahiko Hasunuma ,  Takashi Kawanoue

IPC分类号： H01L023/48

CPC分类号： H01L21/76843 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76855 ,  H01L21/76888 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprises a semiconductor substrate on which an element is formed, a low dielectric constant insulation film formed over the semiconductor substrate and having a relative dielectric constant of 3 or lower, a plug and a wiring layer buried in the low dielectric constant insulation film, and a high Young's modulus insulation film having a Young's modulus of 15 GPa or higher and formed in contact with a side of the plug between the low dielectric constant insulation film and the plug.

摘要翻译： 半导体器件包括其上形成有元件的半导体衬底，形成在半导体衬底上并具有3或更低的相对介电常数的低介电常数绝缘膜，埋入低介电常数绝缘膜中的插塞和布线层 以及杨氏模量为15GPa以上的高杨氏模量绝缘膜，并且与低介电常数绝缘膜和插塞之间的插塞侧接触形成。

公开(公告)号：US20030085470A1

公开(公告)日：2003-05-08

申请号：US10254669

申请日：2002-09-26

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Masahiko Hasunuma

IPC分类号： H01L023/48

CPC分类号： H01L23/485 ,  H01L23/53238 ,  H01L23/53252 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes an insulating film disposed on or above a semiconductor substrate, and an interconnection portion disposed on the insulating film. The interconnection portion includes a barrier film disposed on the insulating film, and a conductive layer disposed on the barrier film. The barrier film consists essentially of an alloy of a first material and Ta. The first material is at least one element selected from the group consisting of Group IVa elements, Group Va elements excluding Ta, and Group VIa elements. The conductive layer contains Cu or Ag as a major element.

摘要翻译： 半导体器件包括设置在半导体衬底上或上方的绝缘膜和布置在绝缘膜上的互连部分。 互连部分包括设置在绝缘膜上的阻挡膜和设置在阻挡膜上的导电层。 阻挡膜主要由第一材料和Ta的合金组成。 第一种材料是选自由Ⅳa族元素，不包括Ta的Va族元素和Ⅵa族元素组成的组中的至少一种元素。 导电层含有Cu或Ag作为主要元素。

公开(公告)号：US20020192938A1

公开(公告)日：2002-12-19

申请号：US10189598

申请日：2002-07-08

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Junichi Wada ,  Atsuko Sakata ,  Tomio Katata ,  Takamasa Usui ,  Masahiko Hasunuma ,  Hideki Shibata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura

IPC分类号： H01L021/4763 ,  H01L021/44

CPC分类号： H01L21/76867 ,  H01L21/2855 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76864 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76886 ,  H01L21/76889

摘要： A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在具有布线层的Si衬底上形成绝缘膜，形成与布线层连接的接触孔和绝缘膜中的布线槽，用Si 膜，依次在基板上形成Al膜和Ti膜，进行热处理，从而将Al膜替代为Ti膜，并使Si膜被Ti膜吸收，由此填充接触孔 和Al膜的布线槽，除去由Ti膜和多余Ti吸收Si膜形成的由Ti硅化物构成的Ti / Ti硅化物，由此用Al塞填充接触孔，并填充 布线槽与Al接线。

公开(公告)号：US20020130415A1

公开(公告)日：2002-09-19

申请号：US10062468

申请日：2002-02-05

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Masahiko Hasunuma ,  Hisashi Kaneko ,  Shohei Shima ,  Sachiyo Ito

IPC分类号： H01L023/48

CPC分类号： H01L21/76847 ,  H01L21/32051 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device manufacturing method of the this invention having the step of forming an interlayer insulating film on a semiconductor substrate, the step of making interconnection groove in the interlayer insulating film, the step of filling the inside of the interconnection groove with a conductive film which is made of a first substance and is thicker than the depth of the interconnection groove, the step of thermally stabilizing the size of crystal grains in an Al film either at the same time or after the Al film has been formed, the step of forming a Cu film on the Al film, the step of selectively forming null phase layers in a crystal grain boundary of the Al film by causing Cu to selectively diffuse into the crystal grain boundary of Al film and of allowing the null phase layers to divide the Al film in the interconnection groove into fine Al interconnections shorter than the Blech critical length, and the step of removing the Al film and Cu film outside the interconnection groove.

摘要翻译： 本发明的半导体器件制造方法具有在半导体衬底上形成层间绝缘膜的步骤，在层间绝缘膜中形成互连槽的步骤，用导电膜填充互连槽的内部的步骤 由第一物质制成并且比互连槽的深度厚，在Al膜同时或在Al膜形成之后热稳定晶粒尺寸的步骤，形成 Al膜上的Cu膜，通过使Cu选择性地扩散到Al膜的晶粒边界并允许θ相层分割Al膜，在Al膜的晶粒边界中选择性地形成θ相层的步骤 在互连槽中成为比Blech临界长度短的精细Al互连，以及除去Interconnec外部的Al膜和Cu膜的步骤 沟槽。