公开(公告)号：US6054876A

公开(公告)日：2000-04-25

申请号：US118072

申请日：1998-07-17

申请人： Masakiyo Horie ,  Hirofumi Isomura ,  Takuya Harada

发明人： Masakiyo Horie ,  Hirofumi Isomura ,  Takuya Harada

IPC分类号： H03F3/30 ,  H03F3/45 ,  H03F3/68 ,  H03K19/0185 ,  H03K19/0175 ,  H03K17/687 ,  H03K19/003 ,  H03K19/094

CPC分类号： H03F3/3032 ,  H03F3/45183 ,  H03K19/018521 ,  H03F2203/45641 ,  H03F2203/45674

摘要： A buffer circuit includes a signal input terminal and a signal output terminal. A first operational amplifier includes a differential amplifier circuit having an input transistor of an N-channel MOS type. The first operational amplifier has an inverting input terminal and an output terminal connected to each other. The first operational amplifier has a non-inverting input terminal connected to the signal input terminal. A second operational amplifier includes a differential amplifier circuit having an input transistor of a P-channel MOS type. The second operational amplifier has an inverting input terminal and an output terminal connected to each other. The second operational amplifier has a non-inverting input terminal connected to the signal input terminal. A first switching device operates for connecting the output terminal of the first operational amplifier to the signal output terminal when a voltage of an input signal applied to the signal input terminal is in a range where the first operational amplifier is operative. A second switching device operates for connecting the output terminal of the second operational amplifier to the signal output terminal when the voltage of the input signal applied to the signal input terminal is in a range where the second operational amplifier is operative.

摘要翻译： 缓冲电路包括信号输入端和信号输出端。 第一运算放大器包括具有N沟道MOS型输入晶体管的差分放大器电路。 第一运算放大器具有彼此连接的反相输入端子和输出端子。 第一运算放大器具有连接到信号输入端的非反相输入端。 第二运算放大器包括具有P沟道MOS型输入晶体管的差分放大器电路。 第二运算放大器具有相互连接的反相输入端和输出端。 第二运算放大器具有连接到信号输入端的非反相输入端。 当施加到信号输入端的输入信号的电压处于第一运算放大器工作的范围时，第一开关装置用于将第一运算放大器的输出端连接到信号输出端。 当施加到信号输入端的输入信号的电压处于第二运算放大器工作的范围时，第二开关装置用于将第二运算放大器的输出端连接到信号输出端。

公开(公告)号：US6054887A

公开(公告)日：2000-04-25

申请号：US112284

申请日：1998-07-09

申请人： Masakiyo Horie ,  Takuya Harada

发明人： Masakiyo Horie ,  Takuya Harada

IPC分类号： H03F3/34 ,  H03F1/30 ,  H03L5/00

CPC分类号： H03F1/304

摘要： An offset voltage correction circuit for an operational amplifier (1) includes an offset voltage varying device (16, 17, 20, 21-23) for varying an offset voltage in the operational amplifier (1) in response to an offset voltage control value. A comparing device (25) operates for comparing an output voltage from the operational amplifier (1) with a prescribed reference voltage. A control device (19, 300) operates for outputting the offset voltage control value to the offset voltage varying device, for changing the offset voltage control value, for storing, in response to a result of the comparing by the comparing device (25), a digital signal representative of the offset voltage control value at which the output voltage from the operational amplifier (1) and the prescribed reference voltage are equal, and for correcting the offset voltage in the operational amplifier (1) in response to the stored digital signal.

摘要翻译： 用于运算放大器（1）的偏移电压校正电路包括用于响应于偏移电压控制值改变运算放大器（1）中的偏移电压的偏移电压变化器件（16,17,20,21-23）。 比较装置（25）用于将来自运算放大器（1）的输出电压与规定的参考电压进行比较。 控制装置（19,300）用于将偏移电压控制值输出到偏移电压变化装置，用于改变偏移电压控制值，用于响应于比较装置（25）的比较结果存储， 表示来自运算放大器（1）和规定参考电压的输出电压相等的偏移电压控制值的数字信号，并且用于响应于所存储的数字信号来校正运算放大器（1）中的偏移电压 。

公开(公告)号：US5841301A

公开(公告)日：1998-11-24

申请号：US618620

申请日：1996-03-20

申请人： Masakiyo Horie ,  Takuya Harada

发明人： Masakiyo Horie ,  Takuya Harada

IPC分类号： G01D5/245 ,  G01D5/244 ,  G01R23/06 ,  H03K5/08 ,  H03K5/01

CPC分类号： H03K5/086

摘要： A waveform shaping apparatus includes a comparing device for comparing a sensor output signal with a threshold voltage to convert the sensor output signal into a waveform shaped signal. The comparing device outputs the waveform shaped signal. The waveform shaping apparatus also includes a frequency-to-voltage converting device for generating the threshold voltage in response to a frequency of the output signal from the comparing device. In the frequency-to-voltage converting device, a clock signal is generated in response to the output signal from the comparing device. The clock signal has a period proportional to a period of the output signal from the comparing device. A counting device is operative for counting pulses in the clock signal generated by the clock signal generating device for every given period, and outputting a signal representing a counted pulse number depending on the frequency of the output signal from the comparing device. A D/A converting device is operative for converting the output signal from the counting device into a voltage signal which depends on the counted pulse number. The threshold voltage is generated in response to the voltage signal generated by the D/A converting device.

摘要翻译： 波形整形装置包括比较装置，用于将传感器输出信号与阈值电压进行比较，以将传感器输出信号转换为波形形状信号。 比较装置输出波形整形信号。 波形整形装置还包括频率 - 电压转换装置，用于响应于来自比较装置的输出信号的频率产生阈值电压。 在频率 - 电压转换装置中，响应于来自比较装置的输出信号产生时钟信号。 时钟信号具有与比较装置的输出信号的周期成比例的周期。 计数装置用于对每个给定时间段由时钟信号产生装置产生的时钟信号中的脉冲进行计数，并根据来自比较装置的输出信号的频率输出表示计数脉冲数的信号。 D / A转换装置用于将来自计数装置的输出信号转换成取决于计数的脉冲数的电压信号。 响应于由D / A转换器产生的电压信号产生阈值电压。

公开(公告)号：US20050285769A1

公开(公告)日：2005-12-29

申请号：US11052474

申请日：2005-02-08

申请人： Takuya Harada ,  Masakiyo Horie ,  Takuya Honda ,  Nobuyuki Tanaka

发明人： Takuya Harada ,  Masakiyo Horie ,  Takuya Honda ,  Nobuyuki Tanaka

IPC分类号： H03M1/12 ,  H03M1/64

CPC分类号： H03M1/64

摘要： The A/D converter has first and second PPDC circuits (pulse-phase-difference coding circuits). The first PPDC circuit performs A/D conversions on the reference voltage and on the voltage signal amplified by an amplifier in an alternating sequence, the amplifier using the reference voltage as a potential base thereof. The second PPDC circuit performs A/D conversions always on the reference voltage. The A/D-converted data set of the voltage signal outputted from the first PPDC circuit is corrected depending on the difference between the A/D-converted data set of the reference voltage outputted from the second PPDC circuit when the first PPDC circuit A/D-converts the reference voltage and the A/D-converted data set of the reference voltage outputted from the second PPDC circuit when the first PPDC circuit A/D-converts the voltage signal.

摘要翻译： A / D转换器具有第一和第二PPDC电路（脉冲相位差编码电路）。 第一PPDC电路在参考电压和由放大器以交替顺序放大的电压信号上执行A / D转换，放大器使用参考电压作为其电位基极。 第二个PPDC电路总是在参考电压上执行A / D转换。 从第一PPDC电路输出的电压信号的A / D转换数据组根据第一PPDC电路A / D转换后的第一PPDC电路输出的参考电压的A / D转换数据组之间的差被校正， 当第一PPDC电路对电压信号进行A / D转换时，D转换参考电压和从第二PPDC电路输出的参考电压的A / D转换数据集。

公开(公告)号：US5708378A

公开(公告)日：1998-01-13

申请号：US455895

申请日：1995-05-31

申请人： Masakiyo Horie ,  Takuya Harada

发明人： Masakiyo Horie ,  Takuya Harada

IPC分类号： G01P3/481 ,  G01P3/48 ,  G01P3/489 ,  G01R23/06 ,  G01R23/15 ,  H03D3/04 ,  H03K9/06

CPC分类号： G01P3/4805 ,  H03K9/06 ,  G01R23/06 ,  H03D3/04

摘要： In a frequency-to-voltage converting circuit, a clamping frequency is maintained constant without being adversely influenced by circuit constants, and temperature characteristics. The frequency-to-voltage converting apparatus has voltage converting means for converting a frequency of an input pulse signal into a voltage, arranged by frequency judging means for judging whether or not the frequency of the input pulse signal reaches a predetermined clamping frequency. Setting pulse signal generating means outputs a setting pulse signal having the clamping frequency, and means for causing the voltage converting means to convert the frequency of the input pulse signal into the voltage when the frequency of the input pulse signal does not reach the clamping frequency based on a judgement result of the frequency judging means. The voltage converting means is caused to convert the clamping frequency of the setting pulse signal derived from the setting pulse signal generating means when the frequency of the input pulse signal reaches the clamping frequency.

摘要翻译： 在频率 - 电压转换电路中，钳位频率保持恒定，而不受电路常数和温度特性的不利影响。 频率 - 电压转换装置具有电压转换装置，用于将输入脉冲信号的频率转换为电压，由频率判断装置设置，用于判断输入脉冲信号的频率是否达到预定的钳位频率。 设置脉冲信号发生装置输出具有钳位频率的设置脉冲信号，以及用于当输入脉冲信号的频率未达到钳位频率时使电压转换装置将输入脉冲信号的频率转换为电压的装置 关于频率判断装置的判断结果。 当输入脉冲信号的频率达到钳位频率时，电压转换装置转换从设置脉冲信号产生装置导出的设置脉冲信号的钳位频率。

公开(公告)号：US07030803B2

公开(公告)日：2006-04-18

申请号：US11052474

申请日：2005-02-08

申请人： Takuya Harada ,  Masakiyo Horie ,  Takuya Honda ,  Nobuyuki Tanaka

发明人： Takuya Harada ,  Masakiyo Horie ,  Takuya Honda ,  Nobuyuki Tanaka

IPC分类号： H03M1/60

CPC分类号： H03M1/64

摘要： The A/D converter has first and second PPDC circuits (pulse-phase-difference coding circuits). The first PPDC circuit performs A/D conversions on the reference voltage and on the voltage signal amplified by an amplifier in an alternating sequence, the amplifier using the reference voltage as a potential base thereof. The second PPDC circuit performs A/D conversions always on the reference voltage. The A/D-converted data set of the voltage signal outputted from the first PPDC circuit is corrected depending on the difference between the A/D-converted data set of the reference voltage outputted from the second PPDC circuit when the first PPDC circuit A/D-converts the reference voltage and the A/D-converted data set of the reference voltage outputted from the second PPDC circuit when the first PPDC circuit A/D-converts the voltage signal.

摘要翻译： A / D转换器具有第一和第二PPDC电路（脉冲相位差编码电路）。 第一PPDC电路在参考电压和由放大器以交替顺序放大的电压信号上执行A / D转换，放大器使用参考电压作为其电位基极。 第二个PPDC电路总是在参考电压上执行A / D转换。 从第一PPDC电路输出的电压信号的A / D转换数据组根据第一PPDC电路A / D转换后的第一PPDC电路输出的参考电压的A / D转换数据组之差， 当第一PPDC电路对电压信号进行A / D转换时，D转换参考电压和从第二PPDC电路输出的参考电压的A / D转换数据集。

公开(公告)号：US5742198A

公开(公告)日：1998-04-21

申请号：US687915

申请日：1996-07-29

申请人： Masakiyo Horie ,  Takuya Harada

发明人： Masakiyo Horie ,  Takuya Harada

IPC分类号： G01P3/489 ,  G01D5/244 ,  G01R19/165 ,  H03K5/02 ,  H03K5/08 ,  H03K5/1252 ,  H03B1/00

CPC分类号： G01D5/24476 ,  H03K5/02 ,  H03K5/088

摘要： An input voltage Va and a threshold voltage Vc are compared in a comparator 21 to shaping the waveform of a sensor signal. The period of the output signal of comparator 21 is measured by a period measuring circuit 4. A stepped waveform voltage generating circuit 5 generates a stepped waveform voltage based on the measured period. The stepped waveform voltage is converted into corresponding current in a V-I conversion circuit 6. The current of V-I conversion circuit 6 is supplied to a resistance 23d or 23e via an analog switch 22a or 22b which turns on or off in response to the operation of comparator 21, thereby applying a stepped offset voltage to input voltage Va threshold voltage Vc to perform the hysteresis operation.

摘要翻译： 在比较器21中比较输入电压Va和阈值电压Vc，以对传感器信号的波形进行整形。 比较器21的输出信号的周期由周期测量电路4测量。阶梯波形电压产生电路5基于测量周期产生阶梯波形电压。 在VI转换电路6中将阶梯波形电压转换成相应的电流.VVI转换电路6的电流经由模拟开关22a或22b被提供给电阻23d或22b，模拟开关22a或22b响应于比较器的操作而导通或截止 从而对输入电压Va阈值电压Vc施加阶梯式偏移电压以执行滞后操作。

公开(公告)号：US06954096B2

公开(公告)日：2005-10-11

申请号：US10760489

申请日：2004-01-21

申请人： Kenji Ito ,  Takuya Harada ,  Hirofumi Isomura

发明人： Kenji Ito ,  Takuya Harada ,  Hirofumi Isomura

IPC分类号： H02P7/29 ,  H03K3/017 ,  H03K5/00 ,  H03K5/06 ,  H03K19/003 ,  H03M1/08

CPC分类号： H02M7/48 ,  H02M2001/0012 ,  H02P7/29

摘要： A semiconductor integrated circuit device is provided to reduce the adverse effect of PWM noise occurring in a PWM driving section on an analog voltage processing section in an IC, in which digital and analog circuits are combined on a single chip. A sampling signal generation circuit outputs a sampling signal St to an A/D converter at a predetermined time when “delay time td+allowance time ta” has elapsed from a start signal Sp. The delay time td is shorter than “the minimum time width of H level of PWM signal SPWM1−allowance time ta”. The delay time td is also time from the variation of level of the PWM signal SPWM1 to actual variation in the passage of current through a power section.

摘要翻译： 提供了一种半导体集成电路器件，以减少在PWM驱动部分中产生的PWM噪声对IC中的模拟电压处理部分的不利影响，其中数字和模拟电路组合在单个芯片上。 当从起始信号Sp经过“延迟时间td +容许时间ta”的预定时间时，采样信号产生电路将采样信号St输出到A / D转换器。 延迟时间td短于“PWM信号SPWM 1的容许时间ta”的H电平的最小时间宽度。 延迟时间td也是从PWM信号SPWM 1的电平变化到通过功率部分的电流通过的实际变化的时间。

公开(公告)号：US20130001775A1

公开(公告)日：2013-01-03

申请号：US13634079

申请日：2011-03-18

申请人： Hideo Nishikubo ,  Shunji Masumori ,  Takuya Harada ,  Tomohiro Ishii ,  Hidemichi Fujiwara

发明人： Hideo Nishikubo ,  Shunji Masumori ,  Takuya Harada ,  Tomohiro Ishii ,  Hidemichi Fujiwara

IPC分类号： H01L21/60 ,  H05K1/02 ,  H05K13/04 ,  H01L23/498

CPC分类号： H01L23/4924 ,  H01L21/4853 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13294 ,  H01L2224/13305 ,  H01L2224/13309 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13316 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13323 ,  H01L2224/13324 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/13357 ,  H01L2224/13364 ,  H01L2224/13366 ,  H01L2224/13369 ,  H01L2224/1601 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/2732 ,  H01L2224/2747 ,  H01L2224/29294 ,  H01L2224/29305 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/29317 ,  H01L2224/29318 ,  H01L2224/2932 ,  H01L2224/29323 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29349 ,  H01L2224/29355 ,  H01L2224/29357 ,  H01L2224/29364 ,  H01L2224/29366 ,  H01L2224/29369 ,  H01L2224/3201 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/81075 ,  H01L2224/81125 ,  H01L2224/81127 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81447 ,  H01L2224/8184 ,  H01L2224/83075 ,  H01L2224/83125 ,  H01L2224/83127 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K2203/0338 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A conductive connecting member formed on a bonded face of an electrode terminal of a semiconductor or an electrode terminal of a circuit board, the conductive connecting member comprising a porous body formed in such manner that a conductive paste containing metal fine particles (P) having mean primary particle diameter from 10 to 500 nm and an organic solvent (S), or a conductive paste containing the metal fine particles (P) and an organic dispersion medium (D) comprising the organic solvent (S) and an organic binder (R) is heating-treated so as for the metal fine particles (P) to be bonded, the porous body being formed by bonded metal fine particles (P) having mean primary particle diameter from 10 to 500 nm, a porosity thereof being from 5 to 35 volume %, and mean pore diameter being from 1 to 200 nm.

摘要翻译： 一种形成在半导体的电极端子或电路板的电极端子的接合面上的导电连接构件，所述导电性连接构件包括多孔体，所述多孔体形成为含有具有平均值的金属微粒（P）的导电性糊料 一次粒径为10〜500nm的有机溶剂（S），或包含有机溶剂（S）和有机粘合剂（R）的金属微粒（P）和有机分散介质（D）的导电糊） 对于待接合的金属微粒（P）进行加热处理，多孔体由平均一次粒径为10〜500nm的接合金属微粒（P）形成，孔隙率为5〜35 体积％，平均孔径为1〜200nm。

公开(公告)号：US08277693B2

公开(公告)日：2012-10-02

申请号：US12309739

申请日：2007-07-25

申请人： Takuya Harada ,  Hidemichi Fujiwara ,  Kazuhiro Takashiba ,  Nobumitsu Yamanaka ,  Yusuke Yamada ,  Hideo Nishikubo ,  Takashi Unno

发明人： Takuya Harada ,  Hidemichi Fujiwara ,  Kazuhiro Takashiba ,  Nobumitsu Yamanaka ,  Yusuke Yamada ,  Hideo Nishikubo ,  Takashi Unno

IPC分类号： H01B1/02 ,  H01B1/12

CPC分类号： B22F1/0022 ,  B01F17/0007 ,  B22F9/24 ,  B22F2999/00 ,  B82Y30/00 ,  C01P2004/64 ,  C09C1/62 ,  C09C3/045 ,  C09C3/10 ,  C09D11/36 ,  C09D11/52 ,  H05K1/097 ,  Y10T428/252 ,  B22F2202/11

摘要： A method for producing a fine particle dispersion includes the steps of reducing a metal ion to form a fine particle dispersion aqueous solution; adding an aggregation accelerator into the fine particle dispersion aqueous solution so that agglomerated or precipitated fine particles are separated to obtain fine particles; and re-dispersing the fine particles into an organic solvent containing an organic solvent having an amide group, a low boiling point organic solvent having a boiling point between 20° C. and 100° C. at a normal pressure, and an organic solvent having a boiling point higher than 100° C. at a normal pressure and containing an alcohol and/or a polyhydric alcohol.

摘要翻译： 微粒分散体的制造方法包括：还原金属离子以形成微粒分散水溶液的步骤; 在细颗粒分散水溶液中加入聚集促进剂，使分散或沉淀的微粒分离，得到细颗粒; 并将细颗粒再分散到含有具有酰胺基的有机溶剂的有机溶剂中，在常压下具有沸点在20℃和100℃之间的低沸点有机溶剂，以及具有 在常压下高于100℃的沸点并含有醇和/或多元醇。