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45 条记录 (耗时 0.037 秒)

    Thyristor-based optical XOR circuit
    5.
    发明授权
    Thyristor-based optical XOR circuit 有权
    基于晶闸管的光学异或电路

    公开(公告)号：US09590742B2

    公开(公告)日：2017-03-07

    申请号：US14578805

    申请日：2014-12-22

    申请人： Opel Solar, Inc. ,  The University of Connecticut

    发明人： Geoff W. Taylor

    IPC分类号： G02F3/00 ,  H04B10/66 ,  G02B6/10 ,  H03K19/21

    CPC分类号： H04B10/66 ,  G02B6/10 ,  G02F3/00 ,  H03K19/215

    摘要： An optical XOR circuit that includes a thyristor and control circuitry operably coupled to terminals of the thyristor. The control circuitry is configured to control switching operation of the thyristor in response to the ON/OFF states of two digital optical signal inputs such that the thyristor produces a digital signal output that is the XOR function of the two digital optical signal inputs.

    摘要翻译： 一种光学XOR电路，其包括可操作地耦合到晶闸管的端子的可控硅和控制电路。 控制电路被配置为响应于两个数字光信号输入的ON / OFF状态来控制晶闸管的开关操作，使得晶闸管产生作为两个数字光信号输入的异或功能的数字信号输出。

    Fabrication Methodology For Optoelectronic Integrated Circuits
    6.
    发明申请
    Fabrication Methodology For Optoelectronic Integrated Circuits 有权
    光电集成电路制造方法

    公开(公告)号：US20160365475A1

    公开(公告)日：2016-12-15

    申请号：US14736421

    申请日：2015-06-11

    申请人： Opel Solar, Inc. ,  The University of Connecticut

    发明人： Geoff W. Taylor

    IPC分类号： H01L33/00 ,  H01L33/04 ,  H01L33/02

    CPC分类号： H01L29/66462 ,  H01L33/0025 ,  H01L33/0041 ,  H01L33/0062 ,  H01L33/0075 ,  H01L33/025 ,  H01L33/04 ,  H01L33/06 ,  H01L33/10

    摘要： A method of forming an integrated circuit employs a plurality of layers formed on a substrate including i) n-type modulation doped quantum well structure (MDQWS) structure with n-type charge sheet, ii) p-type MDQWS, iii) undoped spacer layer formed on the n-type charge sheet, iv) p-type layer(s) formed on the undoped spacer layer, v) p-type etch stop layer formed on the p-type layer(s) of iv), and vi) p-type layers (including p-type ohmic contact layer(s)) formed on the p-type etch stop layer. An etch operation removes the p-type layers of vi) for a gate region of an n-channel HFET with an etchant that automatically stops at the p-type etch stop layer. Another etch operation removes the p-type etch stop layer to form a mesa at the p-type layer(s) of iv) which defines an interface to the gate region of the n-channel HFET, and a gate electrode is formed on such mesa.

    摘要翻译： 一种形成集成电路的方法采用在基板上形成的多个层，其包括i）具有n型电荷薄膜的n型调制掺杂量子阱结构（MDQWS）结构，ii）p型MDQWS，iii）未掺杂间隔层 形成在n型电荷片上，iv）形成在未掺杂的间隔层上的p型层，v）形成在iv）的p型层上的p型蚀刻停止层，以及vi） 形成在p型蚀刻停止层上的p型层（包括p型欧姆接触层）。 蚀刻操作移除具有在p型蚀刻停止层处自动停止的蚀刻剂的n沟道HFET的栅极区域的vi的p型层。 另一蚀刻操作移除p型蚀刻停止层，以在限定与n沟道HFET的栅极区域的界面的iv）的p型层上形成台面，并且在其上形成栅极电极 台面。

    POWER SEMICONDUCTOR DEVICE
    7.
    发明申请
    POWER SEMICONDUCTOR DEVICE 有权
    功率半导体器件

    公开(公告)号：US20150349187A1

    公开(公告)日：2015-12-03

    申请号：US14287388

    申请日：2014-05-27

    申请人： Opel Solar, Inc. ,  The University of Connecticut

    发明人： Geoff W. Taylor

    IPC分类号： H01L31/113 ,  H01L31/0232 ,  H01L27/144 ,  G02B6/12 ,  H01L31/0352 ,  G02B6/35 ,  G02B6/42 ,  G02B6/43 ,  H01L31/0224 ,  H01L31/0304

    CPC分类号： H01L31/1136 ,  G02B6/00 ,  G02B6/12 ,  G02B6/29338 ,  G02B6/3596 ,  G02B6/4295 ,  G02B6/43 ,  G02B2006/12145 ,  H01L27/1443 ,  H01L29/0834 ,  H01L29/0839 ,  H01L29/122 ,  H01L29/7392 ,  H01L29/74 ,  H01L29/7424 ,  H01L29/745 ,  H01L29/749 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/03044 ,  H01L31/03046 ,  H01L31/035209

    摘要： A semiconductor device suitable for power applications includes a thyristor epitaxial layer structure defining an anode region offset vertically from a cathode region with a plurality of intermediate regions therebetween. An anode electrode is electrically coupled to the anode region. A cathode electrode is electrically coupled to the cathode region. A switchable current path that extends vertically between the anode region and the cathode region has a conducting state and a non-conducting state. An epitaxial resistive region is electrically coupled to and extends laterally from one of the plurality of intermediate regions. An FET is provided having a channel that is electrically coupled to the epitaxial resistive region. The FET can be configured to inject (or remove) electrical carriers into (or from) the one intermediate region via the epitaxial resistive region in order to switch the switchable current path between its non-conducting state and its conducting state.

    摘要翻译： 适用于功率应用的半导体器件包括限定从阴极区垂直偏移的阳极区的晶闸管外延层结构，其间具有多个中间区。 阳极电极电耦合到阳极区域。 阴极电连接到阴极区。 在阳极区域和阴极区域之间垂直延伸的可切换电流路径具有导通状态和非导通状态。 外延电阻区域电耦合到多个中间区域中的一个并且从其横向延伸。 提供具有电耦合到外延电阻区的沟道的FET。 FET可以被配置为通过外延电阻区域将（或从）一个中间区域注入（或去除）电载体，以便在其导通状态和其导通状态之间切换可切换电流路径。

    Thyristor-based optical flip-flop
    9.
    发明授权
    Thyristor-based optical flip-flop 有权
    基于晶闸管的光学触发器

    公开(公告)号：US09590600B2

    公开(公告)日：2017-03-07

    申请号：US14578893

    申请日：2014-12-22

    申请人： Opel Solar, Inc. ,  The University of Connecticut

    发明人： Geoff W. Taylor

    IPC分类号： H03K3/42 ,  H03K3/352 ,  H03K3/356

    CPC分类号： H03K3/42 ,  H03K3/352 ,  H03K3/356

    摘要： An optical flip-flop circuit that includes an optical thyristor configured to receive a digital optical signal input and produce a digital signal output based on the ON/OFF state of the digital optical signal input. The optical flip-flop circuit further includes control circuitry operably coupled to the terminals of the optical thyristor. The control circuitry is configured to control switching operation of the optical thyristor in response to the level of a digital electrical signal input.

    摘要翻译： 一种光学触发器电路，包括配置成接收数字光信号输入并基于数字光信号输入的ON / OFF状态产生数字信号输出的光晶闸管。 光学触发器电路还包括可操作地耦合到光学晶闸管的端子的控制电路。 控制电路被配置为响应于数字电信号输入的电平来控制光晶闸管的开关操作。

    Optical phase detector for an optical phase lock loop
    10.
    发明授权
    Optical phase detector for an optical phase lock loop 有权
    用于光锁相环的光相位检测器

    公开(公告)号：US09553715B2

    公开(公告)日：2017-01-24

    申请号：US14579066

    申请日：2014-12-22

    申请人： Opel Solar, Inc. ,  The University of Connecticut

    发明人： Geoff W. Taylor

    IPC分类号： H04B10/00 ,  H04L7/00 ,  H04L7/033 ,  H04B10/2575

    CPC分类号： H04L7/0075 ,  H04B10/2575 ,  H04B10/5161 ,  H04B10/541 ,  H04B10/5561 ,  H04B10/613 ,  H04L7/0331

    摘要： An optical phase detector circuit is provided that is suitable for use in an optical phase lock loop. The optical phase detector includes a first optical flip-flop circuit configured to produce a first digital output based on ON/OFF state of a first digital optical input and a digital electrical control signal. A second optical flip-flop circuit is configured to produce a second digital output based on ON/OFF state of a second digital optical input and the digital electrical control signal. An AND gate is operably coupled to both the first and second optical flip-flops. The AND gate produces the digital electrical control signal for supply to the first and second optical flip-flop circuits according to an AND function of the first and second digital outputs produced by the first and second optical flip-flop circuits.

    摘要翻译： 提供了一种适用于光锁相环的光相位检测电路。 光学相位检测器包括：第一光学触发器电路，被配置为基于第一数字光学输入和数字电气控制信号的ON / OFF状态产生第一数字输出。 第二光学触发器电路被配置为基于第二数字光输入和数字电控信号的ON / OFF状态产生第二数字输出。 与门可操作地耦合到第一和第二光学触发器两者。 根据第一和第二光触发器电路产生的第一和第二数字输出的与功能，与门产生数字电控信号，以提供给第一和第二光触发器电路。