公开(公告)号：US20100140759A1

公开(公告)日：2010-06-10

申请号：US12332277

申请日：2008-12-10

申请人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

发明人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

IPC分类号： H01L23/552 ,  H01L21/00

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made by forming a build-up interconnect structure over a substrate. A semiconductor die is mounted to the build-up interconnect structure. The semiconductor die is electrically connected to the build-up interconnect structure. A ground pad is formed on the build-up interconnect structure. An encapsulant is formed over the semiconductor die and build-up interconnect structure. A shielding cage can be formed over the semiconductor die prior to forming the encapsulant. A shielding layer is formed over the encapsulant after forming the build-up interconnect structure to isolate the semiconductor die from inter-device interference. The shielding layer conforms to a geometry of the encapsulant and electrically connects to the ground pad. The shielding layer can be electrically connected to ground through a conductive pillar. The substrate is removed. A backside interconnect structure is formed over the build-up interconnect structure, opposite the semiconductor die.

摘要翻译： 通过在衬底上形成积聚互连结构来制造半导体器件。 半导体管芯安装到堆积互连结构。 半导体管芯与积层互连结构电连接。 在积层互连结构上形成接地焊盘。 在半导体管芯和堆积互连结构之上形成密封剂。 在形成密封剂之前，可以在半导体管芯上方形成屏蔽笼。 在形成积层互连结构之后，在密封剂上形成屏蔽层，以将半导体管芯与器件间干扰隔离。 屏蔽层符合密封剂的几何形状并且电连接到接地垫。 屏蔽层可以通过导电柱电连接到地面。 去除衬底。 在积层互连结构上形成背面互连结构，与半导体管芯相对。

公开(公告)号：US20100270661A1

公开(公告)日：2010-10-28

申请号：US12830390

申请日：2010-07-05

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L23/52

CPC分类号： H01L23/3128 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has an IPD structure formed over a substrate. First and second electrical devices are mounted to a first surface of the IPD structure. An encapsulant is deposited over the first and second electrical devices and IPD structure. A shielding layer is formed over the encapsulant and electrically connected to a conductive channel in the IPD structure. The conductive channel is connected to ground potential to isolate the first and second electrical devices from external interference. A recess can be formed in the encapsulant material between the first and second electrical devices. The shielding layer extends into the recess. An interconnect structure is formed on a second surface of the IPD structure. The interconnect structure is electrically connected to the first and second electrical devices and IPD structure. A shielding cage can be formed over the first electrical device prior to depositing encapsulant.

摘要翻译： 半导体器件具有在衬底上形成的IPD结构。 第一和第二电气装置安装在IPD结构的第一表面上。 密封剂沉积在第一和第二电气设备和IPD结构上。 屏蔽层形成在密封剂之上并电连接到IPD结构中的导电通道。 导电通道连接到地电位，以隔离第一和第二电气装置与外部干扰。 可以在第一和第二电气装置之间的密封剂材料中形成凹部。 屏蔽层延伸到凹槽中。 互连结构形成在IPD结构的第二表面上。 互连结构电连接到第一和第二电气设备和IPD结构。 在沉积密封剂之前，可以在第一电气装置上形成屏蔽笼。

公开(公告)号：US07799602B2

公开(公告)日：2010-09-21

申请号：US12332277

申请日：2008-12-10

申请人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

发明人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made by forming a build-up interconnect structure over a substrate. A semiconductor die is mounted to the build-up interconnect structure. The semiconductor die is electrically connected to the build-up interconnect structure. A ground pad is formed on the build-up interconnect structure. An encapsulant is formed over the semiconductor die and build-up interconnect structure. A shielding cage can be formed over the semiconductor die prior to forming the encapsulant. A shielding layer is formed over the encapsulant after forming the build-up interconnect structure to isolate the semiconductor die from inter-device interference. The shielding layer conforms to a geometry of the encapsulant and electrically connects to the ground pad. The shielding layer can be electrically connected to ground through a conductive pillar. The substrate is removed. A backside interconnect structure is formed over the build-up interconnect structure, opposite the semiconductor die.

摘要翻译： 通过在衬底上形成积聚互连结构来制造半导体器件。 半导体管芯安装到堆积互连结构。 半导体管芯与积层互连结构电连接。 在积层互连结构上形成接地焊盘。 在半导体管芯和堆积互连结构之上形成密封剂。 在形成密封剂之前，可以在半导体管芯上方形成屏蔽笼。 在形成积层互连结构之后，在密封剂上形成屏蔽层，以将半导体管芯与器件间干扰隔离。 屏蔽层符合密封剂的几何形状并且电连接到接地垫。 屏蔽层可以通过导电柱电连接到地面。 去除衬底。 在积层互连结构上形成背面互连结构，与半导体管芯相对。

公开(公告)号：US08436439B2

公开(公告)日：2013-05-07

申请号：US12871401

申请日：2010-08-30

申请人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

发明人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

IPC分类号： H01L27/14 ,  H01L31/00

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made by forming an interconnect structure over a substrate. A semiconductor die is mounted to the interconnect structure. The semiconductor die is electrically connected to the interconnect structure. A ground pad is formed over the interconnect structure. An encapsulant is formed over the semiconductor die and interconnect structure. A shielding cage can be formed over the semiconductor die prior to forming the encapsulant. A shielding layer is formed over the encapsulant after forming the interconnect structure to isolate the semiconductor die with respect to inter-device interference. The shielding layer conforms to a geometry of the encapsulant and electrically connects to the ground pad. The shielding layer can be electrically connected to ground through a conductive pillar. A backside interconnect structure is formed over the interconnect structure, opposite the semiconductor die.

摘要翻译： 通过在衬底上形成互连结构来制造半导体器件。 将半导体管芯安装到互连结构。 半导体管芯与互连结构电连接。 在互连结构上形成接地焊盘。 在半导体管芯和互连结构上形成密封剂。 在形成密封剂之前，可以在半导体管芯上方形成屏蔽笼。 在形成互连结构之后，在密封剂之上形成屏蔽层，以便相对于器件间干扰来隔离半导体管芯。 屏蔽层符合密封剂的几何形状并且电连接到接地垫。 屏蔽层可以通过导电柱电连接到地面。 在互连结构上形成背面互连结构，与半导体管芯相对。

公开(公告)号：US20100320577A1

公开(公告)日：2010-12-23

申请号：US12871401

申请日：2010-08-30

申请人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

发明人： Reza A. Pagaila ,  Rui Huang ,  Yaojian Lin

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made by forming an interconnect structure over a substrate. A semiconductor die is mounted to the interconnect structure. The semiconductor die is electrically connected to the interconnect structure. A ground pad is formed over the interconnect structure. An encapsulant is formed over the semiconductor die and interconnect structure. A shielding cage can be formed over the semiconductor die prior to forming the encapsulant. A shielding layer is formed over the encapsulant after forming the interconnect structure to isolate the semiconductor die with respect to inter-device interference. The shielding layer conforms to a geometry of the encapsulant and electrically connects to the ground pad. The shielding layer can be electrically connected to ground through a conductive pillar. A backside interconnect structure is formed over the interconnect structure, opposite the semiconductor die.

摘要翻译： 通过在衬底上形成互连结构来制造半导体器件。 将半导体管芯安装到互连结构。 半导体管芯与互连结构电连接。 在互连结构上形成接地焊盘。 在半导体管芯和互连结构上形成密封剂。 在形成密封剂之前，可以在半导体管芯上方形成屏蔽笼。 在形成互连结构之后，在密封剂之上形成屏蔽层，以便相对于器件间干扰来隔离半导体管芯。 屏蔽层符合密封剂的几何形状并且电连接到接地垫。 屏蔽层可以通过导电柱电连接到地面。 在互连结构上形成背面互连结构，与半导体管芯相对。

公开(公告)号：US08076757B2

公开(公告)日：2011-12-13

申请号：US12830390

申请日：2010-07-05

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L23/538

CPC分类号： H01L23/3128 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has an IPD structure formed over a substrate. First and second electrical devices are mounted to a first surface of the IPD structure. An encapsulant is deposited over the first and second electrical devices and IPD structure. A shielding layer is formed over the encapsulant and electrically connected to a conductive channel in the IPD structure. The conductive channel is connected to ground potential to isolate the first and second electrical devices from external interference. A recess can be formed in the encapsulant material between the first and second electrical devices. The shielding layer extends into the recess. An interconnect structure is formed on a second surface of the IPD structure. The interconnect structure is electrically connected to the first and second electrical devices and IPD structure. A shielding cage can be formed over the first electrical device prior to depositing encapsulant.

摘要翻译： 半导体器件具有在衬底上形成的IPD结构。 第一和第二电气装置安装在IPD结构的第一表面上。 密封剂沉积在第一和第二电气设备和IPD结构上。 屏蔽层形成在密封剂之上并电连接到IPD结构中的导电通道。 导电通道连接到地电位，以隔离第一和第二电气装置与外部干扰。 可以在第一和第二电气装置之间的密封剂材料中形成凹部。 屏蔽层延伸到凹槽中。 互连结构形成在IPD结构的第二表面上。 互连结构电连接到第一和第二电气设备和IPD结构。 在沉积密封剂之前，可以在第一电气装置上形成屏蔽笼。

公开(公告)号：US07772046B2

公开(公告)日：2010-08-10

申请号：US12133133

申请日：2008-06-04

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L21/58

CPC分类号： H01L23/3128 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is made by forming an integrated passive device (IPD) structure on a substrate, mounting first and second electrical devices to a first surface of the IPD structure, depositing encapsulant over the first and second electrical devices and IPD structure, forming a shielding layer over the encapsulant, and electrically connecting the shielding layer to a conductive channel in the IPD structure. The conductive channel is connected to ground potential to isolate the first and second electrical devices from external interference. A recess can be formed in the encapsulant material between the first and second electrical devices. The shielding layer extends into the recess. An interconnect structure is formed on a second surface of the IPD structure. The interconnect structure is electrically connected to the first and second electrical devices and IPD structure. A shielding cage can be formed over the first electrical device prior to depositing encapsulant.

摘要翻译： 通过在基板上形成集成的无源器件（IPD）结构，将第一和第二电气器件安装到IPD结构的第一表面上，在第一和第二电气设备和IPD结构上形成密封剂，形成半导体器件，形成屏蔽 层，并且将屏蔽层电连接到IPD结构中的导电通道。 导电通道连接到地电位，以隔离第一和第二电气装置与外部干扰。 可以在第一和第二电气装置之间的密封剂材料中形成凹部。 屏蔽层延伸到凹槽中。 互连结构形成在IPD结构的第二表面上。 互连结构电连接到第一和第二电气设备和IPD结构。 在沉积密封剂之前，可以在第一电气装置上形成屏蔽笼。

公开(公告)号：US20090302439A1

公开(公告)日：2009-12-10

申请号：US12133133

申请日：2008-06-04

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L21/56 ,  H01L23/02

CPC分类号： H01L23/3128 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is made by forming an integrated passive device (IPD) structure on a substrate, mounting first and second electrical devices to a first surface of the IPD structure, depositing encapsulant over the first and second electrical devices and IPD structure, forming a shielding layer over the encapsulant, and electrically connecting the shielding layer to a conductive channel in the IPD structure. The conductive channel is connected to ground potential to isolate the first and second electrical devices from external interference. A recess can be formed in the encapsulant material between the first and second electrical devices. The shielding layer extends into the recess. An interconnect structure is formed on a second surface of the IPD structure. The interconnect structure is electrically connected to the first and second electrical devices and IPD structure. A shielding cage can be formed over the first electrical device prior to depositing encapsulant.

摘要翻译： 通过在基板上形成集成的无源器件（IPD）结构，将第一和第二电气器件安装到IPD结构的第一表面上，在第一和第二电气设备和IPD结构上形成密封剂，形成半导体器件，形成屏蔽 层，并且将屏蔽层电连接到IPD结构中的导电通道。 导电通道连接到地电位，以隔离第一和第二电气装置与外部干扰。 可以在第一和第二电气装置之间的密封剂材料中形成凹部。 屏蔽层延伸到凹槽中。 互连结构形成在IPD结构的第二表面上。 互连结构电连接到第一和第二电气设备和IPD结构。 在沉积密封剂之前，可以在第一电气装置上形成屏蔽笼。

公开(公告)号：US09875911B2

公开(公告)日：2018-01-23

申请号：US12714190

申请日：2010-02-26

申请人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo ,  HeeJo Chi

发明人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo ,  HeeJo Chi

IPC分类号： H01L23/52 ,  H01L21/56 ,  H01L21/683 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/16 ,  H01L23/00 ,  H01L23/552

CPC分类号： H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48157 ,  H01L2224/48158 ,  H01L2224/4816 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81001 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/207 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device has an interposer mounted over a carrier. The interposer includes TSV formed either prior to or after mounting to the carrier. An opening is formed in the interposer. The interposer can have two-level stepped portions with a first vertical conduction path through a first stepped portion and second vertical conduction path through a second stepped portion. A first and second semiconductor die are mounted over the interposer. The second die is disposed within the opening of the interposer. A discrete semiconductor component can be mounted over the interposer. A conductive via can be formed through the second die or encapsulant. An encapsulant is deposited over the first and second die and interposer. A portion of the interposer can be removed to that the encapsulant forms around a side of the semiconductor device. An interconnect structure is formed over the interposer and second die.

公开(公告)号：US09337116B2

公开(公告)日：2016-05-10

申请号：US12914878

申请日：2010-10-28

申请人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

发明人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/31 ,  H01L23/13 ,  H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L23/498 ,  H01L25/03 ,  H01L25/10

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/8091 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655

摘要： A semiconductor substrate has a plurality of different size recesses formed in the substrate to provide a stepped interposer. A conductive via can be formed through the stepped interposer. An insulating layer follows a contour of the stepped interposer. A conductive layer is formed over the insulating layer following the contour of the stepped interposer. A first semiconductor die is partially disposed in a first recess and electrically connected to the conductive layer. A second semiconductor die is partially disposed in a second recess and electrically connected to the conductive layer. The first semiconductor die is electrically connected to the second semiconductor die through the conductive layer. The first and second semiconductor die can be flipchip type semiconductor die. An encapsulant is deposited over the first and second semiconductor die. A portion of the stepped interposer can be removed to reduce thickness.

摘要翻译： 半导体衬底具有形成在衬底中的多个不同尺寸的凹部以提供阶梯式插入器。 可以通过阶梯式内插器形成导电通孔。 绝缘层遵循阶梯式插入器的轮廓。 在阶梯式插入件的轮廓之后，在绝缘层之上形成导电层。 第一半导体管芯部分地设置在第一凹部中并电连接到导电层。 第二半导体管芯部分地设置在第二凹部中并电连接到导电层。 第一半导体管芯通过导电层与第二半导体管芯电连接。 第一和第二半导体管芯可以是倒装芯片型半导体管芯。 密封剂沉积在第一和第二半导体管芯上。 可以去除部分阶梯式内插器以减小厚度。