公开(公告)号：US20150062829A1

公开(公告)日：2015-03-05

申请号：US14339075

申请日：2014-07-23

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Do Jae YOO ,  Jae Hyun LIM ,  Sun Ho KIM

IPC: H05K1/11 ,  H05K3/30 ,  H05K5/06

CPC classification number: H01L23/3121 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/19107 ,  Y10T29/4913 ,  H01L2924/00

Abstract: There are provided an electronic device module capable of increasing a degree of integration by mounting electronic components on both surfaces of a board, and a manufacturing method thereof. The electronic device module includes a board having mounting electrodes formed on both surfaces thereof, a plurality of electronic devices mounted on the mounting electrodes, a molded portion sealing the electronic devices, at least one connection wire having one end bonded to one surface of the board and the other end exposed to the outside of the molded portion, and an external connection terminal coupled to the other end of the connection wire.

Abstract translation: 提供一种能够通过在电路板的两个表面上安装电子元件来提高集成度的电子设备模块及其制造方法。 该电子装置模块包括一个板，它具有形成在其两个表面上的安装电极，安装在安装电极上的多个电子装置，密封电子装置的模制部分，至少一个连接线，其一端接合到该板的一个表面 并且另一端露出到模制部分的外侧，以及外部连接端子，其连接到连接线的另一端。

公开(公告)号：US20170178992A1

公开(公告)日：2017-06-22

申请号：US15205483

申请日：2016-07-08

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sung Won JEONG ,  Ji Hoon KIM ,  Sun Ho KIM ,  Shang Hoon SEO ,  Seung Yeop KOOK ,  Christian ROMERO

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L23/3157 ,  H01L23/295 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/552 ,  H01L23/562 ,  H01L24/10 ,  H01L24/20 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2225/00 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1432 ,  H01L2924/14335 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512

Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a component disposition region defined by an inner wall of the frame surrounding the electronic component, and an encapsulant filling at least a portion of the component disposition region. A portion of the inner wall of the frame forms a protrusion protruding toward the electronic component.

公开(公告)号：US20170125318A1

公开(公告)日：2017-05-04

申请号：US15192634

申请日：2016-06-24

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kyoung Moo HARR ,  Ji Hoon KIM ,  Kyung Seob OH ,  Sun Ho KIM

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/29 ,  H01L23/48

CPC classification number: H01L24/16 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L29/0657 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/3025 ,  H01L2924/3512

Abstract: An electronic component package includes a redistribution layer, an electronic component disposed on the redistribution layer, and an encapsulant encapsulating the electronic component. The electronic component has a trench formed in one side thereof.

公开(公告)号：US20150145076A1

公开(公告)日：2015-05-28

申请号：US14171387

申请日：2014-02-03

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Tae Hyun KIM ,  Heung Woo PARK ,  Sun Ho KIM

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C1/00301 ,  B81C1/0023 ,  B81C1/00238 ,  B81C2203/0154 ,  H01L2224/16145 ,  H01L2224/16245 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/18161

Abstract: There is provided a semiconductor package including: an application specific integrated circuit (ASIC) chip including a first bump ball and a second bump ball formed inwardly of the first bump ball; a micro electro mechanical system (MEMS) sensor electrically connected to the second bump ball; a lead frame electrically connected to the first bump ball and including a through hole formed therein; and a molded part covering the ASIC chip, the MEMS sensor, and the lead frame, wherein the ASIC chip is disposed above the lead frame.

Abstract translation: 提供了一种半导体封装，包括：专用集成电路（ASIC）芯片，其包括形成在第一凸块球内部的第一凸块球和第二凸块球; 电连接到第二凸块球的微机电系统（MEMS）传感器; 电连接到所述第一凸块球并且包括形成在其中的通孔的引线框架; 以及覆盖ASIC芯片，MEMS传感器和引线框架的模制部件，其中ASIC芯片设置在引线框架上方。

公开(公告)号：US20160353572A1

公开(公告)日：2016-12-01

申请号：US15016136

申请日：2016-02-04

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hyun LIM ,  Jong Man KIM ,  Jin Su KIM ,  Heung Woo PARK ,  Sun Ho KIM ,  Jung Gon CHOI

IPC: H05K1/11 ,  H05K3/46 ,  H05K1/02

Abstract: A printed circuit board, a semiconductor package, and a method of producing the same are provided. The printed circuit board (PCB) includes an insulating layer and a circuit layer including metal pads exposed on a side surface and a lower surface of the insulating layer.

Abstract translation: 提供一种印刷电路板，半导体封装及其制造方法。 印刷电路板（PCB）包括绝缘层和包括暴露在绝缘层的侧表面和下表面上的金属焊盘的电路层。

公开(公告)号：US20150329356A1

公开(公告)日：2015-11-19

申请号：US14711454

申请日：2015-05-13

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jong Woo HAN ,  Sun Ho KIM ,  Heung Woo PARK

IPC: B81C1/00 ,  B81B3/00

CPC classification number: B81C1/00182 ,  B81B3/0072 ,  B81C1/00825

Abstract: There are provided a micro electro mechanical systems (MEMS) structure and a method of manufacturing the same. The MEMS structure includes: a middle structure including an insulating layer, a circuit layer formed on the insulating layer, a mass formed beneath the insulating layer, and supports formed so as to be spaced apart from sides of the mass, and having corner portions of sides formed in a concave shape; an upper structure formed so as to enclose an upper portion of the middle structure; and a lower structure formed so as to enclose a lower portion of the middle structure.

Abstract translation: 提供了微机电系统（MEMS）结构及其制造方法。 MEMS结构包括：中间结构，其包括绝缘层，形成在绝缘层上的电路层，形成在绝缘层下面的质量，以及形成为与物质的侧面间隔开的支撑件，并且具有角部 侧面形成为凹形; 形成为包围中间结构的上部的上部结构; 以及形成为包围中间结构的下部的下部结构。

公开(公告)号：US20150223361A1

公开(公告)日：2015-08-06

申请号：US14260007

申请日：2014-04-23

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hyun LIM ,  Jong In RYU ,  Sun Ho KIM ,  Eun Jung JO ,  Kyu Hwan OH ,  Do Jae YOO

IPC: H05K7/02 ,  H05K13/04 ,  H05K3/34

CPC classification number: H05K3/3478 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/111 ,  H05K1/115 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/321 ,  H05K3/4015 ,  H05K2201/09409 ,  H05K2201/09436 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10787 ,  H05K2203/0228 ,  H05K2203/1316 ,  H01L2924/00012

Abstract: There are provided an electronic component module capable of increasing a degree of integration by mounting electronic components on both surfaces of a substrate, and a manufacturing method thereof. The electronic component module according to an exemplary embodiment of the present disclosure includes: a substrate; a plurality of electronic components mounted on both surfaces of the substrate; connection conductors each having one end bonded to one surface of the substrate using an conductive adhesive; and a molded portion having the connection conductor embedded therein and formed on one surface of the substrate, wherein the connection conductor may have at least one blocking member preventing a spread of the conductive adhesive.

Abstract translation: 提供一种能够通过将电子部件安装在基板的两个表面上而提高集成度的电子部件模块及其制造方法。 根据本公开的示例性实施例的电子部件模块包括：基板; 安装在所述基板的两个表面上的多个电子部件; 连接导体各自具有使用导电粘合剂结合到基板的一个表面的一端; 以及模制部分，其具有嵌入其中并且形成在基板的一个表面上的连接导体，其中连接导体可以具有防止导电粘合剂扩散的至少一个阻挡构件。

公开(公告)号：US20190088566A1

公开(公告)日：2019-03-21

申请号：US15895604

申请日：2018-02-13

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Seung Soo HA ,  Hyeon Seok LEE ,  Sun Ho KIM

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/3128 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/49816 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/18 ,  H05K1/185 ,  H01L2924/00015 ,  H01L2924/0001

Abstract: A fan-out semiconductor package includes a core member having a through-hole. A semiconductor chip is in the through-hole and has an active surface with connection pads and an inactive surface opposing the active surface. An encapsulant encapsulates at least portions of the core member and the semiconductor chip and fills at least a portion of the through-hole. A connection member is on the core member and the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads. The core member includes a groove portion penetrating from a wall of the through-hole up to an outer side surface of the core member in a lower portion of the core member on which the connection member is disposed.

公开(公告)号：US20170133309A1

公开(公告)日：2017-05-11

申请号：US15336288

申请日：2016-10-27

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Ho KIM ,  Ji Hoon KIM ,  Ha Young AHN ,  Shang Hoon SEO ,  Seung Yeop KOOK ,  Sung Won JEONG

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/02331 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/18162 ,  H01L2924/3512

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.

公开(公告)号：US20180342452A1

公开(公告)日：2018-11-29

申请号：US16038956

申请日：2018-07-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Ho KIM ,  Ji Hoon KIM ,  Ha Young AHN ,  Shang Hoon SEO ,  Seung Yeop KOOK ,  Sung Won JEONG

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L23/13

CPC classification number: H01L23/49838 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/02331 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/18162 ,  H01L2924/3512

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.