公开(公告)号：US20130264721A1

公开(公告)日：2013-10-10

申请号：US13440478

申请日：2012-04-05

申请人： Stefan Landau ,  Joachim Mahler ,  Khalil Hosseini ,  Ivan Nikitin ,  Thomas Wowra ,  Lukas Ossowski

发明人： Stefan Landau ,  Joachim Mahler ,  Khalil Hosseini ,  Ivan Nikitin ,  Thomas Wowra ,  Lukas Ossowski

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L23/3121 ,  H01L21/563 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49572 ,  H01L23/49575 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/27436 ,  H01L2224/2902 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/321 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/73253 ,  H01L2224/73269 ,  H01L2224/81191 ,  H01L2224/83191 ,  H01L2224/83801 ,  H01L2224/8485 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： The electronic module includes a first carrier and a first semiconductor chip arranged on the first carrier. A second semiconductor chip is arranged above the first semiconductor chip. A material layer adheres the second semiconductor chip to the first carrier and encapsulates the first semiconductor chip.

摘要翻译： 电子模块包括第一载体和布置在第一载体上的第一半导体芯片。 第二半导体芯片布置在第一半导体芯片的上方。 材料层将第二半导体芯片粘附到第一载体并封装第一半导体芯片。

公开(公告)号：US08749075B2

公开(公告)日：2014-06-10

申请号：US13602359

申请日：2012-09-04

申请人： Joachim Mahler ,  Lukas Ossowski ,  Khalil Hosseini ,  Ivan Nikitin

发明人： Joachim Mahler ,  Lukas Ossowski ,  Khalil Hosseini ,  Ivan Nikitin

IPC分类号： H01L23/28 ,  H01L23/29

CPC分类号： H01L21/568 ,  H01L21/6836 ,  H01L23/3107 ,  H01L23/42 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2224/04105 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/2936 ,  H01L2224/29364 ,  H01L2224/29499 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32245 ,  H01L2224/73104 ,  H01L2224/73253 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/96 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2924/00

摘要： An integrated circuit is provided. The integrated circuit includes: a chip and encapsulation material covering at least three sides of the chip, the encapsulation material being formed from adhesive material. The integrated circuit includes a carrier adhered to the chip by means of the encapsulation material.

摘要翻译： 提供集成电路。 集成电路包括：芯片和封装材料，其覆盖芯片的至少三个侧面，封装材料由粘合材料形成。 集成电路包括通过封装材料粘附到芯片的载体。

公开(公告)号：US20140061878A1

公开(公告)日：2014-03-06

申请号：US13602359

申请日：2012-09-04

申请人： Joachim Mahler ,  Lukas Ossowski ,  Khalil Hosseini ,  Ivan Nikitin

发明人： Joachim Mahler ,  Lukas Ossowski ,  Khalil Hosseini ,  Ivan Nikitin

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/495

CPC分类号： H01L21/568 ,  H01L21/6836 ,  H01L23/3107 ,  H01L23/42 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2224/04105 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/2936 ,  H01L2224/29364 ,  H01L2224/29499 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32245 ,  H01L2224/73104 ,  H01L2224/73253 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/96 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2924/00

摘要： An integrated circuit is provided. The integrated circuit includes: a chip and encapsulation material covering at least three sides of the chip, the encapsulation material being formed from adhesive material. The integrated circuit includes a carrier adhered to the chip by means of the encapsulation material.

摘要翻译： 提供集成电路。 集成电路包括：芯片和封装材料，其覆盖芯片的至少三个侧面，封装材料由粘合材料形成。 集成电路包括通过封装材料粘附到芯片的载体。

公开(公告)号：US20130134589A1

公开(公告)日：2013-05-30

申请号：US13304795

申请日：2011-11-28

申请人： Manfred Mengel ,  Thomas Wowra ,  Joachim Mahler ,  Khalil Hosseini

发明人： Manfred Mengel ,  Thomas Wowra ,  Joachim Mahler ,  Khalil Hosseini

IPC分类号： H01L23/48 ,  H01L21/78

CPC分类号： H01L23/3677 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82005 ,  H01L2224/82039 ,  H01L2224/82101 ,  H01L2224/96 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2224/82 ,  H01L2924/00014

摘要： A chip-package includes a chip-carrier configured to carry a chip, the chip arranged over a chip-carrier side, wherein the chip-carrier side is configured in electrical connection with a chip back side; an insulation material including: a first insulation portion formed over a first chip lateral side; a second insulation portion formed over a second chip lateral side, wherein the first chip lateral side and the second chip lateral side each abuts opposite edges of the chip back side; and a third insulation portion formed over at least part of a chip front side, the chip front side including one or more electrical contacts formed within the chip front side; wherein at least part of the first insulation portion is arranged over the chip-carrier side and wherein the first insulation portion is configured to extend in a direction perpendicular to the first chip lateral side further than the chip-carrier.

摘要翻译： 芯片组包括芯片载体，芯片载体被配置为承载芯片，芯片布置在芯片载体侧上，其中芯片载体侧被配置为与芯片背面电连接; 绝缘材料，包括：形成在第一芯片侧面上的第一绝缘部分; 形成在第二芯片侧面上的第二绝缘部，其中所述第一芯片侧面和所述第二芯片侧面各自邻接所述芯片背面的相对边缘; 以及第三绝缘部分，形成在芯片前侧的至少一部分上，所述芯片前侧包括形成在所述芯片前侧内的一个或多个电触头; 其中所述第一绝缘部分的至少一部分布置在所述芯片载体侧上，并且其中所述第一绝缘部分被配置为在垂直于所述第一芯片横向侧的方向上比所述芯片载体更远。

公开(公告)号：US20140042603A1

公开(公告)日：2014-02-13

申请号：US13570783

申请日：2012-08-09

申请人： Khalil Hosseini ,  Joachim Mahler ,  Ivan Nikitin ,  Gottfried Beer

发明人： Khalil Hosseini ,  Joachim Mahler ,  Ivan Nikitin ,  Gottfried Beer

IPC分类号： B23K1/20 ,  H01L23/48 ,  H01L21/78 ,  H01L23/495

CPC分类号： H01L24/27 ,  H01L23/14 ,  H01L23/49579 ,  H01L23/49883 ,  H01L24/05 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/2741 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/32245 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8382 ,  H01L2224/8384 ,  H01L2224/83856 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/00

摘要： A semiconductor device includes an electrically conducting carrier and a semiconductor chip disposed over the carrier. The semiconductor device also includes a porous diffusion solder layer provided between the carrier and the semiconductor chip.

摘要翻译： 半导体器件包括导电载体和设置在载体上的半导体芯片。 半导体器件还包括设置在载体和半导体芯片之间的多孔扩散焊料层。

公开(公告)号：US08872315B2

公开(公告)日：2014-10-28

申请号：US13570783

申请日：2012-08-09

申请人： Khalil Hosseini ,  Joachim Mahler ,  Ivan Nikitin ,  Gottfried Beer

发明人： Khalil Hosseini ,  Joachim Mahler ,  Ivan Nikitin ,  Gottfried Beer

IPC分类号： H01L23/48

CPC分类号： H01L24/27 ,  H01L23/14 ,  H01L23/49579 ,  H01L23/49883 ,  H01L24/05 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/2741 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/32245 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8382 ,  H01L2224/8384 ,  H01L2224/83856 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/00

摘要： A semiconductor device includes an electrically conducting carrier and a semiconductor chip disposed over the carrier. The semiconductor device also includes a porous diffusion solder layer provided between the carrier and the semiconductor chip.

摘要翻译： 半导体器件包括导电载体和设置在载体上的半导体芯片。 半导体器件还包括设置在载体和半导体芯片之间的多孔扩散焊料层。

公开(公告)号：US09093416B2

公开(公告)日：2015-07-28

申请号：US13304795

申请日：2011-11-28

申请人： Manfred Mengel ,  Thomas Wowra ,  Joachim Mahler ,  Khalil Hosseini

发明人： Manfred Mengel ,  Thomas Wowra ,  Joachim Mahler ,  Khalil Hosseini

IPC分类号： H01L23/495 ,  H01L23/02 ,  H01L23/28 ,  H01L23/29 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/367 ,  H01L23/00

CPC分类号： H01L23/3677 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82005 ,  H01L2224/82039 ,  H01L2224/82101 ,  H01L2224/96 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2224/82 ,  H01L2924/00014

摘要： A chip-package includes a chip-carrier configured to carry a chip, the chip arranged over a chip-carrier side, wherein the chip-carrier side is configured in electrical connection with a chip back side; an insulation material including: a first insulation portion formed over a first chip lateral side; a second insulation portion formed over a second chip lateral side, wherein the first chip lateral side and the second chip lateral side each abuts opposite edges of the chip back side; and a third insulation portion formed over at least part of a chip front side, the chip front side including one or more electrical contacts formed within the chip front side; wherein at least part of the first insulation portion is arranged over the chip-carrier side and wherein the first insulation portion is configured to extend in a direction perpendicular to the first chip lateral side further than the chip-carrier.

摘要翻译： 芯片组包括芯片载体，芯片载体被配置为承载芯片，芯片布置在芯片载体侧上，其中芯片载体侧被配置为与芯片背面电连接; 绝缘材料，包括：形成在第一芯片侧面上的第一绝缘部分; 形成在第二芯片侧面上的第二绝缘部，其中所述第一芯片侧面和所述第二芯片侧面各自邻接所述芯片背面的相对边缘; 以及第三绝缘部分，形成在芯片前侧的至少一部分上，所述芯片前侧包括形成在所述芯片前侧内的一个或多个电触头; 其中所述第一绝缘部分的至少一部分布置在所述芯片载体侧上，并且其中所述第一绝缘部分被配置为在垂直于所述第一芯片横向侧的方向上比所述芯片载体更远。

公开(公告)号：US20080067667A1

公开(公告)日：2008-03-20

申请号：US11755035

申请日：2007-05-30

申请人： Joachim Mahler ,  Stefan Landau ,  Eduard Knauer ,  Khalil Hosseini ,  Manfred Mengel

发明人： Joachim Mahler ,  Stefan Landau ,  Eduard Knauer ,  Khalil Hosseini ,  Manfred Mengel

IPC分类号： H01L23/08 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： The invention relates to a semiconductor device (1) comprising a semiconductor chip stack (2) and a plastic housing (3), and to methods for producing the semiconductor device (1). The semiconductor device (1) is constructed on a device carrier (4), on which a first semiconductor chip (5) is fixed by its rear side (6). At least one second semiconductor chip (8) is adhesively bonded by its rear side (9) on the top side (7) of the first semiconductor chip (5) by means of an adhesive layer (10). A second plastic composition (17) is arranged between a first plastic housing composition (11) of the plastic housing (3) and the edge sides (12, 13) of the adhesive layer and the edge sides (14, 15) of the second semiconductor chip (8) and also the top side (16) of the second semiconductor chip (8) in such a way that the first plastic housing composition (11) has no physical contact with the second semiconductor chip (8) and with the adhesive layer (10).

摘要翻译： 本发明涉及包括半导体芯片堆叠（2）和塑料外壳（3）的半导体器件（1）以及用于制造半导体器件（1）的方法。 半导体器件（1）构造在器件载体（4）上，第一半导体芯片（5）由其后侧（6）固定在该器件载体上。 至少一个第二半导体芯片（8）通过其粘合层（10）通过其后侧（9）在第一半导体芯片（5）的顶侧（7）上粘合。 第二塑料组合物（17）布置在塑料壳体（3）的第一塑料外壳组合物（11）和粘合剂层的边缘侧（12,13）之间，第二塑料组合物（17）的边缘侧（14,15） 半导体芯片（8）和第二半导体芯片（8）的顶侧（16），使得第一塑料外壳组合物（11）与第二半导体芯片（8）没有物理接触，并且与粘合剂 层（10）。

公开(公告)号：US20080061449A1

公开(公告)日：2008-03-13

申请号：US11851397

申请日：2007-09-07

申请人： Joachim Mahler ,  Thomas Behrens ,  Reimund Engl ,  Khalil Hosseini ,  Stefan Landau ,  Boris Plikat

发明人： Joachim Mahler ,  Thomas Behrens ,  Reimund Engl ,  Khalil Hosseini ,  Stefan Landau ,  Boris Plikat

IPC分类号： H01L23/12 ,  H01L21/66

CPC分类号： H01L23/12 ,  H01L24/83 ,  H01L2224/83 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

摘要： A semiconductor component arrangement having a semiconductor component, a mount, and an adhesive, wherein the adhesive connects the semiconductor component to the mount and the adhesive contains a marker substance. Also disclosed is a method for inspecting the connection of a semiconductor component to a mount. The semiconductor component is fixed on the mount using an adhesive, wherein the adhesive contains a marker substance, the mount with the semiconductor component is cleaned, and the mount is inspected for residues of the adhesive on the basis of radiation which is characteristic of the marker substance.

摘要翻译： 具有半导体部件，安装件和粘合剂的半导体部件布置，其中所述粘合剂将所述半导体部件连接到所述安装件，并且所述粘合剂包含标记物质。 还公开了一种用于检查半导体部件到安装座的连接的方法。 使用粘合剂将半导体部件固定在安装件上，其中粘合剂包含标记物质，清洁具有半导体部件的安装件，并且基于作为标记特征的辐射来检查安装件的粘合剂残留物 物质。

公开(公告)号：US11189537B2

公开(公告)日：2021-11-30

申请号：US13425589

申请日：2012-03-21

申请人： Khalil Hosseini ,  Joachim Mahler ,  Edward Fuergut

发明人： Khalil Hosseini ,  Joachim Mahler ,  Edward Fuergut

IPC分类号： H01L23/051 ,  H01L21/56 ,  H01L23/495 ,  H01L23/00 ,  H01L23/31

摘要： A circuit package is provided, the circuit package including: an electronic circuit; a metal block next to the electronic circuit; encapsulation material between the electronic circuit and the metal block; a first metal layer structure electrically contacted to at least one first contact on a first side of the electronic circuit; a second metal layer structure electrically contacted to at least one second contact on a second side of the electronic circuit, wherein the second side is opposite to the first side; wherein the metal block is electrically contacted to the first metal layer structure and to the second metal layer structure by means of an electrically conductive medium; and wherein the electrically conductive medium includes a material different from the material of the first and second metal layer structures or has a material structure different from the material of the first and second metal layer structures.