INTERCONNECT STRUCTURES CONTAINING A RUTHENIUM BARRIER FILM AND METHOD OF FORMING
    2.
    发明申请
    INTERCONNECT STRUCTURES CONTAINING A RUTHENIUM BARRIER FILM AND METHOD OF FORMING 审中-公开
    包含椽子膜的互连结构和形成方法

    公开(公告)号:US20080237860A1

    公开(公告)日:2008-10-02

    申请号:US11691897

    申请日:2007-03-27

    IPC分类号: H01L23/52 H01L21/3205

    摘要: Embodiments of the invention provide a method for integrating a Ru barrier film with good barrier properties into Cu metallization. The method includes exposing a substrate to a Ta-, Ti-, or W-containing precursor at a substrate temperature below the thermal decomposition temperature of the Ta-, Ti-, or W-containing precursor on the substrate to form a chemisorbed seed layer of partially decomposed Ta-, Ti-, or W-containing precursor on the substrate. The method further includes depositing a Ru barrier film on the chemisorbed seed layer, and forming bulk Cu metal on the Ru barrier film. According to additional embodiments, an interconnect structure and method of forming are provided.

    摘要翻译: 本发明的实施方案提供了一种将具有良好阻隔性能的Ru阻挡膜整合到Cu金属化中的方法。 该方法包括在低于衬底上的含Ta,Ti或W的前体的热分解温度的衬底温度下将衬底暴露于含Ta,Ti或W的前体,以形成化学吸附的种子层 在基底上部分分解的Ta,Ti或W的前体。 该方法还包括在化学吸附的种子层上沉积Ru阻挡膜,并在Ru阻挡膜上形成块状Cu金属。 根据另外的实施例,提供了互连结构和形成方法。

    Apparatus for thermal and plasma enhanced vapor deposition and method of operating
    3.
    发明申请
    Apparatus for thermal and plasma enhanced vapor deposition and method of operating 审中-公开
    用于热和等离子体增强气相沉积的装置和操作方法

    公开(公告)号:US20070116873A1

    公开(公告)日:2007-05-24

    申请号:US11281376

    申请日:2005-11-18

    IPC分类号: H05H1/24 C23C16/00 G06F19/00

    摘要: A method, computer readable medium, and system for vapor deposition on a substrate that maintain a first assembly of the vapor deposition system at a first temperature, maintain a second assembly of the vapor deposition system at a reduced temperature lower than the first temperature, dispose the substrate in a process space of the first assembly that is vacuum isolated from a transfer space in the second assembly, and deposit a material on the substrate. As such, the system includes a first assembly having a process space configured to facilitate material deposition, a second assembly coupled to the first assembly and having a transfer space to facilitate transfer of the substrate into and out of the deposition system, a substrate stage connected to the second assembly and configured to support the substrate, and a sealing assembly configured to separate the process space from the transfer space. The first assembly is configured to be maintained at a first temperature and the second assembly is configured to be maintained at a reduced temperature lower than the first temperature.

    摘要翻译: 一种用于气相沉积在基板上的方法,计算机可读介质和系统,其将气相沉积系统的第一组件保持在第一温度,将气相沉积系统的第二组件保持在低于第一温度的降低的温度, 所述第一组件的处理空间中的所述衬底与所述第二组件中的传送空间真空隔离,并且将材料沉积在所述衬底上。 因此,该系统包括具有被配置为促进材料沉积的处理空间的第一组件,耦合到第一组件的第二组件,并且具有传输空间以促进衬底进入和离开沉积系统;衬底台连接 并且被配置为支撑所述基板,以及密封组件,其被配置为将所述处理空间与所述传送空间分离。 第一组件被配置为保持在第一温度,并且第二组件构造成保持在低于第一温度的降低的温度。

    METHOD FOR FORMING Cu WIRING
    5.
    发明申请
    METHOD FOR FORMING Cu WIRING 审中-公开
    形成铜线的方法

    公开(公告)号:US20120222782A1

    公开(公告)日:2012-09-06

    申请号:US13496714

    申请日:2010-08-27

    IPC分类号: C21D1/26 B05D5/12 B05D3/02

    摘要: In a Cu wiring forming method which is followed by a post-process including a treatment of a temperature of 500° C. or higher, an adhesion film made of a metal having a lattice spacing that differs from the lattice spacing of Cu by 10% or less is formed on a substrate having a trench and/or a hole in the surface such that the adhesion film is deposited on at least the bottom and side surfaces of the trench and/or hole. A Cu film is formed on the adhesion film to fill the trench and/or hole. An annealing process is performed on the substrate on which the Cu film has been formed at 350° C. or higher. The CU film is polished to leave only the part of the Cu film which corresponds to the trench and/or hole. A cap is formed on the polished Cu film to form a Cu wiring.

    摘要翻译: 在Cu布线形成方法中,其后是包括处理500℃或更高温度的后续处理,由具有不同于Cu的晶格间距的晶格间距的金属制成的粘合膜为10% 或更少的表面形成在具有沟槽和/或孔的衬底上,使得粘附膜沉积在沟槽和/或孔的至少底部和侧表面上。 在粘合膜上形成Cu膜以填充沟槽和/或孔。 在其上形成有Cu膜的基板上进行退火处理为350℃以上。 CU膜被抛光以仅留下对应于沟槽和/或孔的Cu膜的部分。 在抛光的Cu膜上形成盖以形成Cu布线。

    Deposition method
    7.
    发明申请
    Deposition method 有权
    沉积法

    公开(公告)号:US20060029748A1

    公开(公告)日:2006-02-09

    申请号:US11180597

    申请日:2005-07-14

    IPC分类号: C23C16/00 H05H1/24

    摘要: A deposition method for forming a thin film on a processed substrate by supplying a first gas including a metal, nitrogen, and carbon and a second gas reducing the first gas into a process vessel where a substrate holding table for holding the processed substrate is provided inside thereof, the deposition method includes a first step supplying the first process gas into the process vessel, and a second step supplying the second process gas so that the second process gas is-plasma-excited by a plasma-exciting part provided in the process vessel. A content of at least one of the metal, nitrogen, and carbon in the thin film is controlled by changing a radio frequency power applied to the plasma-exciting part.

    摘要翻译: 一种沉积方法,用于通过提供包括金属,氮和碳的第一气体和将第一气体还原到处理容器中来形成薄膜,所述处理容器内设有用于保持处理过的基板的基板保持台, 沉积方法包括将第一工艺气体供应到处理容器中的第一步骤,以及供给第二工艺气体的第二步骤,使得第二工艺气体被设置在处理容器中的等离子体激发部件等离子体激发 。 通过改变施加到等离子体激发部分的射频功率来控制薄膜中的金属,氮和碳中的至少一个的含量。

    Method of forming a tantalum-containing layer from a metalorganic precursor

    公开(公告)号:US20070054047A1

    公开(公告)日:2007-03-08

    申请号:US11218483

    申请日:2005-09-06

    IPC分类号: C23C16/00

    摘要: A method and precursor for forming and integrating a Ta-containing layer in semiconductor processing. The tantalum precursor has the formula (CpR1)(CpR2)TaH(CO), where Cp is a cyclopentadienyl functional group and R1 and R2 are H or alkyl groups. The method includes providing a substrate in a process chamber of a deposition system, and exposing a process gas comprising the tantalum precursor to the substrate to form the Ta-containing layer. The Ta-containing layer may be treated to remove contaminants and modify the layer. The Ta-containing layer may contain tantalum metal, tantalum carbide, tantalum nitride, or tantalum carbonitride, or a combination thereof, and may be deposited in a TCVD, ALD, or PEALD process. A semiconductor device containing a Ta-containing layer formed on a patterned substrate containing one or more vias or trenches is provided.