公开(公告)号：US20190148450A1

公开(公告)日：2019-05-16

申请号：US15809458

申请日：2017-11-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Yu WEI ,  Yen-Liang LIN ,  Kuo-Cheng LEE ,  Hsun-Ying HUANG ,  Hsin-Chi CHEN

IPC: H01L27/146

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a device layer and a trench isolation. The semiconductor substrate has a front side surface and a back side surface opposite to the front side surface. The radiation sensing member is disposed in a photosensitive region of the semiconductor substrate and extends from the front side surface of the semiconductor substrate. The radiation sensing member includes a semiconductor material with an optical band gap energy smaller than 1.77 eV. The device layer is over the front side surface of the semiconductor substrate and the radiation sensing member. The trench isolation is disposed in an isolation region of the semiconductor substrate and extends from the back side surface of the semiconductor substrate.

公开(公告)号：US20160240502A1

公开(公告)日：2016-08-18

申请号：US14622529

申请日：2015-02-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Wei LIN ,  Chen-Shien CHEN ,  Guan-Yu CHEN ,  Tin-Hao KUO ,  Yen-Liang LIN

IPC: H01L23/00 ,  H01L21/66 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L24/16 ,  H01L22/12 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/16105 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/8138 ,  H01L2224/81815 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: An integrated circuit (IC) packaging substrate includes a main body, at least one first conductive line, at least one second conductive line, and at least one protrusion pad. The first conductive line is embedded in the main body. The second conductive line is embedded in the main body. The protrusion pad is disposed on the first conductive line. The protrusion pad protrudes from the main body and is configured to be in electrical contact with a solder portion of a semiconductor chip. A first spacing between the protrusion pad and the second conductive line is determined in accordance with a process deviation of the protrusion pad by the width of the protrusion pad and the width of the first conductive line. Moreover, a semiconductor package having the IC packaging substrate and a manufacturing method of the semiconductor package are also provided.

Abstract translation: 集成电路（IC）封装衬底包括主体，至少一个第一导电线，至少一个第二导电线以及至少一个突起垫。 第一条导线嵌入主体。 第二导线嵌入主体。 突出垫设置在第一导电线上。 突起垫从主体突出并且被构造成与半导体芯片的焊料部分电接触。 突起垫与第二导电线之间的第一间隔根据突起垫的加工偏差与突起垫的宽度和第一导线的宽度来确定。 此外，还提供了具有IC封装基板的半导体封装以及半导体封装的制造方法。

公开(公告)号：US20140110847A1

公开(公告)日：2014-04-24

申请号：US13658895

申请日：2012-10-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Jen TSENG ,  Yen-Liang LIN ,  Tin-Hao KUO ,  Chen-Shien CHEN ,  Mirng-Ji LII

IPC: H01L23/488

CPC classification number: H01L23/488 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13565 ,  H01L2224/13686 ,  H01L2224/16058 ,  H01L2224/16238 ,  H01L2224/81815 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/053 ,  H01L2924/206 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00

Abstract: A bump-on-trace interconnection structure utilizing a lower volume solder joint for joining a conductive metal pillar and a metal line trace includes a conductive metal pillar having a bonding surface having a width WP and a metal line trace, provided on a package substrate, having a top surface with a width WT, where WP is greater than WT. The solder joint is bonded to the bonding surface by wetting across the width WP and bonded predominantly only to the top surface of the metal line trace by wetting predominantly only to the top surface across the width WT.

Abstract translation: 使用用于接合导电金属柱和金属线迹的下部体积焊点的凸起跟踪互连结构包括具有设置在封装衬底上的具有宽度WP和金属线迹线的接合表面的导电金属柱， 具有宽度为WT的顶表面，其中WP大于WT。 焊接接头通过在宽度WP上润湿而粘合到接合表面，并且主要仅通过宽度WT的顶表面仅主要地通过润湿而仅主要地粘合到金属线迹线的顶表面。

公开(公告)号：US20240088195A1

公开(公告)日：2024-03-14

申请号：US18511731

申请日：2023-11-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Yu WEI ,  Yen-Liang LIN ,  Kuo-Cheng LEE ,  Hsun-Ying HUANG ,  Hsin-Chi CHEN

IPC: H01L27/146 ,  H01L31/0352 ,  H01L31/103

CPC classification number: H01L27/14649 ,  H01L27/1461 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14698 ,  H01L31/035272 ,  H01L31/103 ,  H01L27/14621 ,  H01L27/14627 ,  H01L31/0336

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.

公开(公告)号：US20200212244A1

公开(公告)日：2020-07-02

申请号：US16818934

申请日：2020-03-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu WEI ,  Yu-Ting KAO ,  Yen-Liang LIN ,  Wen-I HSU ,  Hsun-Ying HUANG ,  Kuo-Cheng LEE ,  Hsin-Chi CHEN

IPC: H01L31/107 ,  H01L31/0216 ,  H01L31/0352 ,  H01L27/146 ,  H01L31/0232 ,  H01L31/02 ,  H01L31/18 ,  H01L31/0224

Abstract: A photodetector includes: a substrate; a first semiconductor region, the first semiconductor region extending into the substrate from a front side of the substrate; and a second semiconductor region, the second semiconductor region further extending into the substrate from a bottom boundary of the first semiconductor region, wherein when the photodetector operates under a Geiger mode, the second semiconductor region is fully depleted to absorb a radiation source received from a back side of the substrate.

公开(公告)号：US20190157334A1

公开(公告)日：2019-05-23

申请号：US16055758

申请日：2018-08-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu WEI ,  Cheng-Yuan LI ,  Hsin-Chi CHEN ,  Kuo-Cheng LEE ,  Hsun-Ying HUANG ,  Yen-Liang LIN

IPC: H01L27/146

Abstract: The present disclosure is directed to anchor structures and methods for forming anchor structures such that planarization and wafer bonding can be uniform. Anchor structures can include anchor layers formed on a dielectric layer surface and anchor pads formed in the anchor layer and on the dielectric layer surface. The anchor layer material can be selected such that the planarization selectivity of the anchor layer, anchor pads, and the interconnection material can be substantially the same as one another. Anchor pads can provide uniform density of structures that have the same or similar material.

公开(公告)号：US20170084657A1

公开(公告)日：2017-03-23

申请号：US14857657

申请日：2015-09-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Yu WEI ,  Hsin-Chi CHEN ,  Ssu-Chiang WENG ,  Yung-Lung HSU ,  Yen-Liang LIN ,  Chin-Hsun HSIAO

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14689

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a light sensing feature, a negative oxide layer, a gate dielectric layer and a transfer gate. The light sensing feature is configured in the substrate to detect an incoming radiation. The negative oxide layer is over the light sensing feature. The gate dielectric layer is over the negative oxide layer. The transfer gate is over the gate dielectric layer.

公开(公告)号：US20160225729A1

公开(公告)日：2016-08-04

申请号：US14609023

申请日：2015-01-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Feng CHEN ,  Chen-Shien CHEN ,  Sheng-Yu WU ,  Tin-Hao KUO ,  Yen-Liang LIN

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L23/562 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/0346 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05011 ,  H01L2224/05015 ,  H01L2224/05017 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05565 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/35121 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01073 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01024 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01038 ,  H01L2924/01078 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0104 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A semiconductor device includes a substrate, a semiconductor structure, a metal pad, and a stress releasing material. The semiconductor structure is disposed on the substrate. The metal pad is disposed on the semiconductor structure. The metal pad includes a through hole therein. The stress releasing material is disposed in the through hole.

Abstract translation: 半导体器件包括衬底，半导体结构，金属焊盘和应力释放材料。 半导体结构设置在基板上。 金属焊盘设置在半导体结构上。 金属垫在其中包括一个通孔。 应力释放材料设置在通孔中。

公开(公告)号：US20210202564A1

公开(公告)日：2021-07-01

申请号：US17183871

申请日：2021-02-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Yu WEI ,  Yen-Liang LIN ,  Kuo-Cheng LEE ,  Hsun-Ying HUANG ,  Hsin-Chi CHEN

IPC: H01L27/146 ,  H01L31/103 ,  H01L31/0352

Abstract: A method includes providing a semiconductor substrate having a front side surface and a back side surface opposite to the front side surface. A photosensitive region of the semiconductor substrate is etched to form a recess. A semiconductor material is deposited on the semiconductor substrate to form a radiation sensing member filling the recess. The semiconductor material has an optical band gap energy smaller than 1.77 eV. A device layer is formed over the front side surface of the semiconductor substrate and the radiation sensing member. A trench isolation is formed in an isolation region of the semiconductor substrate and extending from the back side surface of the semiconductor substrate.

公开(公告)号：US20190096830A1

公开(公告)日：2019-03-28

申请号：US15906214

申请日：2018-02-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu WEI ,  Cheng-Yuan LI ,  Yen-Liang LIN ,  Kuo-Cheng LEE ,  Hsun-Ying HUANG ,  Hsin-Chi CHEN

IPC: H01L23/00 ,  H01L27/146

Abstract: A semiconductor structure is provided. A first semiconductor device includes a first conductive layer formed over a first substrate; a first etching stop layer formed over the first conductive layer, and the first etching stop layer is in direct contact with the first conductive layer. A first bonding layer is formed over the first etching stop layer, and a first bonding via is formed through the first bonding layer and the first etching stop layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over the second etching stop layer and a second bonding via formed through the second bonding layer and a second etching stop layer. A bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.