公开(公告)号：US5057453A

公开(公告)日：1991-10-15

申请号：US529482

申请日：1990-05-29

申请人： Takashi Endo ,  Hirokazu Ezawa

发明人： Takashi Endo ,  Hirokazu Ezawa

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/532

CPC分类号： H01L23/53252 ,  H01L23/53242 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/1147 ,  H01L2224/13018 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079

摘要： A semiconductor device having a bump electrode on a semiconductor substrate above an electrode pad and metal film. The shape of the bump electrode is composed of a cubical portion and a skirt extending outward from the bottom of the cubical portion. In manufacturing such a semiconductor device, a dry film is used which is laminated on the metal film under a certain laminating condition and formed with an opening. A bump material is formed as a deposit on the metal film within the opening, through electrolytic plating. The deposit has the cubical portion corresponding in shape to the opening, and the skirt extending outward into a space between the dry film and the metal film, from the bottom of the cubical portion. The metal film is etched out using the deposit as a mask to thereby make the deposit as a bump electrode of the semiconductor device.

摘要翻译： 一种在电极焊盘（12）上方的半导体衬底（11）上的凸起电极（16）和金属膜（14a）的半导体器件。 凸起电极（16）的形状由立方体部分和从立方部分的底部向外延伸的裙部（16a）构成。 在制造这样的半导体装置中，使用在特定的层叠条件下层叠在金属膜（14a）上并形成有开口部的干膜。 通过电解电镀，在开口内的金属膜（14a）上形成凸点材料。 沉积物具有与开口形状对应的立方部分，并且裙部（16a）从立方部分的底部向外延伸到干膜和金属膜（14a）之间的空间中。 使用沉积物作为掩模蚀刻出金属膜（14a），从而使沉积物作为半导体器件的凸块电极（16）。

公开(公告)号：US5136363A

公开(公告)日：1992-08-04

申请号：US617380

申请日：1990-11-26

申请人： Takashi Endo ,  Hirokazu Ezawa

发明人： Takashi Endo ,  Hirokazu Ezawa

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/532

CPC分类号： H01L23/53252 ,  H01L23/53242 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/1147 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079

摘要： A semiconductor device having a bump electrode on a semiconductor substrate above an electrode pad and metal film. The shape of the bump electrode is composed of a cubical portion and a skirt extending outward from the bottom of the cubical portion. In manufacturing such a semiconductor device, a dry film is used which is laminated on the metal film under a certain laminating condition and formed with an opening. A bump material is formed as a deposit on the metal film within the opening, through electrolytic plating. The deposit has the cubical portion corresponding in shape to the opening, and the skirt extending outward into a space between the dry film and the metall film, from the bottom of the cubical portion. The metal film is etched out using the deposit as a mask to make the deposit as a bump electrode of the semiconductor device.

摘要翻译： 一种在电极焊盘上方的半导体衬底上具有凸块电极的半导体器件和金属膜。 突起电极的形状由立方体部分和从立方部分的底部向外延伸的裙部组成。 在制造这样的半导体装置中，使用在特定的层叠条件下层压在金属膜上并形成有开口的干膜。 通过电解电镀，在开口内的金属膜上形成凸点材料作为沉积物。 沉积物具有与开口形状对应的立方部分，裙部从立方部分的底部向外延伸到干膜和金属膜之间的空间中。 使用沉积物作为掩模蚀刻出金属膜，以使沉积物作为半导体器件的突起电极。

公开(公告)号：US08703600B2

公开(公告)日：2014-04-22

申请号：US12721741

申请日：2010-03-11

申请人： Tatsuo Migita ,  Hirokazu Ezawa ,  Soichi Yamashita ,  Takashi Togasaki

发明人： Tatsuo Migita ,  Hirokazu Ezawa ,  Soichi Yamashita ,  Takashi Togasaki

IPC分类号： H01L21/00 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06568 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1306 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An electronic component in which an element is formed on a chip includes: a pad that is made of a conductive material and that is formed in a first bump formation region that is two-dimensionally arranged in center of one principle face and in a second bump formation region that is linearly arranged at peripheral border of the principle face; a passivation film that is formed on the principle face to cover portion except a formation position of the pad; a metal layer that is formed on the pad; and a bump that is made of a conductive material and that is formed on the metal layer by plating, wherein radius of the metal layer in the second bump formation region is smaller than radius of at least some of the metal layer in the first bump formation region.

摘要翻译： 其中元件形成在芯片上的电子部件包括：由导电材料制成并且形成在二维布置在一个原理面的中心的第一凸块形成区域中的衬垫和在第二凸起 在原理面的周边边缘线性排列的形成区域; 钝化膜，其形成在除了所述焊盘的形成位置之外的所述原理面上以覆盖部分; 形成在所述垫上的金属层; 以及由导电材料制成并且通过电镀在金属层上形成的凸块，其中第二凸块形成区域中的金属层的半径小于第一凸块形成中的至少一些金属层的半径 地区。

公开(公告)号：US08063487B2

公开(公告)日：2011-11-22

申请号：US12335673

申请日：2008-12-16

申请人： Tatsuo Migita ,  Hirokazu Ezawa ,  Tadashi Iijima ,  Takashi Togasaki

发明人： Tatsuo Migita ,  Hirokazu Ezawa ,  Tadashi Iijima ,  Takashi Togasaki

IPC分类号： H01L23/48

CPC分类号： H01L23/525 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06568 ,  H01L2924/0001 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/30105

摘要： A first conducting layer is formed on a side of a main surface on which an electrode terminal of a semiconductor device is provided in a semiconductor substrate. The first conducting layer is electrically connected to the electrode terminal of the semiconductor device. A mask layer that has an opening at a predetermined position is formed on the first conducting layer. A second conducting layer is formed inside the opening of the mask layer. The mask layer is removed. A relocation wiring that includes the first conducting layer and electrically draws out the electrode terminal is formed by performing anisotropic etching for the first conducting layer using the second conducting layer as a mask. Finally, a bump is formed on the relocation wiring by causing the second conducting layer to reflow.

摘要翻译： 第一导电层形成在半导体衬底中设置半导体器件的电极端子的主表面的一侧。 第一导电层电连接到半导体器件的电极端子。 在第一导电层上形成有在预定位置具有开口的掩模层。 在掩模层的开口内形成第二导电层。 去除掩模层。 通过使用第二导电层作为掩模对第一导电层进行各向异性蚀刻，形成包括第一导电层并电拔出电极端子的重定位布线。 最后，通过使第二导电层回流而在位移配线上形成凸点。

公开(公告)号：US07605076B2

公开(公告)日：2009-10-20

申请号：US11346236

申请日：2006-02-03

申请人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

发明人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

IPC分类号： H01L21/4763 ,  H01L21/28 ,  H01L21/302

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/76814

摘要： An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF3 or HF. A thermally decomposable reaction product produced as a result of the etching is removed by heat treatment.

摘要翻译： 对形成在导电层上的绝缘膜进行干蚀刻，以在绝缘膜上形成连接孔，使导电层露出。 将等离子体供应到暴露的导电层上以干燥在连接孔中产生的损伤层。 作为干式清洗的连接孔中产生的产品通过湿法除去。 通过使用包括NF 3或HF的气体的化学干法，蚀刻形成在连接孔中的作为湿法处理的结果的氧化膜。 通过热处理除去作为蚀刻结果产生的可热分解的反应产物。

公开(公告)号：US20060055050A1

公开(公告)日：2006-03-16

申请号：US11221762

申请日：2005-09-09

申请人： Hideo Numata ,  Hirokazu Ezawa ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Mie Matsuo ,  Ichiro Omura

发明人： Hideo Numata ,  Hirokazu Ezawa ,  Chiaki Takubo ,  Kenji Takahashi ,  Hideo Aoki ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Mie Matsuo ,  Ichiro Omura

IPC分类号： H01L23/48

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor device comprises a semiconductor substrate having an through hole, a first insulation resin layer formed on an inner surface of the through hole, a second insulation resin layer formed on at least one of front and rear surfaces of the semiconductor substrate, and a first conductor layer formed in the through hole to connect at least both front and rear surfaces of the semiconductor substrate and insulated from the inner surface of the through hole with the first insulation resin layer. A second conductor layer (wiring pattern) which is electrically connected to the first conductor layer in the through hole is further provided on the second insulation resin layer. The conductor layer formed in the through hole and constituting a connecting plug has a high insulation reliability. Therefore, a semiconductor device suitable for a multi-chip package and the like can be obtained. Further, since the forming ability of the conductor layer connecting the front and rear surfaces and the insulation layer is high, the manufacturing cost can be reduced.

摘要翻译： 半导体器件包括具有通孔的半导体衬底，形成在通孔的内表面上的第一绝缘树脂层，形成在半导体衬底的前后表面中的至少一个上的第二绝缘树脂层，以及第一绝缘树脂层 形成在所述通孔中的导体层至少连接半导体衬底的前表面和后表面，并与所述通孔的内表面与所述第一绝缘树脂层绝缘。 在第二绝缘树脂层上还设置有与通孔中的第一导体层电连接的第二导体层（布线图案）。 形成在通孔中并构成连接插头的导体层具有高的绝缘可靠性。 因此，可以获得适合于多芯片封装等的半导体器件。 此外，由于连接前后表面和绝缘层的导体层的形成能力高，所以可以降低制造成本。

公开(公告)号：US5529634A

公开(公告)日：1996-06-25

申请号：US424623

申请日：1995-04-19

申请人： Masahiro Miyata ,  Hidemitsu Egawa ,  Johta Fukuhara ,  Shinzi Takeda ,  Hirokazu Ezawa

发明人： Masahiro Miyata ,  Hidemitsu Egawa ,  Johta Fukuhara ,  Shinzi Takeda ,  Hirokazu Ezawa

IPC分类号： C23C14/04 ,  C23C14/22 ,  H01L21/60 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  C23C16/00

CPC分类号： C23C14/228 ,  C23C14/04 ,  C23C14/22 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53242 ,  H01L24/11 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/3025

摘要： An evaporation chamber for forming fine metal particles is separated from a film formation chamber in which the substrate having a metal film such as a metal column thereon is placed during metal film deposition. The pressure of the film formation chamber is set to be lower than that of the evaporation chamber, and the fine metal particles are sprayed on the substrate by the pressure difference to form the metal column. Therefore, a wiring layer, a connection electrode for connecting the wiring layer to another wiring layer, and the like can easily be formed by a small number of steps.

摘要翻译： 用于形成细金属颗粒的蒸发室与成膜室分离，其中在金属膜沉积期间放置有金属膜如金属柱的金属膜的基板。 成膜室的压力被设定为低于蒸发室的压力，并且通过压力差将金属微粒喷射在基板上以形成金属柱。 因此，可以通过少量的步骤容易地形成布线层，用于将布线层连接到另一布线层的连接电极等。

公开(公告)号：US08569181B2

公开(公告)日：2013-10-29

申请号：US13267048

申请日：2011-10-06

申请人： Tatsuo Migita ,  Hirokazu Ezawa ,  Tadashi Iijima ,  Takashi Togasaki

发明人： Tatsuo Migita ,  Hirokazu Ezawa ,  Tadashi Iijima ,  Takashi Togasaki

IPC分类号： H01L21/461 ,  H01L21/38

CPC分类号： H01L23/525 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06568 ,  H01L2924/0001 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/30105

摘要： A first conducting layer is formed on a side of a main surface on which an electrode terminal of a semiconductor device is provided in a semiconductor substrate. The first conducting layer is electrically connected to the electrode terminal of the semiconductor device. A mask layer that has an opening at a predetermined position is formed on the first conducting layer. A second conducting layer is formed inside the opening of the mask layer. The mask layer is removed. A relocation wiring that includes the first conducting layer and electrically draws out the electrode terminal is formed by performing anisotropic etching for the first conducting layer using the second conducting layer as a mask. Finally, a bump is formed on the relocation wiring by causing the second conducting layer to reflow.

摘要翻译： 第一导电层形成在半导体衬底中设置半导体器件的电极端子的主表面的一侧。 第一导电层电连接到半导体器件的电极端子。 在第一导电层上形成有在预定位置具有开口的掩模层。 在掩模层的开口内形成第二导电层。 去除掩模层。 通过使用第二导电层作为掩模对第一导电层进行各向异性蚀刻，形成包括第一导电层并电拔出电极端子的重定位布线。 最后，通过使第二导电层回流而在位移配线上形成凸点。

公开(公告)号：US08314491B2

公开(公告)日：2012-11-20

申请号：US12845937

申请日：2010-07-29

申请人： Soichi Yamashita ,  Tatsuo Migita ,  Tadashi Iijima ,  Masahiro Miyata ,  Masayuki Uchida ,  Takashi Togasaki ,  Hirokazu Ezawa

发明人： Soichi Yamashita ,  Tatsuo Migita ,  Tadashi Iijima ,  Masahiro Miyata ,  Masayuki Uchida ,  Takashi Togasaki ,  Hirokazu Ezawa

IPC分类号： H01L23/48

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/02311 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05008 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48666 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/81191 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45015 ,  H01L2924/207

摘要： According to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer. Next, a dielectric layer having a third opening reaching the third conductive layer and a fourth opening reaching the electrode terminal via the second opening is formed by modifying a photosensitive resin film, and a bump that is electrically connected to the third conductive layer is formed.

摘要翻译： 根据一个实施例，半导体器件的制造方法如下。 通过改变在其上设置有第一导电层的电极端子的基板上的感光性树脂膜，形成具有第一开口和到达电极端子的第二开口的电介质层。 接下来，在包括第一开口的内部的电介质层上形成与电极端子电连接的第二导电层，以及具有与氧化还原电位不同的氧化还原电位的第三导电层 第一导电层小于在第二导电层上形成第一导电层和第二导电层之间的氧化还原电位的差异。 接下来，通过改变感光性树脂膜形成具有到达第三导电层的第三开口的电介质层和通过第二开口到达电极端子的第四开口，并且形成与第三导电层电连接的凸块。

公开(公告)号：US20100301472A1

公开(公告)日：2010-12-02

申请号：US12721741

申请日：2010-03-11

申请人： Tatsuo Migita ,  Hirokazu Ezawa ,  Soichi Yamashita ,  Takashi Togasaki

发明人： Tatsuo Migita ,  Hirokazu Ezawa ,  Soichi Yamashita ,  Takashi Togasaki

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06568 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1306 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An electronic component in which an element is formed on a chip includes: a pad that is made of a conductive material and that is formed in a first bump formation region that is two-dimensionally arranged in center of one principle face and in a second bump formation region that is linearly arranged at peripheral border of the principle face; a passivation film that is formed on the principle face to cover portion except a formation position of the pad; a metal layer that is formed on the pad; and a bump that is made of a conductive material and that is formed on the metal layer by plating, wherein radius of the metal layer in the second bump formation region is smaller than radius of at least some of the metal layer in the first bump formation region.

摘要翻译： 其中元件形成在芯片上的电子部件包括：由导电材料制成并且形成在二维布置在一个原理面的中心的第一凸块形成区域中的衬垫和在第二凸起 在原理面的周边边缘线性排列的形成区域; 钝化膜，其形成在除了所述焊盘的形成位置之外的所述原理面上以覆盖部分; 形成在所述垫上的金属层; 以及由导电材料制成并且通过电镀在金属层上形成的凸块，其中第二凸块形成区域中的金属层的半径小于第一凸块形成中的至少一些金属层的半径 地区。