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公开(公告)号：US20120088332A1
公开(公告)日：2012-04-12
申请号：US13243493
申请日：2011-09-23
申请人： Teak-hoon Lee , Won-Keun Kim , Dong-hyeon Jang , He-geon Song , Sung-jun Im
发明人： Teak-hoon Lee , Won-Keun Kim , Dong-hyeon Jang , He-geon Song , Sung-jun Im
IPC分类号： H01L21/50
CPC分类号： H01L23/49811 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L23/291 , H01L23/3121 , H01L23/481 , H01L24/02 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/02372 , H01L2224/024 , H01L2224/0401 , H01L2224/0557 , H01L2224/13023 , H01L2224/13024 , H01L2224/13025 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83005 , H01L2224/83104 , H01L2224/94 , H01L2224/95001 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/06568 , H01L2924/00014 , H01L2924/01013 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/1434 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/1811 , H01L2924/18161 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/05552
摘要： A method of forming a semiconductor package includes attaching a semiconductor substrate on a support substrate, wherein the semiconductor substrate includes a plurality of first semiconductor chips and a chip cutting region that separates respective ones of the semiconductor chips. A first cutting groove is formed that has a first kerf width between first and second ones of the plurality of first semiconductor chips. A plurality of second semiconductor chips is attached to the plurality of first semiconductor chips. A molding layer is formed so as to fill the first cutting groove and a second cutting groove having a second kerf width that is less than the first kerf width is formed in the molding layer so as to form individual molding layers covering one of the plurality of first semiconductor chips and one of the plurality of second semiconductor chips.
摘要翻译： 形成半导体封装的方法包括将半导体衬底附着在支撑衬底上，其中半导体衬底包括多个第一半导体芯片和分离各个半导体芯片的芯片切割区域。 形成第一切割槽，其具有在多个第一半导体芯片中的第一和第二半导体芯片之间的第一切口宽度。 多个第二半导体芯片附接到多个第一半导体芯片。 成型层形成为填充第一切割槽，并且在成型层中形成具有小于第一切口宽度的第二切口宽度的第二切割槽，以形成覆盖多个 第一半导体芯片和多个第二半导体芯片中的一个。
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公开(公告)号：US08637969B2
公开(公告)日：2014-01-28
申请号：US13908728
申请日：2013-06-03
申请人： Teak-hoon Lee , Won-keun Kim , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im
发明人： Teak-hoon Lee , Won-keun Kim , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im
CPC分类号： H01L23/49811 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L23/291 , H01L23/3121 , H01L23/481 , H01L24/02 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/02372 , H01L2224/024 , H01L2224/0401 , H01L2224/0557 , H01L2224/13023 , H01L2224/13024 , H01L2224/13025 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83005 , H01L2224/83104 , H01L2224/94 , H01L2224/95001 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/06568 , H01L2924/00014 , H01L2924/01013 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/1434 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/1811 , H01L2924/18161 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/05552
摘要： A method of forming a semiconductor package having a large capacity and a reduced or minimized volume includes: attaching a semiconductor substrate on a support substrate using an adhesive layer, wherein the semiconductor substrate includes a plurality of first semiconductor chips and a chip cutting region, wherein first and second ones of the plurality of first semiconductor chips are separated each other by the chip cutting region, and the semiconductor substrate includes a first surface on which an active area is formed and a second surface opposite to the first surface; forming a first cutting groove having a first kerf width, between the first and second ones of the plurality of first semiconductor chips, so that the semiconductor substrate is separated into a plurality of first semiconductor chips; attaching a plurality of second semiconductor chips corresponding to the first semiconductor chips, respectively, to the plurality of first semiconductor chips; forming a molding layer so as to fill the first cutting groove; and forming a second cutting groove having a second kerf width that is less than the first kerf width, in the molding layer, so as to separate the molding layer into individual molding layers covering one of the plurality of first semiconductor chips and corresponding one of the plurality of second semiconductor chips.
摘要翻译： 一种形成具有大容量和减小或最小化体积的半导体封装的方法包括：使用粘合剂层将半导体衬底附着在支撑衬底上，其中半导体衬底包括多个第一半导体芯片和切屑区域，其中 多个第一半导体芯片中的第一和第二半导体芯片通过芯片切割区域彼此分离，并且半导体衬底包括其上形成有源区域的第一表面和与第一表面相对的第二表面; 在所述多个第一半导体芯片中的第一和第二半导体芯片之间形成具有第一切口宽度的第一切割槽，使得半导体基板被分离成多个第一半导体芯片; 分别将对应于第一半导体芯片的多个第二半导体芯片附着到多个第一半导体芯片; 形成模塑层以填充第一切割槽; 以及在成形层中形成具有小于第一切口宽度的第二切口宽度的第二切割槽，以将模制层分离成覆盖多个第一半导体芯片中的一个的各个成型层和相应的一个 多个第二半导体芯片。
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公开(公告)号：US08455301B2
公开(公告)日：2013-06-04
申请号：US13243493
申请日：2011-09-23
申请人： Teak-hoon Lee , Won-keun Kim , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im
发明人： Teak-hoon Lee , Won-keun Kim , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im
CPC分类号： H01L23/49811 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L23/291 , H01L23/3121 , H01L23/481 , H01L24/02 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/02372 , H01L2224/024 , H01L2224/0401 , H01L2224/0557 , H01L2224/13023 , H01L2224/13024 , H01L2224/13025 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83005 , H01L2224/83104 , H01L2224/94 , H01L2224/95001 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/06568 , H01L2924/00014 , H01L2924/01013 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/1434 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/1811 , H01L2924/18161 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/05552
摘要： A method of forming a semiconductor package includes attaching a semiconductor substrate on a support substrate, wherein the semiconductor substrate includes a plurality of first semiconductor chips and a chip cutting region that separates respective ones of the semiconductor chips. A first cutting groove is formed that has a first kerf width between first and second ones of the plurality of first semiconductor chips. A plurality of second semiconductor chips is attached to the plurality of first semiconductor chips. A molding layer is formed so as to fill the first cutting groove and a second cutting groove having a second kerf width that is less than the first kerf width is formed in the molding layer so as to form individual molding layers covering one of the plurality of first semiconductor chips and one of the plurality of second semiconductor chips.
摘要翻译： 形成半导体封装的方法包括将半导体衬底附着在支撑衬底上，其中半导体衬底包括多个第一半导体芯片和分离各个半导体芯片的芯片切割区域。 形成第一切割槽，其具有在多个第一半导体芯片中的第一和第二半导体芯片之间的第一切口宽度。 多个第二半导体芯片附接到多个第一半导体芯片。 成型层形成为填充第一切割槽，并且在成型层中形成具有小于第一切口宽度的第二切口宽度的第二切割槽，以形成覆盖多个 第一半导体芯片和多个第二半导体芯片中的一个。
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公开(公告)号：US20130264706A1
公开(公告)日：2013-10-10
申请号：US13908728
申请日：2013-06-03
申请人： Teak-hoon Lee , Won-keun Kim , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im
发明人： Teak-hoon Lee , Won-keun Kim , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im
IPC分类号： H01L23/498
CPC分类号： H01L23/49811 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L23/291 , H01L23/3121 , H01L23/481 , H01L24/02 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/02372 , H01L2224/024 , H01L2224/0401 , H01L2224/0557 , H01L2224/13023 , H01L2224/13024 , H01L2224/13025 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83005 , H01L2224/83104 , H01L2224/94 , H01L2224/95001 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/06568 , H01L2924/00014 , H01L2924/01013 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/1434 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/1811 , H01L2924/18161 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/05552
摘要： A method of forming a semiconductor package having a large capacity and a reduced or minimized volume includes: attaching a semiconductor substrate on a support substrate using an adhesive layer, wherein the semiconductor substrate includes a plurality of first semiconductor chips and a chip cutting region, wherein first and second ones of the plurality of first semiconductor chips are separated each other by the chip cutting region, and the semiconductor substrate includes a first surface on which an active area is formed and a second surface opposite to the first surface; forming a first cutting groove having a first kerf width, between the first and second ones of the plurality of first semiconductor chips, so that the semiconductor substrate is separated into a plurality of first semiconductor chips; attaching a plurality of second semiconductor chips corresponding to the first semiconductor chips, respectively, to the plurality of first semiconductor chips; forming a molding layer so as to fill the first cutting groove; and forming a second cutting groove having a second kerf width that is less than the first kerf width, in the molding layer, so as to separate the molding layer into individual molding layers covering one of the plurality of first semiconductor chips and corresponding one of the plurality of second semiconductor chips.
摘要翻译： 一种形成具有大容量且减小或最小化体积的半导体封装的方法包括：使用粘合剂层将半导体衬底附着在支撑衬底上，其中半导体衬底包括多个第一半导体芯片和切屑区域，其中 多个第一半导体芯片中的第一和第二半导体芯片通过芯片切割区域彼此分离，并且半导体衬底包括其上形成有源区域的第一表面和与第一表面相对的第二表面; 在所述多个第一半导体芯片中的第一和第二半导体芯片之间形成具有第一切口宽度的第一切割槽，使得半导体基板被分离成多个第一半导体芯片; 分别将对应于第一半导体芯片的多个第二半导体芯片附着到多个第一半导体芯片; 形成模塑层以填充第一切割槽; 以及在成形层中形成具有小于第一切口宽度的第二切口宽度的第二切割槽，以将模制层分离成覆盖多个第一半导体芯片中的一个的各个成型层和相应的一个 多个第二半导体芯片。
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公开(公告)号：US20140154839A1
公开(公告)日：2014-06-05
申请号：US14093853
申请日：2013-12-02
申请人： Jung-seok Ahn , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im , Chang-seong Jeon , Teak-hoon Lee , Sang-sick Park
发明人： Jung-seok Ahn , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im , Chang-seong Jeon , Teak-hoon Lee , Sang-sick Park
IPC分类号： H01L25/00
CPC分类号： H01L25/50 , H01L21/561 , H01L21/6835 , H01L21/76898 , H01L23/3192 , H01L23/481 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L2221/68327 , H01L2221/68381 , H01L2224/0346 , H01L2224/0401 , H01L2224/05008 , H01L2224/05009 , H01L2224/05568 , H01L2224/0557 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/06181 , H01L2224/11009 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2224/2929 , H01L2224/29387 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83191 , H01L2224/83192 , H01L2224/83851 , H01L2224/92125 , H01L2224/92143 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06544 , H01L2225/06568 , H01L2924/00014 , H01L2924/01327 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2224/11 , H01L2224/03 , H01L2924/014 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other.
摘要翻译： 一种制造芯片堆叠的半导体封装的方法，所述方法包括制备包括多个第一芯片的基片，每个第一芯片均具有穿硅通孔（TSV）; 将包括多个第一芯片的基底晶片接合到支撑载体; 准备多个第二芯片; 通过将所述多个第二芯片接合到所述多个第一芯片来形成堆叠的芯片; 用密封部分密封堆叠的芯片; 并将堆叠的芯片彼此分离。
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公开(公告)号：US08637350B2
公开(公告)日：2014-01-28
申请号：US13439447
申请日：2012-04-04
申请人： Jung-seok Ahn , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im , Chang-seong Jeon , Teak-hoon Lee , Sang-sick Park
发明人： Jung-seok Ahn , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im , Chang-seong Jeon , Teak-hoon Lee , Sang-sick Park
IPC分类号： H01L21/00
CPC分类号： H01L25/50 , H01L21/561 , H01L21/6835 , H01L21/76898 , H01L23/3192 , H01L23/481 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L2221/68327 , H01L2221/68381 , H01L2224/0346 , H01L2224/0401 , H01L2224/05008 , H01L2224/05009 , H01L2224/05568 , H01L2224/0557 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/06181 , H01L2224/11009 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2224/2929 , H01L2224/29387 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83191 , H01L2224/83192 , H01L2224/83851 , H01L2224/92125 , H01L2224/92143 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06544 , H01L2225/06568 , H01L2924/00014 , H01L2924/01327 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2224/11 , H01L2224/03 , H01L2924/014 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other.
摘要翻译： 一种制造芯片堆叠的半导体封装的方法，所述方法包括制备包括多个第一芯片的基片，每个第一芯片均具有穿硅通孔（TSV）; 将包括多个第一芯片的基底晶片接合到支撑载体; 准备多个第二芯片; 通过将所述多个第二芯片接合到所述多个第一芯片来形成堆叠的芯片; 用密封部分密封堆叠的芯片; 并将堆叠的芯片彼此分离。
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公开(公告)号：US20120282735A1
公开(公告)日：2012-11-08
申请号：US13439447
申请日：2012-04-04
申请人： Jung-seok Ahn , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im , Chang-seong Jeon , Teak-hoon Lee , Sang-sick Park
发明人： Jung-seok Ahn , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im , Chang-seong Jeon , Teak-hoon Lee , Sang-sick Park
IPC分类号： H01L21/82
CPC分类号： H01L25/50 , H01L21/561 , H01L21/6835 , H01L21/76898 , H01L23/3192 , H01L23/481 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L2221/68327 , H01L2221/68381 , H01L2224/0346 , H01L2224/0401 , H01L2224/05008 , H01L2224/05009 , H01L2224/05568 , H01L2224/0557 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/06181 , H01L2224/11009 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2224/2929 , H01L2224/29387 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83191 , H01L2224/83192 , H01L2224/83851 , H01L2224/92125 , H01L2224/92143 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06544 , H01L2225/06568 , H01L2924/00014 , H01L2924/01327 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2224/11 , H01L2224/03 , H01L2924/014 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other.
摘要翻译： 一种制造芯片堆叠的半导体封装的方法，该方法包括制备包括多个通过硅通孔（TSV）的多个第一芯片的基底晶片; 将包括多个第一芯片的基底晶片接合到支撑载体; 准备多个第二芯片; 通过将所述多个第二芯片接合到所述多个第一芯片来形成堆叠的芯片; 用密封部分密封堆叠的芯片; 并将堆叠的芯片彼此分离。
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公开(公告)号：US08743582B2
公开(公告)日：2014-06-03
申请号：US13115501
申请日：2011-05-25
申请人： Uk-song Kang , Dong-hyeon Jang , Seong-jin Jang , Hoon Lee , Jin-ho Kim , Nam-seog Kim , Byung-sik Moon , Woo-dong Lee
发明人： Uk-song Kang , Dong-hyeon Jang , Seong-jin Jang , Hoon Lee , Jin-ho Kim , Nam-seog Kim , Byung-sik Moon , Woo-dong Lee
IPC分类号： G11C5/06
CPC分类号： H01L23/481 , G11C5/06 , G11C8/18 , H01L22/32 , H01L24/05 , H01L24/16 , H01L24/17 , H01L24/73 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05009 , H01L2224/0557 , H01L2224/05572 , H01L2224/16145 , H01L2224/16146 , H01L2224/17051 , H01L2224/17515 , H01L2224/73204 , H01L2224/94 , H01L2225/06513 , H01L2225/06544 , H01L2225/06596 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01023 , H01L2924/01033 , H01L2924/01047 , H01L2924/01055 , H01L2924/014 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2224/05552 , H01L2924/00
摘要： A three-dimensional (3D) semiconductor device may include a stack of chips, including a master chip and one or more slave chips. I/O connections of slave chips need not be connected to channels on a motherboard, and only electrode pads of a master chip may be connected to the channels. Only the master chip may provide a load to the channels. A through-substrate via (TSV) boundary may be set on a data input path, a data output path, an address/command path, and/or a clock path of a semiconductor device in which the same type of semiconductor chips are stacked.
摘要翻译： 三维（3D）半导体器件可以包括一堆芯片，包括主芯片和一个或多个从芯片。 从芯片的I / O连接不需要连接到主板上的通道，只有主芯片的电极焊盘可以连接到通道。 只有主芯片可以为通道提供负载。 可以在堆叠相同类型的半导体芯片的半导体器件的数据输入路径，数据输出路径，地址/命令路径和/或时钟路径上设置贯穿衬底通孔（TSV）边界。
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公开(公告)号：US07923296B2
公开(公告)日：2011-04-12
申请号：US12385946
申请日：2009-04-24
申请人： Hyun-soo Chung , Dong-hyeon Jang , Dong-ho Lee , In-young Lee
发明人： Hyun-soo Chung , Dong-hyeon Jang , Dong-ho Lee , In-young Lee
IPC分类号： H01L21/00
CPC分类号： H01L23/3128 , H01L23/13 , H01L23/49816 , H01L23/49833 , H01L24/48 , H01L24/97 , H01L2224/06136 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/92147 , H01L2224/97 , H01L2924/00014 , H01L2924/01033 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19103 , H01L2224/85 , H01L2224/83 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00
摘要： A ball grid array type board on chip package may include an integrated circuit chip having an active surface that supports a plurality of contact pads. An interposer may be adhered to the active surface of the integrated circuit chip. At least one hole may be provided through the interposer to expose the contact pads. A board, which may have a first surface supporting a plurality of metal lines, may have a second surface adhered to the interposer. The board may have an opening through which the contact pads may be exposed. A plurality of bonding wires may connect the contact pads to the metal lines through the opening.
摘要翻译： 球栅阵列型片上芯片封装可以包括具有支撑多个接触焊盘的有源表面的集成电路芯片。 插入器可以粘附到集成电路芯片的有源表面。 可以通过插入件提供至少一个孔以暴露接触垫。 可以具有支撑多个金属线的第一表面的板可以具有粘附到插入件的第二表面。 板可以具有开口，接触垫可以穿过该开口露出。 多个接合线可以通过开口将接触垫连接到金属线。
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10.发明申请SEMICONDUCTOR PACKAGE HAVING WIRE REDISTRIBUTION LAYER AND METHOD OF FABRICATING THE SAME 审中-公开具有电线重分配层的半导体封装及其制造方法公开(公告)号：US20080230877A1
公开(公告)日：2008-09-25
申请号：US12050343
申请日：2008-03-18
申请人： Hyun-soo Chung , Dong-hyeon Jang , Son-kwan Hwang , Nam-seog Kim
发明人： Hyun-soo Chung , Dong-hyeon Jang , Son-kwan Hwang , Nam-seog Kim
IPC分类号： H01L23/495 , H01L21/768
CPC分类号： H01L23/525 , H01L24/05 , H01L24/48 , H01L2224/04042 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48463 , H01L2224/48624 , H01L2224/48647 , H01L2224/48847 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/05042 , H01L2224/48824 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package and a method of fabricating the same. The method includes providing a semiconductor substrate on which a chip pad is formed. A wire redistribution layer connected to the chip pad is formed. An insulating layer which includes an opening exposing a portion of the wire redistribution layer is formed. A metal ink is applied within the opening to thereby form a bonding pad. The applied metal ink within the opening and the insulating layer can be cured simultaneously.
摘要翻译： 一种半导体封装及其制造方法。 该方法包括提供其上形成有芯片焊盘的半导体衬底。 形成连接到芯片焊盘的导线再分配层。 形成绝缘层，该绝缘层包括露出导线再分布层的一部分的开口。 在开口内施加金属墨，从而形成接合垫。 开口和绝缘层内的施加的金属油墨可以同时固化。
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