公开(公告)号：US20070040255A1

公开(公告)日：2007-02-22

申请号：US11504736

申请日：2006-08-16

申请人： Yasuo Osone ,  Chiko Yorita ,  Kenya Kawano ,  Yu Hasegawa ,  Yuji Shirai ,  Seiichi Tomoi ,  Tsuneo Endou ,  Satoru Konishi ,  Hirokazu Nakajima

发明人： Yasuo Osone ,  Chiko Yorita ,  Kenya Kawano ,  Yu Hasegawa ,  Yuji Shirai ,  Seiichi Tomoi ,  Tsuneo Endou ,  Satoru Konishi ,  Hirokazu Nakajima

IPC分类号： H01L23/02

CPC分类号： H01L25/16 ,  H01L23/3677 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/0132 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor circuit laminated on a multilayer circuit board, the semiconductor circuit for power amplification and the control circuit are aligned in parallel on the same semiconductor element, and the semiconductor element is flip-chip connected on the multilayer circuit board. Further, a second semiconductor element mounted in addition to the first semiconductor element and all components and submodules are flip-chip connected. Also, a plurality of bumps are united in order to improve the radiation performance and thermal vias of the multilayer circuit board are formed in second and lower layers of the wiring layers in the multilayer circuit board.

摘要翻译： 本发明提供了能够在不增加制造成本的同时实现高放射性能和制造准备性的同时降低倒装芯片封装结构中的热阻的半导体器件。 在具有用于功率放大的半导体电路和叠层在多层电路板上的半导体电路的控制电路的半导体器件中，用于功率放大的半导体电路和控制电路并联在同一半导体元件上，半导体元件 在多层电路板上倒装芯片连接。 此外，除了第一半导体元件和所有元件和子模块之外安装的第二半导体元件被倒装连接。 此外，为了提高辐射性能，将多个凸块结合起来，多层电路板的布线层的第二层和下层形成多层电路板的热通孔。

公开(公告)号：US07554193B2

公开(公告)日：2009-06-30

申请号：US11504736

申请日：2006-08-16

申请人： Yasuo Osone ,  Chiko Yorita ,  Kenya Kawano ,  Yu Hasegawa ,  Yuji Shirai ,  Seiichi Tomoi ,  Tsuneo Endou ,  Satoru Konishi ,  Hirokazu Nakajima

发明人： Yasuo Osone ,  Chiko Yorita ,  Kenya Kawano ,  Yu Hasegawa ,  Yuji Shirai ,  Seiichi Tomoi ,  Tsuneo Endou ,  Satoru Konishi ,  Hirokazu Nakajima

IPC分类号： H01L23/34 ,  H01L23/48

CPC分类号： H01L25/16 ,  H01L23/3677 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/0132 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor circuit laminated on a multilayer circuit board, the semiconductor circuit for power amplification and the control circuit are aligned in parallel on the same semiconductor element, and the semiconductor element is flip-chip connected on the multilayer circuit board. Further, a second semiconductor element mounted in addition to the first semiconductor element and all components and submodules are flip-chip connected. Also, a plurality of bumps are united in order to improve the radiation performance and thermal vias of the multilayer circuit board are formed in second and lower layers of the wiring layers in the multilayer circuit board.

摘要翻译： 本发明提供了能够在不增加制造成本的同时实现高放射性能和制造准备性的同时降低倒装芯片封装结构中的热阻的半导体器件。 在具有用于功率放大的半导体电路和叠层在多层电路板上的半导体电路的控制电路的半导体器件中，用于功率放大的半导体电路和控制电路并联在同一半导体元件上，半导体元件 在多层电路板上倒装芯片连接。 此外，除了第一半导体元件和所有元件和子模块之外安装的第二半导体元件被倒装连接。 此外，为了提高辐射性能，将多个凸块结合起来，多层电路板的布线层的第二层和下层形成多层电路板的热通孔。

公开(公告)号：US20070176298A1

公开(公告)日：2007-08-02

申请号：US11652235

申请日：2007-01-10

申请人： Yasuo Osone ,  Kenya Kawano ,  Chiko Yorita ,  Yu Hasegawa ,  Yuji Shirai ,  Naotaka Tanaka ,  Seiichi Tomoi ,  Hiroshi Okabe

发明人： Yasuo Osone ,  Kenya Kawano ,  Chiko Yorita ,  Yu Hasegawa ,  Yuji Shirai ,  Naotaka Tanaka ,  Seiichi Tomoi ,  Hiroshi Okabe

IPC分类号： H01L23/52 ,  H01L23/48

CPC分类号： H01L23/3677 ,  H01L23/3121 ,  H01L23/34 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2223/6644 ,  H01L2223/6688 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/48237 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Heating elements different in heat generating timing are laminated in a stacked state, and the heating element close to a wiring substrate is allowed to function as a heat diffusion plate for another heating element.

摘要翻译： 发热时刻不同的加热元件层叠在堆叠状态，允许靠近布线基板的加热元件用作另一个加热元件的热​​扩散板。

公开(公告)号：US07656030B2

公开(公告)日：2010-02-02

申请号：US11652235

申请日：2007-01-10

申请人： Yasuo Osone ,  Kenya Kawano ,  Chiko Yorita ,  Yu Hasegawa ,  Yuji Shirai ,  Naotaka Tanaka ,  Seiichi Tomoi ,  Hiroshi Okabe

发明人： Yasuo Osone ,  Kenya Kawano ,  Chiko Yorita ,  Yu Hasegawa ,  Yuji Shirai ,  Naotaka Tanaka ,  Seiichi Tomoi ,  Hiroshi Okabe

IPC分类号： H01L23/34 ,  H01L23/48

CPC分类号： H01L23/3677 ,  H01L23/3121 ,  H01L23/34 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2223/6644 ,  H01L2223/6688 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/48237 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Heating elements different in heat generating timing are laminated in a stacked state, and the heating element close to a wiring substrate is allowed to function as a heat diffusion plate for another heating element.

摘要翻译： 发热时刻不同的加热元件层叠在堆叠状态，允许靠近布线基板的加热元件用作另一个加热元件的热​​扩散板。

公开(公告)号：US07583163B2

公开(公告)日：2009-09-01

申请号：US11891368

申请日：2007-08-10

申请人： Yasuo Osone ,  Chiko Yorita ,  Yuji Shirai ,  Seiichi Tomoi

发明人： Yasuo Osone ,  Chiko Yorita ,  Yuji Shirai ,  Seiichi Tomoi

IPC分类号： H03H9/00 ,  H03H9/205 ,  H01L41/08

CPC分类号： H03H3/04 ,  H03H9/564 ,  H03H9/589 ,  H03H2003/025

摘要： A technique capable of integrally forming SMR type acoustic wave filters corresponding to multiple bands on the same chip at low cost is provided. In SMR type acoustic wave filters including multiple bandpass filters corresponding to multiple bands formed over the same die (substrate), acoustic multilayer films are formed without or with a minimum number of masks and piezoelectric thin films having different thicknesses for respective bands are collectively formed. For example, after the acoustic multilayer films (low acoustic impedance layers and high acoustic impedance layers) are formed in a deep groove in a terrace paddy field shape over the die in a maskless manner, the piezoelectric thin films are c-axis-oriented and grown, and are polished by CMP method or the like to be adjusted in a thickness for respective bands, and therefore, the SMR type acoustic wave filters for multiple bands are formed over the same chip.

摘要翻译： 提供了能够以低成本一体地形成对应于同一芯片上的多个频带的SMR型声波滤波器的技术。 在包括对应于形成在同一芯片（基板）上的多个带的多个带通滤波器的SMR型声波滤波器中，形成声学多层膜，而不需要最少数量的掩模，并且共同形成具有不同厚度的压电薄膜。 例如，在以无掩模的方式在模具上形成在平台水田的深槽中的声学多层膜（低声阻抗层和高声阻抗层）之后，压电薄膜是c轴取向的， 并通过CMP方法等进行抛光，以对各个带的厚度进行调整，因此，在同一芯片上形成多个带的SMR型声波滤波器。

公开(公告)号：US20080129412A1

公开(公告)日：2008-06-05

申请号：US11891368

申请日：2007-08-10

申请人： Yasuo Osone ,  Chiko Yorita ,  Yuji Shirai ,  Seiichi Tomoi

发明人： Yasuo Osone ,  Chiko Yorita ,  Yuji Shirai ,  Seiichi Tomoi

IPC分类号： H03H9/70 ,  H03H9/54

CPC分类号： H03H3/04 ,  H03H9/564 ,  H03H9/589 ,  H03H2003/025

摘要： A technique capable of integrally forming SMR type acoustic wave filters corresponding to multiple bands on the same chip at low cost is provided. In SMR type acoustic wave filters including multiple bandpass filters corresponding to multiple bands formed over the same die (substrate), acoustic multilayer films are formed without or with a minimum number of masks and piezoelectric thin films having different thicknesses for respective bands are collectively formed. For example, after the acoustic multilayer films (low acoustic impedance layers and high acoustic impedance layers) are formed in a deep groove in a terrace paddy field shape over the die in a maskless manner, the piezoelectric thin films are c-axis-oriented and grown, and are polished by CMP method or the like to be adjusted in a thickness for respective bands, and therefore, the SMR type acoustic wave filters for multiple bands are formed over the same chip.

摘要翻译： 提供了能够以低成本一体地形成对应于同一芯片上的多个频带的SMR型声波滤波器的技术。 在包括对应于形成在同一芯片（基板）上的多个带的多个带通滤波器的SMR型声波滤波器中，形成声学多层膜，而不需要最少数量的掩模，并且共同形成具有不同厚度的压电薄膜。 例如，在以无掩模的方式在模具上形成在平台水田的深槽中的声学多层膜（低声阻抗层和高声阻抗层）之后，压电薄膜是c轴取向的， 并通过CMP方法等进行抛光，以对各个带的厚度进行调整，因此，在同一芯片上形成多个带的SMR型声波滤波器。

公开(公告)号：US07396701B2

公开(公告)日：2008-07-08

申请号：US11281476

申请日：2005-11-18

申请人： Kunio Shigemura ,  Kenji Hanada ,  Masaki Nakanishi ,  Takafumi Nishita ,  Masayoshi Shinoda ,  Seiichi Tomoi

发明人： Kunio Shigemura ,  Kenji Hanada ,  Masaki Nakanishi ,  Takafumi Nishita ,  Masayoshi Shinoda ,  Seiichi Tomoi

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L25/162 ,  H01L23/3121 ,  H01L23/4824 ,  H01L23/5227 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/743 ,  H01L24/75 ,  H01L24/83 ,  H01L25/50 ,  H01L27/0617 ,  H01L27/0629 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3463 ,  H05K3/3494 ,  H05K2201/045 ,  H05K2203/081 ,  H05K2203/1476 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/43 ,  H01L2924/01006

摘要： A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.

摘要翻译： 提供了一种可以提高使用PCB作为其模块基板的模块的可靠性的技术。 通过使用热块在低于280℃的温度下进行热处理，进行无铅焊料的单芯片部件43，集成芯片部件44和半导体芯片IC2的焊接。 通过高熔点焊料的半导体芯片IC1的焊接连接通过使用热喷射器在280℃以上的温度进行热处理来进行。 因此，可以使用高熔点焊料将半导体芯片IC 1焊接到PCB 38上，而不会有以下问题：由于热而导致的PCB 38的损坏，例如焊料抗蚀剂的燃烧; 和预浸料从芯材剥离。 因此，半导体芯片IC 1可以以高连接强度安装在PCB 38上。

公开(公告)号：US20080253100A1

公开(公告)日：2008-10-16

申请号：US12137869

申请日：2008-06-12

申请人： Kunio Shigemura ,  Kenji Hanada ,  Masaki Nakanishi ,  Takafumi Nishita ,  Masayoshi Shinoda ,  Seiichi Tomoi

发明人： Kunio Shigemura ,  Kenji Hanada ,  Masaki Nakanishi ,  Takafumi Nishita ,  Masayoshi Shinoda ,  Seiichi Tomoi

IPC分类号： H05K7/06

CPC分类号： H01L25/162 ,  H01L23/3121 ,  H01L23/4824 ,  H01L23/5227 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/743 ,  H01L24/75 ,  H01L24/83 ,  H01L25/50 ,  H01L27/0617 ,  H01L27/0629 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3463 ,  H05K3/3494 ,  H05K2201/045 ,  H05K2203/081 ,  H05K2203/1476 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/43 ,  H01L2924/01006

摘要： A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.

摘要翻译： 提供了一种可以提高使用PCB作为其模块基板的模块的可靠性的技术。 通过使用热块在低于280℃的温度下进行热处理，进行无铅焊料的单芯片部件43，集成芯片部件44和半导体芯片IC2的焊接连接。 通过高熔点焊料的半导体芯片IC1的焊接连接通过使用热喷射器在280℃以上的温度进行热处理来进行。 因此，可以使用高熔点焊料将半导体芯片IC 1焊接到PCB 38上，而不会有以下问题：由于热而导致的PCB 38的损坏，例如焊料抗蚀剂的燃烧; 和预浸料从芯材剥离。 因此，半导体芯片IC 1可以以高连接强度安装在PCB 38上。

公开(公告)号：US07015127B2

公开(公告)日：2006-03-21

申请号：US10408119

申请日：2003-04-08

申请人： Yasuyuki Nakajima ,  Toshiaki Morita ,  Tomoo Matsuzawa ,  Seiichi Tomoi ,  Naoki Kawanabe

发明人： Yasuyuki Nakajima ,  Toshiaki Morita ,  Tomoo Matsuzawa ,  Seiichi Tomoi ,  Naoki Kawanabe

IPC分类号： H01L21/44

CPC分类号： H01L24/05 ,  H01L23/53223 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/49175 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/0496 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20106 ,  H01L2924/20305 ,  H01L2924/20306 ,  H01L2924/20307 ,  H01L2924/20308 ,  H01L2924/20752 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2924/20751 ,  H01L2924/00012

摘要： Provided is a semiconductor device comprising a first metal film formed above a semiconductor chip, a ball portion formed over said first metal film and made of a second metal, and an alloy layer of said first metal and said second metal which alloy layer is formed between said first metal film and said ball portion, wherein said alloy layer reaches the bottom of said first metal film, and said ball portion is covered with a resin; and a manufacturing method thereof. The present invention makes it possible to improve adhesion between the bonding pad portion and ball portion of a bonding wire over an interconnect, thereby improving the reliability of the semiconductor device.

公开(公告)号：US20110183474A1

公开(公告)日：2011-07-28

申请号：US13079939

申请日：2011-04-05

申请人： Kunio Shigemura ,  Kenji Hanada ,  Masaki Nakanishi ,  Takafumi Nishita ,  Masayoshi Shinoda ,  Seiichi Tomoi

发明人： Kunio Shigemura ,  Kenji Hanada ,  Masaki Nakanishi ,  Takafumi Nishita ,  Masayoshi Shinoda ,  Seiichi Tomoi

IPC分类号： H01L21/56

CPC分类号： H01L25/162 ,  H01L23/3121 ,  H01L23/4824 ,  H01L23/5227 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/743 ,  H01L24/75 ,  H01L24/83 ,  H01L25/50 ,  H01L27/0617 ,  H01L27/0629 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3463 ,  H05K3/3494 ,  H05K2201/045 ,  H05K2203/081 ,  H05K2203/1476 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/43 ,  H01L2924/01006

摘要： A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free solder is carried out by heat treatment at a temperature below 280° C. using a heat block. Solder connection of a semiconductor chip IC1 by high-melting point solder is carried out by heat treatment at a temperature of 280° C. or higher using a hot jet. Thus, the semiconductor chip IC1 can be solder connected to PCB 38 using high-melting point solder without the following troubles: damage to the PCB 38 due to heat, for example, burning of solder resist; and peeling of prepreg from a core material. Therefore, the semiconductor chip IC1 can be mounted over the PCB 38 with high connection strength.

摘要翻译： 提供了一种可以提高使用PCB作为其模块基板的模块的可靠性的技术。 通过使用热块在低于280℃的温度下进行热处理，进行无铅焊料的单芯片部件43，集成芯片部件44和半导体芯片IC2的焊接连接。 通过高熔点焊料的半导体芯片IC1的焊接连接通过使用热射流在280℃以上的温度进行热处理来进行。 因此，可以使用高熔点焊料将半导体芯片IC1焊接到PCB 38上，而不会有以下问题：由于热而导致的PCB 38的损坏，例如焊料抗蚀剂的燃烧; 和预浸料从芯材剥离。 因此，半导体芯片IC1可以以高连接强度安装在PCB 38上。