公开(公告)号：US07895742B2

公开(公告)日：2011-03-01

申请号：US11872580

申请日：2007-10-15

申请人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

发明人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

IPC分类号： H01K3/22

CPC分类号： H05K3/28 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/101 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0129 ,  H05K2201/0162 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0759 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916

摘要： A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

摘要翻译： 根据本发明的制造带布线板的方法可以在形成布线图案中采用压印工艺，从而减少制造带布线板的工艺的数量，并允许制造工艺在单个生产线中进行。 因此，制造时间和成本可能降低。 布线图案的轮廓可以通过模具的印模图案的形状来确定。 这可以建立内部和外部引线的顶部宽度并且结合细小的垫间距。 虽然ILB和OLB过程可能使用NCP，但是由于软和弹性布线图案可能建立连接可靠性。

公开(公告)号：US07190073B2

公开(公告)日：2007-03-13

申请号：US11158164

申请日：2005-06-20

申请人： Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Chung-Sun Lee ,  Kyoung-Sei Choi

发明人： Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Chung-Sun Lee ,  Kyoung-Sei Choi

IPC分类号： H01L23/48

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/49811 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H05K3/0032 ,  H05K3/323 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/10674 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： A circuit film having film bumps is provided for a film package. An IC chip is mechanically joined and electrically coupled to the circuit film through the film bumps instead of conventional chip bumps. In a fabrication method, a base film is partially etched by a laser to create an etched area that defines raised portion relatively raised from the etched area. Then a circuit pattern is selectively formed on the base film, partly running over the raised portions. The raised portion and the overlying circuit pattern constitute the film bumps having a height not greater than the height of the circuit film.

摘要翻译： 为薄膜封装提供具有膜凸块的电路薄膜。 IC芯片通过膜凸块机械连接并电耦合到电路膜，而不是传统的芯片凸块。 在制造方法中，通过激光部分地蚀刻基底膜以产生限定从蚀刻区域相对升高的凸起部分的蚀刻区域。 然后，在基膜上选择性地形成电路图案，部分地在凸起部分上运行。 凸起部分和上覆电路图案构成具有不大于电路膜高度的高度的膜凸块。

公开(公告)号：US20060071303A1

公开(公告)日：2006-04-06

申请号：US11218260

申请日：2005-08-31

申请人： Chung-Sun Lee ,  Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Kyoung-Sei Choi

发明人： Chung-Sun Lee ,  Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Kyoung-Sei Choi

IPC分类号： H01L23/58

CPC分类号： H01L23/13 ,  H01L21/4846 ,  H01L21/563 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/838 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/3025 ,  H05K1/0271 ,  H05K1/189 ,  H05K3/0038 ,  H05K3/027 ,  H05K3/22 ,  H05K2201/09072 ,  H05K2201/10674 ,  H05K2201/10977 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05099

摘要： Embodiments of the present invention are directed to a film substrate of a semiconductor package. The film substrate of the semiconductor package comprises a thin film insulating substrate and a thin copper circuit pattern. An inter-pattern groove between the thin copper circuit patterns is formed by laser etching. Accordingly, the embodiment improves electrical contact between the film substrate and a semiconductor chip mounted thereon, and improves the manufacturing process for the film substrate by adopting a simple laser machining to form the thin copper circuit pattern in lieu of a traditional wet-etching process that undergoes complex lithography steps.

摘要翻译： 本发明的实施例涉及一种半导体封装的薄膜基片。 半导体封装的薄膜基板包括薄膜绝缘基板和薄铜电路图案。 通过激光蚀刻形成薄铜电路图案之间的图案间凹槽。 因此，本实施方式改善了薄膜基板与安装在其上的半导体芯片之间的电接触，并且通过采用简单的激光加工来形成薄铜电路图案来代替薄的基板的制造工艺来代替传统的湿式蚀刻工艺， 经历复杂的光刻步骤。

公开(公告)号：US20060003568A1

公开(公告)日：2006-01-05

申请号：US11086614

申请日：2005-03-21

申请人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

发明人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

IPC分类号： H01L21/44

CPC分类号： H05K3/28 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/101 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0129 ,  H05K2201/0162 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0759 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916

摘要： A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

摘要翻译： 根据本发明的制造带布线板的方法可以在形成布线图案中采用压印工艺，从而减少了用于制造带布线板的工艺的数量，并允许制造工艺在单个生产线中进行。 因此，制造时间和成本可能降低。 布线图案的轮廓可以通过模具的印模图案的形状来确定。 这可以建立内部和外部引线的顶部宽度并且结合细小的垫间距。 虽然ILB和OLB过程可能使用NCP，但是由于软和弹性布线图案可能建立连接可靠性。

公开(公告)号：US20110119912A1

公开(公告)日：2011-05-26

申请号：US13019453

申请日：2011-02-02

申请人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

发明人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

IPC分类号： H05K3/00

CPC分类号： H05K3/28 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/101 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0129 ,  H05K2201/0162 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0759 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916

摘要： A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may he reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate tine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

摘要翻译： 根据本发明的制造带布线板的方法可以在形成布线图案中采用压印工艺，从而减少了用于制造带布线板的工艺的数量，并允许制造工艺在单个生产线中进行。 因此，制造时间和成本可能会降低。 布线图案的轮廓可以通过模具的印模图案的形状来确定。 这可以建立内部和外部引线的顶部宽度并结合齿垫间距。 虽然ILB和OLB过程可能使用NCP，但是由于软和弹性布线图案可能建立连接可靠性。

公开(公告)号：US20050285277A1

公开(公告)日：2005-12-29

申请号：US11158164

申请日：2005-06-20

申请人： Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Chung-Sun Lee ,  Kyoung-Sei Choi

发明人： Yong-Hwan Kwon ,  Sa-Yoon Kang ,  Chung-Sun Lee ,  Kyoung-Sei Choi

IPC分类号： G02F1/1345 ,  H01L21/44 ,  H01L21/56 ,  H01L23/12 ,  H01L23/498 ,  H05K3/00 ,  H05K3/32 ,  H05K3/40

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/49811 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H05K3/0032 ,  H05K3/323 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/10674 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： A circuit film having film bumps is provided for a film package. An IC chip is mechanically joined and electrically coupled to the circuit film through the film bumps instead of conventional chip bumps. In a fabrication method, a base film is partially etched by a laser to create an etched area that defines raised portion relatively raised from the etched area. Then a circuit pattern is selectively formed on the base film, partly running over the raised portions. The raised portion and the overlying circuit pattern constitute the film bumps having a height not greater than the height of the circuit film.

摘要翻译： 为薄膜封装提供具有膜凸块的电路薄膜。 IC芯片通过膜凸块机械连接并电耦合到电路膜，而不是传统的芯片凸块。 在制造方法中，通过激光部分地蚀刻基底膜以产生限定从蚀刻区域相对升高的凸起部分的蚀刻区域。 然后，在基膜上选择性地形成电路图案，部分地在凸起部分上运行。 凸起部分和上覆电路图案构成具有不大于电路膜高度的高度的膜凸块。

公开(公告)号：US20050205524A1

公开(公告)日：2005-09-22

申请号：US11075639

申请日：2005-03-08

申请人： Chung-Sun Lee ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Kyoung-Sei Choi

发明人： Chung-Sun Lee ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Kyoung-Sei Choi

IPC分类号： B23K26/36 ,  B23K101/42 ,  C23F1/00 ,  C23F1/18 ,  C23F4/00 ,  C23F4/02 ,  H01L21/60 ,  H05K3/00 ,  H05K3/02 ,  H05K3/06 ,  H05K3/08 ,  H05K3/46

CPC分类号： C23F1/18 ,  C23F1/02 ,  C23F4/02 ,  H05K3/027 ,  H05K3/06 ,  H05K2203/0369 ,  H05K2203/0783 ,  H05K2203/1121 ,  H05K2203/1476

摘要： A method of manufacturing a tape wiring substrate, by which the production cost can be reduced by a simplified manufacturing process. A fine wiring pattern having fine pitches can be formed. The method of manufacturing a tape wiring substrate includes preparing a base film, forming a metal layer on the base film, and processing the metal layer into a wiring pattern using a laser. In addition, the metal layer is partially removed using the laser, and a wiring pattern is formed by a subsequent wet etching.

摘要翻译： 制造带状布线基板的方法，通过简化的制造工艺可以降低生产成本。 可以形成具有细间距的精细布线图案。 制造带状布线基板的方法包括制备基膜，在基膜上形成金属层，并使用激光将金属层加工成布线图案。 此外，使用激光部分地去除金属层，并且通过随后的湿蚀刻形成布线图案。

公开(公告)号：US08250750B2

公开(公告)日：2012-08-28

申请号：US13019453

申请日：2011-02-02

申请人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

发明人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

IPC分类号： H01K3/22

CPC分类号： H05K3/28 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/101 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0129 ,  H05K2201/0162 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0759 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916

摘要： A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate tine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

摘要翻译： 根据本发明的制造带布线板的方法可以在形成布线图案中采用压印工艺，从而减少了用于制造带布线板的工艺的数量，并允许制造工艺在单个生产线中进行。 因此，制造时间和成本可能降低。 布线图案的轮廓可以通过模具的印模图案的形状来确定。 这可以建立内部和外部引线的顶部宽度并结合齿垫间距。 虽然ILB和OLB过程可能使用NCP，但是由于软和弹性布线图案可能建立连接可靠性。

公开(公告)号：US07299547B2

公开(公告)日：2007-11-27

申请号：US11086614

申请日：2005-03-21

申请人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

发明人： Kyoung-Sei Choi ,  Sa-Yoon Kang ,  Yong-Hwan Kwon ,  Chung-Sun Lee

IPC分类号： H05K3/02 ,  H05K3/10

CPC分类号： H05K3/28 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/101 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0129 ,  H05K2201/0162 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0759 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916

摘要： A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

摘要翻译： 根据本发明的制造带布线板的方法可以在形成布线图案中采用压印工艺，从而减少了用于制造带布线板的工艺的数量，并允许制造工艺在单个生产线中进行。 因此，制造时间和成本可能降低。 布线图案的轮廓可以通过模具的印模图案的形状来确定。 这可以建立内部和外部引线的顶部宽度并且结合细小的垫间距。 虽然ILB和OLB过程可能使用NCP，但是由于软和弹性布线图案可能建立连接可靠性。

公开(公告)号：US20060091504A1

公开(公告)日：2006-05-04

申请号：US11256650

申请日：2005-10-21

申请人： Un-Byoung Kang ,  Chung-Sun Lee ,  Sa-Yoon Kang ,  Yong-Hwan Kwon

发明人： Un-Byoung Kang ,  Chung-Sun Lee ,  Sa-Yoon Kang ,  Yong-Hwan Kwon

IPC分类号： H01L23/58

CPC分类号： H05K3/3463 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05572 ,  H01L2224/13144 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75301 ,  H01L2224/8181 ,  H01L2224/81825 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K1/189 ,  H05K3/244 ,  H05K3/3436 ,  H05K3/3473 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： In one embodiment, a film circuit substrate comprises an insulating film made of polyimide resin; a conductive circuit pattern formed on the insulating film, the circuit pattern including an inner lead to be connected with a conductive bump of a semiconductor chip through a bump bonding process; and a tin-indium alloy layer formed on the inner lead to produce an inter-metallic compound layer of AuxSn composition during the bump bonding process.

摘要翻译： 在一个实施例中，薄膜电路基板包括由聚酰亚胺树脂制成的绝缘膜; 形成在所述绝缘膜上的导电电路图案，所述电路图案包括通过凸块接合工艺与半导体芯片的导电凸块连接的内部引线; 以及形成在内部引线上的锡铟合金层，以在凸点焊接工艺期间产生Au / Sn组分的金属间化合物层。