Abstract:
An electrical interconnecting structure suitable for a circuit board is provided. The electrical interconnecting structure includes a core (200), an ultra fine pattern (204a, 204b), and a patterned conductive layer. The core (200) has a surface, and the ultra fine pattern (204a, 204b) is inlaid in the surface of the core. The patterned conductive layer (210a, 210b) is disposed on the surface of the core (200) and is partially connected to the ultra fine pattern, since the ultra fine pattern of the electrical interconnecting structure is inlaid in the surface of the core and is partially connected to the patterned conductive layer located on the surface of the core. There is a through hole (200) and a through via (202a).
Abstract:
A multilayer printed circuit board (5010) comprises a core board (5030) and, as constructed on both sides thereof, a buildup wiring layer obtainable by building up an interlayer resin insulating layer (5050, 5150) and a conductor layer (5058, 5158) alternately with said conductor layers (5058, 5158) being interconnected by via holes (5160). The via holes (5060, 5160) are formed immediately over plated-through holes (5036) in the manner of plugging the through holes (5016) in the core board (5030). In a process for manufacturing the multilayer printed circuit board (5010), the through holes (5016) are pierced by laser light to be not larger than 200 µm in diameter.
Abstract:
A multilayered printed wiring board having a smooth surface, which can be improved in resolution, interlayer insulating property, or thermal shock resistance without lowering its peel strength even if its insulating resin layer is thin. In the printed wiring board in which the conductor circuits of upper and lower layers are electrically insulated from each other by means of the insulating resin layer, the insulating layer is constituted of a composite layer composed of a lower layer made of a heat-resistant resin which is hardly soluble in an acid or oxidizing agent and an upper layer made of a bonding agent for electroless plating composed of a heat-resistant resin and, as necessary, a recessed section formed between conductor circuits of the lower layer is filled with a resin to the level corresponding to the surfaces of the conductor circuits.
Abstract:
A multilayer printed wiring board is composed of a substrate provided with through-holes, and a wiring board formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes having a roughened internal surface and being filled with a filler, an exposed part of the filler in the through-holes being covered with a through-hole-covering conductor layer, and a viahole formed just thereabove being connected to the through-hole-covering conductor layer. Without peeling between the through-holes and the filler, this wiring board has a satisfactory connection reliability between the through-holes and the internal layer circuit and provides a high density wiring.
Abstract:
A printed wiring board having a conductor portion and a wiring pattern, wherein a narrow width portion is formed in the wiring pattern in accordance with a distance from an adjacent conductor portion.
Abstract:
A printed wiring board in which an opening existing around a pad which is a photovia land is arranged so that it is not overlapped with the pad, the area of an opening existing around a pad and that of another opening are equalized, the quantity of resin which is filled in each opening or is equalized throughout a printed wiring board and the quantity of resin overflowing from each opening or when resin is filled in each opening or is uniformed is provided. According to such a printed wiring board, a reliable printed wiring board wherein secure connection is enabled without causing disconnection can be realized when a circuit pattern provided on an interlayer insulating board formed on the printed wiring board and a conductor pad are connected by arranging an opening existing around a conductor pad so that it is not overlapped with the conductor pad and substantially equalizing the quantity of resin which is filled in an opening around a conductor pad and that of resin which is filled in another opening.
Abstract:
Method and apparatus of fabricating a core laminate Printed Circuit Board structure with highly planar external surfaces is provided. A pre-formed flat material including a first resinous sub-material and a second carrier sub-material is used to planarize external surfaces. During lamination, uniform pressure is applied to the pre-formed flat sheet which covers the upper surface of the printed circuit. The resinous material of the first sub-material flows to fill the crevices, vias, etc. of the upper surface of the PCB. Moreover, due to the uniform pressure on the pre-formed flat sheet, the resinous first sub-material is planarized. This planarized surface provides a suitable base substrate for a thin film multilayer build-up structure and that provides electrical connections between the thin film top layers and the Printed Circuit Board - style core layers.
Abstract:
A multilayer printed wiring board (100) which is excellent in reliability because of the short wiring distance of a conductor circuit, high freedom of conductor circuit design, and little possibility of cracks developing in an interlayer resin insulation layer in the vicinity of a via hole, and which comprises conductor circuits (105) and interlayer resin insulation layers (102) sequentially laminated on a substrate (101), conductor circuits sandwiching an interlayer resin insulation layer being connected via a via hole (107), characterized in that via holes in different hierarchies out of all the via holes are formed to be in a stack via structure, and at least one via hole (1072) out of the above via holes in different hierarchies has a land diameter different from those of other via holes (1071, 1073).
Abstract:
A process for manufacturing a multilayer printed circuit board comprises a step for providing openings in an interlayer insulating layer (4002), and a step for filling up the openings with a plating metal to construct via holes (4007) and, at the same time, build up an upper-layer conductor layer (4005). The electroplating is performed using an aqueous solution containing a metal ion and 0.1 to 1.5 mmol/L of at least one additive selected from the group consisting of thioureas, cyanides and polyalkylene oxides as a plating solution.