公开(公告)号：EP2718964A4

公开(公告)日：2014-11-26

申请号：EP12797279

申请日：2012-05-03

申请人： MICRON TECHNOLOGY INC

发明人： WOOD ALAN G ,  IRELAND PHILIP J

IPC分类号： H01L21/768 ,  H01L23/00 ,  H01L23/48

CPC分类号： H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03444 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/03845 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05083 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/04941

摘要： Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor substrate, and part of an interconnect may be formed within the opening. Another opening may be formed to extend from a second side of the substrate to the first part of the interconnect, and another part of the interconnect may be formed within such opening. Some embodiments include semiconductor constructions having a first part of a through-substrate interconnect extending partially through a semiconductor substrate from a first side of the substrate; and having a second part of the through-substrate interconnect extending from a second side of the substrate and having multiple separate electrically conductive fingers that all extend to the first part of the interconnect.

摘要翻译： 一些实施例包括形成穿过半导体衬底的互连的方法。 的开口可以形成穿过半导体衬底延伸中途，以及互连的一部分可以在该开口内形成。 另一个开口可以形成为从基板的第二侧延伸到互连的第一部分，以及互连的另一部分可以搜索开口内形成。 一些实施例包括具有通过从所述基板的第一侧上的半导体衬底部分地延伸贯穿互连衬底的第一部分半导体构造; 并具有从所述基板的第二侧延伸的贯穿互连衬底的第二部分和具有多个单独的导电指状物所做的一切延伸到互连件的第一部分。

公开(公告)号：EP2718964A2

公开(公告)日：2014-04-16

申请号：EP12797279.2

申请日：2012-05-03

申请人： Micron Technology, Inc.

发明人： WOOD, Alan, G. ,  IRELAND, Philip, J.

IPC分类号： H01L21/28 ,  H01L21/768

CPC分类号： H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03444 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/03845 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05083 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/04941

摘要： Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor substrate, and part of an interconnect may be formed within the opening. Another opening may be formed to extend from a second side of the substrate to the first part of the interconnect, and another part of the interconnect may be formed within such opening. Some embodiments include semiconductor constructions having a first part of a through-substrate interconnect extending partially through a semiconductor substrate from a first side of the substrate; and having a second part of the through-substrate interconnect extending from a second side of the substrate and having multiple separate electrically conductive fingers that all extend to the first part of the interconnect.

摘要翻译： 一些实施例包括通过半导体衬底形成互连的方法。 可以形成开口以在半导体衬底的中途延伸，并且可以在开口内形成一部分互连。 可以形成另一个开口，以从基板的第二侧延伸到互连的第一部分，并且可以在该开口内形成互连的另一部分。 一些实施例包括半导体结构，其具有从衬底的第一侧部分延伸穿过半导体衬底的贯穿衬底互连件的第一部分; 并且具有从所述衬底的第二侧延伸的所述贯穿衬底互连件的第二部分，并且具有全部延伸到所述互连件的第一部分的多个分离的导电指状物。

公开(公告)号：EP1949437B1

公开(公告)日：2014-01-01

申请号：EP06844265.6

申请日：2006-11-02

申请人： Second Sight Medical Products, Inc.

发明人： GREENBERG, Robert J. ,  TALBOT, Neil Hamilton ,  NEYSMITH, Jordan Matthew ,  OK, Jerry ,  JIANG, Honggang

IPC分类号： H01L23/31 ,  A61N1/375 ,  H01L23/29

CPC分类号： A61N1/375 ,  A61N1/3754 ,  H01L23/291 ,  H01L23/3107 ,  H01L24/03 ,  H01L24/05 ,  H01L24/12 ,  H01L24/85 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/351 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

公开(公告)号：EP1920459A4

公开(公告)日：2012-07-25

申请号：EP06768415

申请日：2006-07-27

申请人： SEMICONDUCTOR ENERGY LAB

发明人： TAKAHASHI HIDEKAZU ,  SUGIYAMA EIJI

IPC分类号： H01L21/3205 ,  H01L21/683 ,  H01L23/485 ,  H01L27/12

CPC分类号： H01L21/84 ,  H01L21/6835 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13 ,  H01L2221/6835 ,  H01L2221/68368 ,  H01L2221/68386 ,  H01L2223/6677 ,  H01L2224/0332 ,  H01L2224/0355 ,  H01L2224/0391 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05116 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/0517 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05173 ,  H01L2224/05178 ,  H01L2224/05179 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05188 ,  H01L2224/05339 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/32225 ,  H01L2224/83 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01054 ,  H01L2924/01058 ,  H01L2924/0106 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/07802 ,  H01L2924/12044 ,  H01L2924/13069 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device of the present invention is provided including the steps of forming a first conductive layer over a substrate; forming a second conductive layer containing a conductive particle and resin over the first conductive layer; and increasing an area where the first conductive layer and the second conductive layer are in contact with each other by irradiating the second conductive layer with a laser beam. By including the step of laser beam irradiation, the portion where the first conductive layer and the second conductive layer are in contact with each other can be increased and defective electrical connection between the first conductive layer and the second conductive layer can be improved.

公开(公告)号：EP1500140B1

公开(公告)日：2010-06-30

申请号：EP03722222.1

申请日：2003-03-17

申请人： Infineon Technologies AG

发明人： BARTH, Hans-Joachim ,  HOLZ, Jürgen

IPC分类号： H01L23/522

CPC分类号： H01L24/05 ,  H01L23/5223 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00

摘要： The invention concerns an integrated circuit and methods for making same. The invention is characterized in that it consists in depositing an intermediate layer (16) of dielectric material between two metal layers (102, 104). Said intermediate layer (160) is formed such that the capacitance operating at the surface between the metal layers (102, 104) is greater than 0.5 fF/ν2, for instance the intermediate layer has a relative permittivity ranging between 4 and 30, and a thickness ranging between 200 nm and 100 nm.

公开(公告)号：EP1176640A3

公开(公告)日：2004-03-17

申请号：EP01000318.4

申请日：2001-07-27

申请人： Texas Instruments Incorporated

发明人： Efland, Taylor R ,  Pendharkar, Sameer

IPC分类号： H01L23/485 ,  H01L23/528

CPC分类号： H01L24/48 ,  H01L23/4952 ,  H01L23/49562 ,  H01L23/5286 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/4554 ,  H01L2224/45669 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4845 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01037 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2924/20755 ,  H01L2924/00015 ,  H01L2924/2075

摘要： A semiconductor integrated circuit comprises contact pads located over active components, which are positioned to minimize the distance for power delivery between a selected pad and one or more corresponding active components, to which the power is to be delivered. This minimum distance further enhances dissipation of thermal energy released by the active components. More specifically, a semiconductor integrated circuit comprises a laterally organized power transistor, an array of power supply contact pads distributed over the transistor, means for providing a distributed, predominantly vertical current flow from the contact pads to the transistor, and means for connecting a power source to each of the contact pads. Positioning the power supply contact pads directly over the active power transistor further saves precious silicon real estate area. The means for vertical current flow include contact pads made of a stack of metal layers comprising refractory metals for adhesion, copper and nickel as stress-absorbing metals, and gold or palladium as bondable and solderable outermost metals. The means for connecting a power source include wire bonding and solder ball interconnection.

公开(公告)号：EP1176640A2

公开(公告)日：2002-01-30

申请号：EP01000318.4

申请日：2001-07-27

申请人： Texas Instruments Incorporated

发明人： Efland, Taylor R ,  Pendharkar, Sameer

IPC分类号： H01L23/485

CPC分类号： H01L24/48 ,  H01L23/4952 ,  H01L23/49562 ,  H01L23/5286 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/4554 ,  H01L2224/45669 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4845 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01037 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2924/20755 ,  H01L2924/00015 ,  H01L2924/2075

摘要： A semiconductor integrated circuit comprises contact pads located over active components, which are positioned to minimize the distance for power delivery between a selected pad and one or more corresponding active components, to which the power is to be delivered. This minimum distance further enhances dissipation of thermal energy released by the active components.
More specifically, a semiconductor integrated circuit comprises a laterally organized power transistor, an array of power supply contact pads distributed over the transistor, means for providing a distributed, predominantly vertical current flow from the contact pads to the transistor, and means for connecting a power source to each of the contact pads. Positioning the power supply contact pads directly over the active power transistor further saves precious silicon real estate area. The means for vertical current flow include contact pads made of a stack of metal layers comprising refractory metals for adhesion, copper and nickel as stress-absorbing metals, and gold or palladium as bondable and solderable outermost metals. The means for connecting a power source include wire bonding and solder ball interconnection.

摘要翻译： 半导体集成电路包括位于有源部件上方的接触焊盘，其被定位成使得所选择的焊盘与要传送电力的一个或多个相应的有源部件之间的功率传递的距离最小化。 该最小距离进一步增强了由有源部件释放的热能的耗散。 更具体地，半导体集成电路包括横向组织的功率晶体管，分布在晶体管上的电源接触焊盘的阵列，用于提供从接触焊盘到晶体管的分布式主要垂直电流的装置，以及用于连接功率的装置 源到每个接触垫。 将电源接触焊盘直接定位在有源功率晶体管上，进一步节省了宝贵的硅片面积。 用于垂直电流的装置包括由堆叠的金属层构成的接触垫，包括用于粘合的难熔金属，作为应力吸收金属的铜和镍，以及作为可焊接和可焊接的最外金属的金或钯。 用于连接电源的装置包括引线接合和焊球互连。

公开(公告)号：EP0825646A2

公开(公告)日：1998-02-25

申请号：EP97114374.8

申请日：1997-08-20

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Anand, Minakshisundaran Balasubramanian

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05546 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/45124 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48766 ,  H01L2224/85201 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2224/05556 ,  H01L2924/00

摘要： In the present invention, the bonding pad (21) is formed in a lattice-like shape. Directly underneath the passivation layer (22), the etching stopper layer (29) is provided. An opening (23) is made through the passivation layer (22) and the etching stopper layer (29) so as to expose the bonding pad (21). The cavity sections of the lattice-like shape of the bonding pad (21) are filled with the insulating layer (27). The bonding wire (28) is connected to the lattice-shaped bonding pad (21). With this structure, the bonding error of the device manufactured by the damascening process can be avoided.

摘要翻译： 在本发明中，接合焊盘（21）形成为格子状。 在钝化层（22）的正下方设置蚀刻阻止层（29）。 穿过钝化层（22）和蚀刻阻挡层（29）形成开口（23）以露出接合焊盘（21）。 焊盘（21）的格状形状的空腔部分填充有绝缘层（27）。 键合线（28）连接到格状键合焊盘（21）。 采用这种结构，可以避免由大马士革工艺制造的器件的键合错误。

公开(公告)号：EP0723294A2

公开(公告)日：1996-07-24

申请号：EP96100749.9

申请日：1996-01-19

申请人： MOTOROLA, INC.

发明人： Hsu, Ting-Chen

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L24/48 ,  H01L21/2007 ,  H01L23/53223 ,  H01L24/05 ,  H01L24/45 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/4807 ,  H01L2224/48458 ,  H01L2224/4847 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  Y10S438/958 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/00

摘要： Bond pads (394, 106) and bond pad openings (62, 108) are formed such that the bond pad openings (62, 108) are asymmetric to the conductive sections (398, 106) of the bond pads (394, 106). If the bond pads are more likely to lift from the scribe line side of the bond pad (394, 106), the bond pad openings (62, 108) are formed such that the passivation layer (52) overlies more of the conductive section (398, 106) near the scribe line (40). If the bond pads (394, 106) are more likely to lift from the other side, the passivation layer (52) overlies more of the other side of the conductive section (398, 106). In addition to reducing the risk of lifting, contamination problems should also be reduced.

摘要翻译： 形成接合焊盘（394,106）和接合焊盘开口（62,108），使得接合焊盘开口（62,108）与接合焊盘（394,106）的导电部分（398,106）不对称。 如果接合焊盘更可能从接合焊盘（394,106）的划线侧提升，则形成接合焊盘开口（62,108），使得钝化层（52）覆盖导电部分 398,106）在划线（40）附近。 如果接合焊盘（394,106）更可能从另一侧提升，则钝化层（52）覆盖在导电部分（398,106）的另一侧的更多侧。 除了降低起重风险外，还应降低污染问题。

公开(公告)号：EP3226282A1

公开(公告)日：2017-10-04

申请号：EP16163263.3

申请日：2016-03-31

申请人： Techni Holding AS

发明人： LARSSON, Andreas ,  TOLLEFSEN, Torleif A.

IPC分类号： H01L21/58 ,  H05K3/34 ,  B23K20/02 ,  B23K20/233 ,  B23K35/26 ,  B23K35/30

CPC分类号： B23K20/02 ,  B23K20/026 ,  B23K20/233 ,  B23K35/26 ,  B23K35/3013 ,  C22C5/00 ,  C22C19/00 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/04026 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05155 ,  H01L2224/05187 ,  H01L2224/05644 ,  H01L2224/27462 ,  H01L2224/29109 ,  H01L2224/29144 ,  H01L2224/3201 ,  H01L2224/32503 ,  H01L2224/83075 ,  H01L2224/8309 ,  H01L2224/83101 ,  H01L2224/83203 ,  H01L2224/83444 ,  H01L2224/83455 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/8383 ,  H01L2224/83948 ,  H01L2224/92 ,  H01L2224/94 ,  H05K3/34 ,  H01L2924/01032 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/048 ,  H01L2924/01028 ,  H01L2224/05144 ,  H01L2924/01015 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/27 ,  H01L21/78 ,  H01L2224/83

摘要： The present invention relates to a method of forming a joint (25) bonding together two solid objects (20, 22) and a joint (25) made by the method, where the joint (25) is formed by a layer (24) of a binary system of components A and B which upon heat treatment forms a porous, coherent and continuous single-phased solid-solution of the components A and B extending across a bonding layer of the joint (25) and a second phase of the components A and B dispersed in the porous, coherent and continuous single-phased solid-solution structure. Components A and B may be fully miscible in the solid state. Alternatively, the binary system of components A and B may be a partly miscible eutectic system. The first and second solid objects (20, 22) may be any physical objects which are to be bonded together, i.e. materials such as e.g. Si, SiC, GaAs, GaN, SOI, Alumina, AIN, Si3N4, glass, Kovar, Cu, Al, etc. and/or components such as e.g. MEMS, transistors, substrates, resistances, condensers, ICs, diodes, etc.
The present invention has the advantages of enabling forming the bond (25) at a relatively low process temperature which may be less than the intended operation temperature of the bond (25) and also of partly remelting the bonding layer (25) if the operation temperature becomes higher than the solidus temperature. The partly remelting of the bond layer (25) according to the invention is believed to provide an advantage of releasing thermal stresses in the bond (25), possible recovery of zones with significant defect concentrations at grain boundaries, and probably also reducing the occurrence of a detrimental Kirkendall voiding effect between the bonded components (20, 22). Thus the joints (25) according to the present invention are believed to be more resilient when exposed to thermal loads such as cycling and high temperature operation, especially when the thermal cycling involves temperatures above the solidus temperature. Another benefit of the joint (25) according to the invention is that it avoids fragile intermetallic compounds.

摘要翻译： 本发明涉及一种形成将两个固体物体（20,22）和通过该方法制造的接头（25）接合在一起的接头（25）的方法，其中接头（25）由 组分A和组分B的二元体系，其在热处理时形成组分A和组分B的多孔的，连贯的和连续的单相固体溶液，组分A和组分B延伸穿过接头（25）的粘结层并且组分A 和B分散在多孔，连贯和连续的单相固溶体结构中。 组分A和B可以在固态下完全混溶。 或者，组分A和B的二元体系可以是部分可混溶的共晶体系。 第一和第二固体物体（20,22）可以是要粘合在一起的任何物理物体，例如， Si，SiC，GaAs，GaN，SOI，氧化铝，AlN，Si 3 N 4，玻璃，可伐合金，Cu，Al等和/或例如 MEMS，晶体管，衬底，电阻，电容器，IC，二极管等。本发明具有能够在相对低的工艺温度下形成结合部（25）的优点，所述工艺温度可以低于结合部 ），并且如果操作温度变得高于固相线温度，则部分重熔接合层（25）。 相信根据本发明的粘结层（25）的部分重熔提供了释放粘结（25）中的热应力的优点，可能恢复晶界处具有显着缺陷浓度的区域，并且还可能减少 粘合组件之间的有害Kirkendall空洞效应（20,22）。 因此，当暴露于热负荷如循环和高温操作时，尤其是当热循环涉及高于固相线温度的温度时，据信本发明的接头（25）更具有弹性。 根据本发明的接头（25）的另一个益处在于它避免了脆弱的金属间化合物。