公开(公告)号：EP2001274A2

公开(公告)日：2008-12-10

申请号：EP08157592.0

申请日：2008-06-04

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Yamano, Takaharu, Shinko Electric Industries Co., Ltd.

IPC: H05K3/40

CPC classification number: H01L21/76898 ,  H01L21/486 ,  H01L23/147 ,  H01L23/49833 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K3/205 ,  H05K3/4038 ,  H05K3/423 ,  H05K3/4605 ,  H05K3/4647 ,  H05K2201/0979 ,  H05K2203/0376 ,  H05K2203/063 ,  H05K2203/0733 ,  H01L2924/00

Abstract: A manufacturing method of a substrate with through electrodes 14, comprising a substrate 11 having through holes 18, and through electrodes 14 received in the through holes 18, includes a through electrode formation step of forming the through electrodes 14 on a support plate, a substrate formation step of forming the substrate 11, a through electrode reception step of stacking the substrate 11 on the support plate and receiving the through electrodes 14 in the through holes 18, a resin filling step of filling gaps between side surfaces of the through electrodes and inner walls of the through holes of the substrate 11 with a resin 12, and a support plate removal step of removing the support plate after the resin filling step.

Abstract translation: 具有贯通电极14的基板的制造方法，包括具有通孔18的基板11和容纳在贯通孔18中的电极14的贯通电极14，其包括在贯通电极形成工序中形成贯通电极14， 形成基板11的形成步骤，通过电极接收步骤，将基板11堆叠在支撑板上并在通孔18中接收通孔14;树脂填充步骤，填充通孔的侧表面之间的间隙， 基板11的通孔的壁与树脂12，以及在树脂填充步骤之后移除支撑板的支撑板移除步骤。

公开(公告)号：EP1471574B1

公开(公告)日：2008-01-23

申请号：EP04252265.6

申请日：2004-04-16

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Murayama, Kei ,  Sunohara, Masahiro

IPC: H01L23/498 ,  H01L23/538

CPC classification number: H01L23/49827 ,  H01L23/562 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81206 ,  H01L2224/81801 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H05K1/113 ,  H05K3/328 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/10674 ,  H05K2203/0285 ,  H01L2924/00

公开(公告)号：EP1827063A2

公开(公告)日：2007-08-29

申请号：EP07003621.5

申请日：2007-02-22

Applicant: MINEBEA Co., Ltd.

Inventor： Ohno, Yasuo ,  Ota, Chiharu

IPC: H05K1/11 ,  H01L33/00

CPC classification number: H05K1/112 ,  G02B6/0073 ,  G02B6/0083 ,  G02B6/0085 ,  H01L33/64 ,  H01L33/641 ,  H05K1/0206 ,  H05K3/0061 ,  H05K3/305 ,  H05K3/3442 ,  H05K2201/0209 ,  H05K2201/09072 ,  H05K2201/0979 ,  H05K2201/10106 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: In a spread illuminating apparatus including: an LED (3) at a side surface of a light conductor plate; and an FPC (10) having a land (26) formed on a side thereof for mounting the LED, throughholes (42) are formed at the land, and solder is contained at least partly in each of the throughholes, whereby the LED can be mounted solidly on the FPC with a high precision in height position from the FPC, and at the same time the heat emitted from the LED can be efficiently conducted to a conductive pattern at the rear side of the FPC through an electrode terminal of the LED and the throughholes filled with the solder composed of a metallic material having a high heat conductance.

Abstract translation: 一种扩展照明装置，包括：在导光板的侧面的LED（3） 并且在所述台面上形成具有在其一侧形成用于安装LED的通孔（42）的平台（26）的FPC（10），并且焊料至少部分地包含在每个通孔中，由此LED可以 以FPC的高度精确地安装在FPC上，并且同时可以通过LED的电极端子将从LED发射的热量有效地传导到FPC后侧的导电图案， 填充有由具有高导热性的金属材料构成的焊料的通孔。

公开(公告)号：EP0924774B1

公开(公告)日：2007-08-29

申请号：EP98310178.3

申请日：1998-12-11

Applicant: GENERAL ELECTRIC COMPANY

Inventor： Vafi, Habib ,  Petrick, Scott William ,  Allen, Philip Marshall ,  Saunders, Rowland Frederick

IPC: H01L31/02 ,  H01L27/146

CPC classification number: H01L31/02002 ,  H05K1/117 ,  H05K3/225 ,  H05K3/361 ,  H05K2201/0979

公开(公告)号：EP0966031B1

公开(公告)日：2007-08-01

申请号：EP99304638.2

申请日：1999-06-15

Applicant: SHINKO ELECTRIC INDUSTRIES CO. LTD.

Inventor： Murayama, Kei, Shinko Electric Industries Co. Ltd. ,  Higashi, Mitsutoshi, Shinko Electric Ind. Co. Ltd.

IPC: H01L21/56 ,  H01L21/60 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11

CPC classification number: H01L24/83 ,  H01L23/49838 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/01004 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H05K1/111 ,  H05K2201/09709 ,  H05K2201/0979 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

公开(公告)号：EP1506701B1

公开(公告)日：2007-07-11

申请号：EP03787806.3

申请日：2003-04-18

Applicant: International Business Machines Corporation ,  Compagnie IBM France

Inventor： CASTRIOTTA, Michele ,  OGGIONI, Stefano ,  ROGIANI, Gianluca ,  SPREAFICO, Mauro ,  VIERO, Giorgio

IPC: H05K1/11 ,  H01L23/538

CPC classification number: H05K1/0251 ,  H01L23/49827 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/15173 ,  H01L2924/3011 ,  H05K1/112 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4602 ,  H05K2201/09236 ,  H05K2201/09381 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/0979 ,  H01L2924/00

Abstract: A stacked via structure (200) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks (205a, 205b, 205c) belonging to three adjacent conductive layers (110a, 110b, 110c) separated by dielectric layers (120), aligned according to z axis. Connections between these conductive tracks are done with at least two vias (210, 215) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis. In a preferred embodiment, the shape of these aligned conductive tracks looks like a disk or an annular ring and four vias are used to connect two adjacent conductive layers. These four vias are symmetrically disposed on each of said conductive track. The position of the vias between a first and a second adjacent conductive layers and between a second and a third adjacent conductive layers forms an angle of 45° according to z axis.

公开(公告)号：EP1598863A1

公开(公告)日：2005-11-23

申请号：EP04714921.6

申请日：2004-02-26

Applicant: HAMAMATSU PHOTONICS K. K.

Inventor： SHIBAYAMA, Katsumi, c/o Hamamatsu Photonics K.K. ,  KUSUYAMA, Yutaka, c/o Hamamatsu Photonics K.K. ,  HAYASHI, Masahiro, c/o Hamamatsu Photonics K.K.

IPC: H01L21/60 ,  A61B6/03 ,  G01T1/20 ,  G01T1/24 ,  H01L23/12 ,  H01L27/146

CPC classification number: H05K3/3436 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/16 ,  H01L24/81 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14658 ,  H01L27/14676 ,  H01L31/02322 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/15788 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K1/0306 ,  H05K2201/0979 ,  H05K2203/0455 ,  Y02P70/613 ,  H01L2924/00

Abstract: A wiring substrate to which a semiconductor element 10 is connected, is a wiring substrate 20 comprised of a glass substrate with through-hole groups 20d, each group consisting of a plurality of through holes 20c extending from input surface 20a to output surface 20b and formed in a predetermined array, and conductive members 21 formed on respective inner walls of the through holes 20c in each through-hole group 20d so as to establish electrical continuity between input surface 20a and output surface 20b. A bump electrode 12 of semiconductor element 10 connected to the input surface 20a corresponds to each through-hole group 20d, conductive member 21, and conductive part 22 formed in a region covering the through-hole group 20d, and is connected so that a portion of the bump electrode 12 enters into an interior of each of the through holes 20c. This provides a semiconductor device in which good connection is made between the semiconductor element and the corresponding conduction path in the wiring substrate, and a radiation detector using it.

Abstract translation: 连接有半导体元件10的布线基板是由具有通孔组20d的玻璃基板构成的布线基板20，每个组由从输入表面20a延伸到输出表面20b的多个通孔20c组成，并形成 以及形成在各通孔组20d中的贯通孔20c的各内壁上的导电构件21，以便在输入表面20a和输出表面20b之间建立电连续性。 连接到输入表面20a的半导体元件10的突起电极12对应于形成在覆盖通孔组20d的区域中的每个通孔组20d，导电部件21和导电部分22，并且连接成使得部分 突起电极12进入每个通孔20c的内部。 这提供了一种半导体器件，其中在半导体元件和布线基板中的相应导电路径之间形成良好的连接，以及使用该半导体器件的辐射检测器。

公开(公告)号：EP1414279A2

公开(公告)日：2004-04-28

申请号：EP03022912.4

申请日：2003-10-09

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Furutani, Koji, (170)Intellectual Property Dept.

IPC: H05K1/02 ,  H05K3/46 ,  H01L23/538

CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L2924/0002 ,  H04B1/005 ,  H04B1/0057 ,  H04B1/006 ,  H04B1/52 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/112 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/0979 ,  H01L2924/00

Abstract: In a high-frequency module, intermediate ground electrodes (Go1, Gm1, Gg1, Go2, Gm2, Gg2) are provided between a common ground electrode (Gd) and upper-surface ground electrodes (Gq1, Gq2,) for mounting high-frequency components (21, 22) on an upper surface of a multilayer substrate. With regard to the number of via-hole conductors interconnecting ground electrodes, the number of via-hole conductors (Vdg) between the intermediate ground electrodes (Go1, Gm1, Gg1, Go2, Gm2, Gg2) and the common ground electrode (Gg) is larger than the number of via-hole conductors (Voq) between the upper-surface ground electrodes (Gq1, Gq2) and the intermediate ground electrodes (Go1, Gm1, Gg1, Go2, Gm2, Gg2).

公开(公告)号：EP1030366A3

公开(公告)日：2003-08-06

申请号：EP00102116.1

申请日：2000-02-04

Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.

Inventor： Kimbara, Hidenori, Mitsubishi Gas Chem. Co., Inc. ,  Ikeguchi, Nobuyuki, Mitsubishi Gas Chem. Co., Inc. ,  Komatsu, Katsuji, Mitsubishi Gas Chem. Co., Inc.

IPC: H01L23/32 ,  H01L23/498

CPC classification number: H01L24/45 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49866 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/01105 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/40252 ,  H05K1/0373 ,  H05K1/112 ,  H05K3/0038 ,  H05K3/3436 ,  H05K3/4629 ,  H05K2201/0209 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/0979 ,  Y02P70/613 ,  Y10T428/24917 ,  Y10T428/31681 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0002 ,  H01L2224/45099 ,  H01L2224/43

Abstract: Provided is a printed wiring board for a chip size scale package, which overcomes the poor adhesion of solder balls to a base material which poor adhesion is caused by a recent decrease in the size of the solder balls, and in the chip size scale package, the distortion of the printed wiring board is decreased and the distortion of a semiconductor plastic package formed by mounting a semiconductor chip on the printed wiring board by wire bonding or flip chip bonding is decreased. The printed wiring board has, as a substrate for a chip scale package, a double-side copper-clad laminate formed of an insulation layer and having copper foils on both surfaces,    wherein the double-side copper-clad laminate has an upper copper foil surface and a lower copper foil surface, the upper copper foil surface has a wire bonding or flip chip bonding terminal and has a copper pad in a position where the copper pad can be electrically connected to said wire bonding or flip chip bonding terminal and can be connected to a blind via hole formed in the lower copper surface, the lower copper foil surface has a solder-balls-fixing pad in a position corresponding to said copper pad, the solder-balls-fixing pad has at least 2 blind via holes within itself, and the solder-balls-fixing pad connected to a reverse surface of the copper pad with a conductive material is electrically connected with solder balls which are melted and filled in blind via holes so as to be mounded.

Abstract translation: 提供了一种用于芯片尺寸封装的印刷线路板，其克服了焊球对基材的粘附性差，由于焊球的尺寸的最近减小而导致粘合性差，并且在芯片尺寸尺寸封装中， 印刷布线板的变形减小，并且通过引线接合或倒装芯片接合将半导体芯片安装在印刷线路板上形成的半导体塑料封装的变形减小。 印刷电路板具有作为芯片级封装用基板的双面覆铜层压板，其由双层覆铜层压板形成在绝缘层上并具有铜箔的双面覆铜层压板， 表面和较低的铜箔表面，上铜箔表面具有引线键合或倒装芯片接合端子，并且在铜焊盘可以电连接到所述引线键合或倒装芯片接合端子的位置具有铜焊盘，并且可以 连接到形成在下铜表面的盲孔，下铜箔表面在与所述铜垫对应的位置具有焊球固定垫，焊球固定垫在其内具有至少2个盲孔 并且用导电材料连接到铜焊盘的背面的焊球固定垫与熔化并填充在盲孔中的焊球电连接以使其隆起。

公开(公告)号：EP1111974A3

公开(公告)日：2003-05-14

申请号：EP00127521.3

申请日：2000-12-15

Applicant: Grundig AG

Inventor： Schneidzig, Peter

IPC: H05K3/34

CPC classification number: H05K3/3447 ,  H05K3/3468 ,  H05K3/4046 ,  H05K2201/0979 ,  H05K2201/10303 ,  H05K2201/10871

Abstract: Die Erfindung betrifft ein Verfahren zur Herstellung einer Lötverbindung eines Anschlußelements 9 mit einer auf einer Platine 1 vorgesehenen Kontaktstelle 5, 7 mit folgenden Schritten: a) Vorsehen einer ersten Kontaktstelle 5 auf der Unterseite der Platine 1 und einer zweiten Kontaktstelle 7 in gegenüberliegender Anordnung auf der Oberseite der Platine 1, b) Durchführen des Anschlußelements 9 durch einen die erste 5 und die zweite Kontaktstelle 7 durchgreifenden Durchbruch 6, so daß das freie Ende des Anschlußelements 9 über eine durch die erste Kontaktstelle 5 beschriebene Ebene hervorsteht und zwischen der Wand des Durchbruchs 6 und dem Anschlußelements 9 ein Ringspalt gebildet ist, und c) Aufbringen eines schmelzflüssigen Lots 12 auf das die erste Kontaktstelle 5 und das freie Ende des Anschlußelements 9, so daß das Lot 12 in den Ringspalt 11 eindringt und entlang des Anschlußelements 9 zur zweiten Kontaktstelle 7 fließt, und eine Lötverbindung zwischen der ersten 5 und der zweiten Kontaktstelle 7 und dem Anschlußelement 9 gebildet wird.

Abstract translation: 端子焊接连接制造方法具有通过设置在施加到电路板（1）的相对侧的2个对准的触点（5,7）中的开口（6）配合的端子元件（9），从而在 开口的内壁和端子元件的外侧。 液体焊料被供应到端子元件的上接触件和自由端，使得其流入环形间隙中，以在端子元件和接触件之间提供焊接连接。 附接到端子元件的部件（10）邻近上部接触件，使得其通过焊料与其连接。 还包括提供焊接连接的电路的独立权利要求。