公开(公告)号：US20110290402A1

公开(公告)日：2011-12-01

申请号：US12788832

申请日：2010-05-27

Applicant: Paul Andry ,  Bing Dang ,  John Knickerbocker ,  Aparna Prabhakar ,  Peter Sorce ,  Robert E. Trzcinski ,  Cornelia K. Tsang

Inventor： Paul Andry ,  Bing Dang ,  John Knickerbocker ,  Aparna Prabhakar ,  Peter Sorce ,  Robert E. Trzcinski ,  Cornelia K. Tsang

IPC: B32B33/00 ,  B29C65/16

CPC classification number: H01L21/67132 ,  C09J5/06 ,  C09J2203/326 ,  C09J2479/08 ,  H01L21/6835 ,  H01L2221/6835 ,  H01L2221/68381 ,  Y10T156/1158

Abstract: A method for attaching a handler to a wafer, the wafer comprising an integrated circuit (IC), includes forming a layer of an adhesive on the wafer, the adhesive comprising a polyimide-based polymer configured to withstand processing at a temperature of over about 280° C.; and adhering a handler to the wafer using the layer of adhesive. A system for attaching a handler to a wafer, the wafer comprising IC, includes a layer of an adhesive located on the wafer, the adhesive comprising a polyimide-based polymer configured to withstand processing at a temperature of over about 280° C.; and a handler adhered to the wafer using the layer of adhesive.

Abstract translation: 一种用于将处理器附接到晶片的方法，所述晶片包括集成电路（IC），包括在所述晶片上形成粘合剂层，所述粘合剂包括基于聚酰亚胺的聚合物，所述聚酰亚胺基聚合物构造成经受超过约280℃的温度下的加工 C。; 以及使用所述粘合剂层将处理器粘附到所述晶片。 一种用于将处理器附接到晶片的系统，包括IC的晶片包括位于晶片上的粘合剂层，所述粘合剂包括基于聚酰亚胺的聚合物，其被配置为经受超过约280℃的温度下的加工; 以及使用粘合剂层粘附到晶片的处理器。

公开(公告)号：US20070246518A1

公开(公告)日：2007-10-25

申请号：US11409233

申请日：2006-04-21

Applicant: Steven Cordes ,  Peter Gruber ,  John Knickerbocker ,  James Speidell

Inventor： Steven Cordes ,  Peter Gruber ,  John Knickerbocker ,  James Speidell

IPC: B23K20/08 ,  B23K31/02 ,  B23K1/00

CPC classification number: B23K3/0638 ,  B23K1/20 ,  B23K2101/40 ,  H01L24/11 ,  H01L24/742 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

Abstract: A system, method, and apparatus for injection molding conductive bonding material into a plurality of cavities in a surface are disclosed. The method comprises aligning a fill head with a surface. The mold includes a plurality of cavities. The method further includes placing the fill head in substantial contact with the surface. At least a first gas is channeled about a first region of the fill head. The at least first gas has a temperature above a melting point of conductive bonding material residing in a reservoir thereby maintaining the conductive bonding material in a molten state. The conductive bonding material is forced out of the fill head toward the surface. The conductive bonding material is provided into at least one cavity of the plurality of cavities contemporaneous with the at least one cavity being in proximity to the fill head.

Abstract translation: 公开了一种用于将导电接合材料注射成表面中的多个空腔的系统，方法和装置。 该方法包括将填充头与表面对准。 模具包括多个空腔。 该方法还包括将填充头与表面实质接触。 至少第一气体围绕填充头的第一区域引导。 所述至少第一气体具有高于位于储存器中的导电接合材料的熔点的温度，从而将导电接合材料保持在熔融状态。 导电接合材料从表面压出填料头。 导电接合材料被提供到与填充头附近的至少一个空腔同时的多个空腔的至少一个空腔中。

公开(公告)号：US20070246516A1

公开(公告)日：2007-10-25

申请号：US11409242

申请日：2006-04-21

Applicant: Steven Cordes ,  Peter Gruber ,  John Knickerbocker ,  James Speidell

Inventor： Steven Cordes ,  Peter Gruber ,  John Knickerbocker ,  James Speidell

IPC: B23K31/02 ,  B23K1/08

CPC classification number: B23K3/0638 ,  B23K1/0016 ,  B23K3/0623 ,  B23K2101/40 ,  H01L24/11 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/3478 ,  H05K3/3484 ,  H05K2201/09945 ,  H05K2203/0113 ,  H05K2203/043 ,  H01L2924/00

Abstract: A system, method, and device for applying conductive bonding material to a substrate are disclosed. The method includes providing conductive bonding material in a plurality of cavities of a mold. A total number of cavities in the plurality of cavities being greater than a total number of at least one conductive pad of a circuit supporting substrate corresponding to the mold. The conductive bonding material in the mold is heated to a reflow temperature of the conductive bonding material. At least one wettable surface is placed in substantial contact with the heated conductive bonding material in at least one cavity. The mold and the corresponding circuit supporting substrate are brought in close proximity to each other such that the heated conductive bonding material in at least one cavity comes in contact with at least one conductive pad of the corresponding circuit supporting substrate.

Abstract translation: 公开了一种用于将导电接合材料施加到基底的系统，方法和装置。 该方法包括在模具的多个空腔中提供导电接合材料。 多个空腔中的空腔的总数大于对应于模具的电路支撑衬底的至少一个导电焊盘的总数。 将模具中的导电接合材料加热至导电接合材料的回流温度。 在至少一个空腔中至少一个可润湿表面被放置成与被加热的导电接合材料基本接触。 模具和相应的电路支撑衬底彼此靠近，使得至少一个空腔中的加热的导电接合材料与相应的电路支撑衬底的至少一个导电焊盘接触。

公开(公告)号：US20070138657A1

公开(公告)日：2007-06-21

申请号：US11314272

申请日：2005-12-21

Applicant: Vincenzo Condorelli ,  Claudius Feger ,  Kevin Gotze ,  Nihad Hadzic ,  John Knickerbocker ,  Edmund Sprogis

Inventor： Vincenzo Condorelli ,  Claudius Feger ,  Kevin Gotze ,  Nihad Hadzic ,  John Knickerbocker ,  Edmund Sprogis

IPC: H01L23/28

CPC classification number: H01L23/576 ,  H01L23/5383 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/19103 ,  H01L2924/19107 ,  Y10T29/53039 ,  Y10T29/53052 ,  Y10T29/53178 ,  H01L2924/00

Abstract: A physically secure processing assembly is provided that includes dies mounted on a substrate so as to sandwich the electrical contacts of the dies between the dies and the substrate. The substrate is provided with substrate contacts and conductive pathways that are electrically coupled to the die contacts and extend through the substrate. Electrical conductors surround the conductive pathways. A monitoring circuit detects a break in continuity of one or more of the electrical conductors, and preferably renders the assembly inoperable. Preferably, an epoxy encapsulation is provided to prevent probing tools from being able to reach the die or substrate contacts.

Abstract translation: 提供了一种物理上安全的处理组件，其包括安装在基板上的模具，以便将模具的电触点夹在模具和基板之间。 衬底设置有电连接到管芯触点并延伸穿过衬底的衬底触点和导电路径。 电导体围绕导电路径。 监控电路检测一个或多个电导体的连续性的断裂，并且优选地使组件不可操作。 优选地，提供环氧树脂封装以防止探测工具能够到达管芯或衬底接触。

公开(公告)号：US20070084629A1

公开(公告)日：2007-04-19

申请号：US11538823

申请日：2006-10-05

Applicant: William Bernier ,  Marie Cole ,  Mukta Farooq ,  John Knickerbocker ,  Tasha Lopez ,  Roger Quon ,  David Welsh

Inventor： William Bernier ,  Marie Cole ,  Mukta Farooq ,  John Knickerbocker ,  Tasha Lopez ,  Roger Quon ,  David Welsh

IPC: H05K1/16

CPC classification number: H05K3/321 ,  H01L24/05 ,  H01L24/12 ,  H01L24/16 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13464 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H05K2201/0212 ,  H05K2201/0248 ,  H05K2201/0373 ,  H05K2201/1025 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/00015 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.

Abstract translation: 公开了用于将集成电路器件连接到器件载体的层压（或非层叠）导电互连，其中导电互连包括交替的金属层和聚合物层。 此外，聚合物可以包括枝晶，来自载体或器件的金属突起，和/或聚合物外部的胶束刷。 聚合物层包括金属颗粒，并且交替的金属层和聚合物层形成立方体结构或圆柱形结构。

公开(公告)号：US20060255442A1

公开(公告)日：2006-11-16

申请号：US11125499

申请日：2005-05-10

Applicant: Michael Gaynes ,  Kathleen Hinge ,  John Knickerbocker

Inventor： Michael Gaynes ,  Kathleen Hinge ,  John Knickerbocker

IPC: H01L23/02

CPC classification number: H05K1/0271 ,  H01L23/562 ,  H01L2224/16 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K1/181 ,  H05K3/0058 ,  H05K2201/068 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/2009 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Apparatus and methods are provided for constructing balanced semiconductor chip package structures that minimize bowing, in-plane strain and/or other thermally induced mechanical strains that may arise during thermal cycling, to thus prevent structural damage to chip package structures.

公开(公告)号：US08679280B2

公开(公告)日：2014-03-25

申请号：US12788839

申请日：2010-05-27

Applicant: Bing Dang ,  Matthew Farinelli ,  John Knickerbocker ,  Aparna Prabhakar ,  Robert E. Trzcinski ,  Cornelia K. Tsang

Inventor： Bing Dang ,  Matthew Farinelli ,  John Knickerbocker ,  Aparna Prabhakar ,  Robert E. Trzcinski ,  Cornelia K. Tsang

IPC: B32B38/10

CPC classification number: H01L21/6835 ,  B23K26/0622 ,  B23K26/0823 ,  B23K26/361 ,  B23K26/57 ,  B23K2101/40 ,  B23K2103/42 ,  B23K2103/50 ,  C09J5/00 ,  C09J2203/326 ,  C09J2205/302 ,  C09J2400/22 ,  H01L2221/68381 ,  Y10T156/1158 ,  Y10T156/1917

Abstract: A method for releasing a handler from a wafer, the wafer comprising an integrated circuit (IC), includes attaching the handler to the wafer using an adhesive comprising a thermoset polymer, the handler comprising a material that is transparent in a wavelength range of about 193 nanometers (nm) to about 400 nm; ablating the adhesive through the handler using a laser, wherein a wavelength of the laser is selected based on the transparency of the handler material; and separating the handler from the wafer.

Abstract translation: 一种用于从晶片释放处理器的方法，所述晶片包括集成电路（IC），包括使用包含热固性聚合物的粘合剂将所述处理器附接到所述晶片，所述处理器包括在约193的波长范围内是透明的材料 纳米（nm）至约400nm; 使用激光器通过处理器烧蚀粘合剂，其中基于处理材料的透明度选择激光的波长; 并将处理器与晶片分离。

公开(公告)号：US08419895B2

公开(公告)日：2013-04-16

申请号：US12788843

申请日：2010-05-27

Applicant: Bing Dang ,  John Knickerbocker ,  Aparna Prabhakar ,  Peter Sorce ,  Robert E. Trzcinski ,  Cornelia K. Tsang

Inventor： Bing Dang ,  John Knickerbocker ,  Aparna Prabhakar ,  Peter Sorce ,  Robert E. Trzcinski ,  Cornelia K. Tsang

IPC: B32B38/10

CPC classification number: H01L21/6835 ,  B23K26/361 ,  H01L2221/68381 ,  Y10T156/1111 ,  Y10T156/1158 ,  Y10T156/1917

Abstract: A method for releasing a handler from a wafer, the wafer comprising an integrated circuit (IC) includes attaching the handler to the wafer using an adhesive comprising a polymer; performing edge processing to remove an excess portion of the adhesive from an edge of the handler and wafer; ablating the adhesive through the handler using a laser, wherein a wavelength of the laser is selected based on the transparency of the handler material; and separating the handler from the wafer. A system for releasing a handler from a wafer, the wafer comprising an IC includes a handler attached to a wafer using an adhesive comprising a polymer; an edge processing module, the edge processing module configured to remove an excess portion of the adhesive from the edge of the handler and wafer; and a laser, the laser configured to ablate the adhesive through the handler.

Abstract translation: 一种用于从晶片释放处理器的方法，包括集成电路（IC）的晶片包括使用包含聚合物的粘合剂将处理器附接到晶片; 执行边缘处理以从处理器和晶片的边缘去除多余的粘合剂部分; 使用激光器通过处理器烧蚀粘合剂，其中基于处理材料的透明度选择激光的波长; 并将处理器与晶片分离。 一种用于从晶片释放处理器的系统，包括IC的晶片包括使用包含聚合物的粘合剂附接到晶片的处理器; 边缘处理模块，所述边缘处理模块被配置为从所述处理器和晶片的边缘去除所述粘合剂的多余部分; 和激光器，激光器被配置为通过处理器消融粘合剂。

公开(公告)号：US20080067628A1

公开(公告)日：2008-03-20

申请号：US11930698

申请日：2007-10-31

Applicant: Raymond Horton ,  John Knickerbocker ,  Edmund Sprogis ,  Cornelia Tsang

Inventor： Raymond Horton ,  John Knickerbocker ,  Edmund Sprogis ,  Cornelia Tsang

IPC: H01L29/00

CPC classification number: H01L23/49827 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/5382 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/15311

Abstract: Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or mote vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated

Abstract translation: 提供电子器件制造技术。 一方面，提供一种电子设备。 该电子设备包括具有一个或多个微通孔和集成在其中的多个去耦电容器的至少一个插入器结构，所述至少一个插入器结构被配置为允许选择性地去激活多个去耦电容器中的一个或多个。 在另一方面，一种制造电子器件的方法，包括至少一个具有一个或多个通孔的内插器结构和集成在其中的多个去耦电容器，其包括以下步骤。 选择性地去激活多个去耦电容器中的一个或多个

公开(公告)号：US20070252288A1

公开(公告)日：2007-11-01

申请号：US11772901

申请日：2007-07-03

Applicant: MUKTA FAROOQ ,  John Knickerbocker ,  Frank Pompeo ,  Subhash Shinde

Inventor： MUKTA FAROOQ ,  John Knickerbocker ,  Frank Pompeo ,  Subhash Shinde

IPC: H01L23/48 ,  H01L21/00

CPC classification number: H01L23/562 ,  H01L21/563 ,  H01L23/36 ,  H01L23/49827 ,  H01L24/75 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2924/01004 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/16195

Abstract: Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections having a predetermined shape. In a typical embodiment, the metallurgical through connections electrically connect an under bump metallization of the semiconductor chip to a top surface metallization of the substrate. By utilizing the interposer structure in accordance with the present invention, the problems associated with previous semiconductor module designs are alleviated.

Abstract translation: 在本发明中，半导体芯片通过插入件结构与基板（例如有机，陶瓷等）电连接。 插入器结构包括弹性体柔性材料，其包括具有预定形状的通过连接的冶金。 在典型的实施例中，冶金通孔连接将半导体芯片的凸起下金属化电连接到衬底的顶表面金属化。 通过利用根据本发明的插入器结构，可以减轻与先前的半导体模块设计相关的问题。