公开(公告)号：US20180047649A1

公开(公告)日：2018-02-15

申请号：US15655617

申请日：2017-07-20

Applicant: Renesas Electronics Corporation

Inventor： Koji BANDO ,  Akira MUTO

IPC: H01L23/053 ,  H01L23/057 ,  H01L23/00 ,  H01L25/18 ,  H01L23/50 ,  H01L25/07 ,  H01L23/495

CPC classification number: H01L23/053 ,  H01L23/057 ,  H01L23/3107 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/50 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L25/115 ,  H01L25/18 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/40101 ,  H01L2224/40137 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/73213 ,  H01L2224/73215 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2924/12036 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M7/003

Abstract: Each of first and second semiconductor devices mounted on a substrate includes an emitter terminal electrically connected with a front surface electrode of a semiconductor chip and exposed from a main surface of a sealing body located on a front surface side of the semiconductor chip. Each of the first and second semiconductor devices includes a collector terminal electrically connected with a back surface electrode of the semiconductor chip and exposed from the main surface of the sealing body located on a back surface side of the semiconductor chip. The collector terminal of the first semiconductor device is electrically connected with the emitter terminal of the second semiconductor device via a conductor pattern formed on an upper surface of the substrate.

公开(公告)号：US20160148859A1

公开(公告)日：2016-05-26

申请号：US14862102

申请日：2015-09-22

Applicant: Renesas Electronics Corporation

Inventor： Akira MUTO ,  Koji BANDO ,  Yukihiro SATO ,  Kazuhiro MITAMURA

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49575 ,  B60L3/003 ,  B60L11/1803 ,  B60L15/007 ,  B60L2220/12 ,  B60L2240/525 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49565 ,  H01L23/544 ,  H01L23/564 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/29116 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40139 ,  H01L2224/40245 ,  H01L2224/40998 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/77704 ,  H01L2224/78704 ,  H01L2224/83192 ,  H01L2224/83447 ,  H01L2224/838 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/84136 ,  H01L2224/84138 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/8485 ,  H01L2224/84862 ,  H01L2224/8585 ,  H01L2224/92147 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  Y02T10/645 ,  Y02T10/7005 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/05559 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: On the assumption that a pair of hanging parts is provided in a lead frame and a clip includes a main body part and a pair of extension parts, the pair of the extension parts is mounted and supported on the pair of the hanging parts. Accordingly, the clip is mounted on a lead (one point) and the pair of the hanging parts (two points), and the clip is supported by the three points.

Abstract translation: 假设在引线框架中设置一对悬挂部件，并且夹子包括主体部分和一对延伸部分，所述一对延伸部分被安装并支撑在所述一对悬挂部分上。 因此，夹子安装在一个引线（一点）上，一对悬挂部分（两点）和夹子被三个点支撑。

公开(公告)号：US20170103940A1

公开(公告)日：2017-04-13

申请号：US15385637

申请日：2016-12-20

Applicant: Renesas Electronics Corporation

Inventor： Akira MUTO ,  Koji BANDO ,  Yukihiro SATO ,  Kazuhiro MITAMURA

IPC: H01L23/495 ,  H01L23/544 ,  H01L23/31

CPC classification number: H01L23/49575 ,  B60L3/003 ,  B60L11/1803 ,  B60L15/007 ,  B60L2220/12 ,  B60L2240/525 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49565 ,  H01L23/544 ,  H01L23/564 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/29116 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40139 ,  H01L2224/40245 ,  H01L2224/40998 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/77704 ,  H01L2224/78704 ,  H01L2224/83192 ,  H01L2224/83447 ,  H01L2224/838 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/84136 ,  H01L2224/84138 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/8485 ,  H01L2224/84862 ,  H01L2224/8585 ,  H01L2224/92147 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  Y02T10/645 ,  Y02T10/7005 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/05559 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: On the assumption that a pair of hanging parts is provided in a lead frame and a clip includes a main body part and a pair of extension parts, the pair of the extension parts is mounted and supported on the pair of the hanging parts. Accordingly, the clip is mounted on a lead (one point) and the pair of the hanging parts (two points), and the clip is supported by the three points.

公开(公告)号：US20180331002A1

公开(公告)日：2018-11-15

申请号：US16033054

申请日：2018-07-11

Applicant: Renesas Electronics Corporation

Inventor： Koji BANDO ,  Akira MUTO

IPC: H01L23/053 ,  H01L23/057 ,  H01L25/18 ,  H01L23/433 ,  H01L23/495 ,  H01L23/50 ,  H01L23/00 ,  H01L25/07 ,  H01L25/11 ,  H02M7/00 ,  H01L23/373 ,  H01L23/31 ,  H01L29/739 ,  H01L29/78 ,  H01L29/861

CPC classification number: H01L23/053 ,  H01L23/057 ,  H01L23/3107 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/50 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L25/115 ,  H01L25/18 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/40101 ,  H01L2224/40137 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/73213 ,  H01L2224/73215 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2924/12036 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M7/003

Abstract: Each of first and second semiconductor devices mounted on a substrate includes an emitter terminal electrically connected with a front surface electrode of a semiconductor chip and exposed from a main surface of a sealing body located on a front surface side of the semiconductor chip. Each of the first and second semiconductor devices includes a collector terminal electrically connected with a back surface electrode of the semiconductor chip and exposed from the main surface of the sealing body located on a back surface side of the semiconductor chip. The collector terminal of the first semiconductor device is electrically connected with the emitter terminal of the second semiconductor device via a conductor pattern formed on an upper surface of the substrate.

公开(公告)号：US20170229428A1

公开(公告)日：2017-08-10

申请号：US15501750

申请日：2014-08-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira MUTO ,  Norio KIDO

IPC: H01L25/07 ,  H01L23/00 ,  H02P27/06 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L25/072 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/498 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L25/07 ,  H01L25/18 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/181 ,  H02P25/092 ,  H02P27/06 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

Abstract: For example, a semiconductor device capable of achieving a high performance applicable to an SR motor is provided. The semiconductor device includes a chip mounting portion TAB1 on which a semiconductor chip CHP1 having an IGBT is mounted, and a chip mounting portion TAB2 on which a semiconductor chip CHP2 having a diode is formed. The semiconductor device also includes a lead LD1A electrically connected to an emitter electrode pad EP of the semiconductor chip CHP1 via a clip CLP1, and a lead LD1B electrically connected to an anode electrode pad ADP of the semiconductor chip CHP2 via a clip CLP2. At this time, the chip mounting portion TAB1 is separated electrically from the chip mounting portion TAB2, and the clip CLP1 is separated electrically from the clip CLP2.

公开(公告)号：US20180122727A1

公开(公告)日：2018-05-03

申请号：US15858493

申请日：2017-12-29

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yukihiro SATO ,  Akira MUTO ,  Ryo KANDA ,  Takamitsu KANAZAWA

IPC: H01L23/495 ,  H01L29/739 ,  H01L23/31 ,  H01L25/075 ,  H01L27/06 ,  H02P27/06

CPC classification number: H01L23/49562 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49541 ,  H01L23/49575 ,  H01L25/0753 ,  H01L27/0664 ,  H01L29/7397 ,  H01L2224/0603 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/4903 ,  H01L2224/49111 ,  H02P27/06

Abstract: To improve the reliability of a semiconductor device. A chip mounting portion TAB5 is arranged to be shifted to the +x direction side. Further, a gate electrode pad of a semiconductor chip CHP1 (LV) and a pad of a semiconductor chip CHP3 are electrically coupled by a wire W1a and a wire W1b through a relay lead RL1. Likewise, a gate electrode pad of a semiconductor chip CHP1 (LW) and the pad of the semiconductor chip CHP3 are electrically coupled by a wire W1c and a wire W1d through a relay lead RL2. At this time, the structures of parts of the relay leads RL1 and RL2, which are exposed from a sealing body MR are different from the structures of respective parts exposed from the sealing body MR, of a plurality of leads LD1 and LD2 which function as external terminals.

公开(公告)号：US20170033035A1

公开(公告)日：2017-02-02

申请号：US15174568

申请日：2016-06-06

Applicant: Renesas Electronics Corporation

Inventor： Yukihiro SATO ,  Akira MUTO ,  Ryo KANDA ,  Takamitsu KANAZAWA

IPC: H01L23/495 ,  H01L29/739 ,  H01L27/06 ,  H01L23/31

CPC classification number: H01L23/49562 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49541 ,  H01L23/49575 ,  H01L25/0753 ,  H01L27/0664 ,  H01L29/7397 ,  H01L2224/0603 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/4903 ,  H01L2224/49111 ,  H02P27/06

Abstract: To improve the reliability of a semiconductor device. A chip mounting portion TAB5 is arranged to be shifted to the +x direction side. Further, a gate electrode pad of a semiconductor chip CHP1 (LV) and a pad of a semiconductor chip CHP3 are electrically coupled by a wire W1a and a wire W1b through a relay lead RL1. Likewise, a gate electrode pad of a semiconductor chip CHP1 (LW) and the pad of the semiconductor chip CHP3 are electrically coupled by a wire W1c and a wire W1d through a relay lead RL2. At this time, the structures of parts of the relay leads RL1 and RL2, which are exposed from a sealing body MR are different from the structures of respective parts exposed from the sealing body MR, of a plurality of leads LD1 and LD2 which function as external terminals.

Abstract translation: 提高半导体器件的可靠性。 芯片安装部TAB5布置成向+ x方向侧移动。 此外，半导体芯片CHP1（LV）的栅电极焊盘和半导体芯片CHP3的焊盘通过导线W1a和导线W1b通过继电器引线RL1电耦合。 同样地，半导体芯片CHP1（LW）的栅电极焊盘和半导体芯片CHP3的焊盘通过引线W1c和引线W1d通过继电器引线RL2电耦合。 此时，从密封体MR露出的继电器引线RL1，RL2的部分的结构与作为密封体MR的多个引线LD1，LD2的密封体MR露出的各部分的结构不同 外部端子。

公开(公告)号：US20150060940A1

公开(公告)日：2015-03-05

申请号：US14472814

申请日：2014-08-29

Applicant: Renesas Electronics Corporation

Inventor： Akira MUTO ,  Takafumi FURUKAWA

IPC: H01L25/16 ,  H01L29/739 ,  H01L29/861 ,  H01L27/06

CPC classification number: H01L25/072 ,  H01L23/3114 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/115 ,  H01L25/162 ,  H01L25/165 ,  H01L25/18 ,  H01L27/0635 ,  H01L29/739 ,  H01L29/7393 ,  H01L29/861 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/29101 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H02M7/003 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/013 ,  H01L2924/01014 ,  H01L2924/00013 ,  H01L2924/0665

Abstract: An improvement is achieved in the performance of an electronic device. A first semiconductor device and a second semiconductor device are mounted over the upper surface of a wiring board such that, e.g., in plan view, the orientation of the second semiconductor device intersects the orientation of the first semiconductor device. That is, the first semiconductor device is mounted over the upper surface of the wiring board such that a first emitter terminal and a first signal terminal are arranged along an x-direction in which the pair of shorter sides of the wiring board extend. On the other hand, the second semiconductor device is mounted over the upper surface of the wiring board such that a second emitter terminal and a second signal terminal are arranged along a y-direction in which the pair of longer sides of the wiring board extend.

Abstract translation: 在电子设备的性能方面取得了进步。 第一半导体器件和第二半导体器件安装在布线板的上表面上，使得例如在平面图中，第二半导体器件的取向与第一半导体器件的取向相交。 也就是说，第一半导体器件安装在布线板的上表面上，使得第一发射极端子和第一信号端子沿着布线板的该对短边延伸的x方向排列。 另一方面，第二半导体器件安装在布线板的上表面上，使得第二发射极端子和第二信号端子沿着布线板的该对长边延伸的y方向排列。