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公开(公告)号：US09093332B2
公开(公告)日：2015-07-28
申请号：US13023011
申请日：2011-02-08
申请人： Tin-Hao Kuo , Yu-Feng Chen , Chen-Shien Chen , Chen-Hua Yu , Sheng-Yu Wu , Chita Chuang
发明人： Tin-Hao Kuo , Yu-Feng Chen , Chen-Shien Chen , Chen-Hua Yu , Sheng-Yu Wu , Chita Chuang
CPC分类号： H01L24/13 , H01L23/3192 , H01L24/05 , H01L24/14 , H01L2224/0401 , H01L2224/05555 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/05687 , H01L2224/1145 , H01L2224/11452 , H01L2224/13012 , H01L2224/13014 , H01L2224/13022 , H01L2224/13027 , H01L2224/13083 , H01L2224/131 , H01L2224/13111 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/14141 , H01L2224/81192 , H01L2924/00013 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/0105 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00012 , H01L2924/00
摘要： An elongated bump structure for semiconductor devices is provided. An uppermost protective layer has an opening formed therethrough. A pillar is formed within the opening and extending over at least a portion of the uppermost protective layer. The portion extending over the uppermost protective layer exhibits a generally elongated shape. In an embodiment, the position of the opening relative to the portion of the bump structure extending over the uppermost protective layer is such that a ratio of a distance from an edge of the opening to an edge of the bump is greater than or equal to about 0.2. In another embodiment, the position of the opening is offset relative to center of the bump.
摘要翻译： 提供了用于半导体器件的细长凸块结构。 最上面的保护层具有通过其形成的开口。 在该开口内形成一个支柱，并延伸至最上层保护层的至少一部分。 在最上保护层上延伸的部分呈现大致细长的形状。 在一个实施例中，开口相对于在最上保护层上延伸的凸起结构的部分的位置使得从开口的边缘到凸起的边缘的距离的比例大于或等于约 0.2。 在另一个实施例中，开口的位置相对于凸块的中心偏移。
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公开(公告)号：US20120199966A1
公开(公告)日：2012-08-09
申请号：US13023011
申请日：2011-02-08
申请人： Tin-Hao Kuo , Yu-Feng Chen , Chen-Shien Chen , Chen-Hua Yu , Sheng-Yu Wu , Chita Chuang
发明人： Tin-Hao Kuo , Yu-Feng Chen , Chen-Shien Chen , Chen-Hua Yu , Sheng-Yu Wu , Chita Chuang
CPC分类号： H01L24/13 , H01L23/3192 , H01L24/05 , H01L24/14 , H01L2224/0401 , H01L2224/05555 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/05687 , H01L2224/1145 , H01L2224/11452 , H01L2224/13012 , H01L2224/13014 , H01L2224/13022 , H01L2224/13027 , H01L2224/13083 , H01L2224/131 , H01L2224/13111 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/14141 , H01L2224/81192 , H01L2924/00013 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/0105 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00012 , H01L2924/00
摘要： An elongated bump structure for semiconductor devices is provided. An uppermost protective layer has an opening formed therethrough. A pillar is formed within the opening and extending over at least a portion of the uppermost protective layer. The portion extending over the uppermost protective layer exhibits a generally elongated shape. In an embodiment, the position of the opening relative to the portion of the bump structure extending over the uppermost protective layer is such that a ratio of a distance from an edge of the opening to an edge of the bump is greater than or equal to about 0.2. In another embodiment, the position of the opening is offset relative to center of the bump.
摘要翻译： 提供了用于半导体器件的细长凸块结构。 最上面的保护层具有通过其形成的开口。 在该开口内形成一个支柱，并延伸至最上层保护层的至少一部分。 在最上保护层上延伸的部分呈现大致细长的形状。 在一个实施例中，开口相对于在最上保护层上延伸的凸起结构的部分的位置使得从开口的边缘到凸起的边缘的距离的比例大于或等于约 0.2。 在另一个实施例中，开口的位置相对于凸块的中心偏移。
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公开(公告)号：US08912649B2
公开(公告)日：2014-12-16
申请号：US13211438
申请日：2011-08-17
申请人： Sheng-Yu Wu , Tin-Hao Kuo , Chita Chuang , Chen-Shien Chen
发明人： Sheng-Yu Wu , Tin-Hao Kuo , Chita Chuang , Chen-Shien Chen
IPC分类号： H01L23/498 , H01L21/50 , H01L21/60 , H01L23/00 , H01L23/31 , H01L23/532 , H01L23/58 , H01L23/522 , H01L21/56
CPC分类号： H01L24/17 , H01L21/563 , H01L23/3171 , H01L23/522 , H01L23/53238 , H01L23/562 , H01L23/585 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L2021/60255 , H01L2224/0345 , H01L2224/03912 , H01L2224/0401 , H01L2224/05005 , H01L2224/05008 , H01L2224/05022 , H01L2224/05027 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05541 , H01L2224/05569 , H01L2224/05572 , H01L2224/05582 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05671 , H01L2224/05684 , H01L2224/06102 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/13022 , H01L2224/13024 , H01L2224/13082 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/1403 , H01L2224/14051 , H01L2224/141 , H01L2224/14152 , H01L2224/14179 , H01L2224/16237 , H01L2224/16238 , H01L2224/17104 , H01L2224/17517 , H01L2224/73204 , H01L2224/81007 , H01L2224/81101 , H01L2224/81191 , H01L2224/81815 , H01L2224/83104 , H01L2924/01029 , H01L2924/01047 , H01L2924/04941 , H01L2924/04953 , H01L2924/15787 , H01L2924/15788 , H01L2924/35 , H01L2924/3511 , H01L2924/00014 , H01L2924/014 , H01L2924/206 , H01L2924/00
摘要： A device includes a metal pad over a substrate. A passivation layer includes a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A dummy bump is over the polymer layer, wherein the dummy bump is electrically insulated from conductive features underlying the polymer layer.
摘要翻译： 一种器件包括在衬底上的金属焊盘。 钝化层包括在金属焊盘上的部分。 后钝化互连（PPI）电耦合到金属焊盘，其中PPI包括在金属焊盘和钝化层上的部分。 聚合物层在PPI之上。 虚设凸块在聚合物层之上，其中虚设凸块与聚合物层下方的导电特征电绝缘。
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公开(公告)号：US20130043583A1
公开(公告)日：2013-02-21
申请号：US13211438
申请日：2011-08-17
申请人： Sheng-Yu Wu , Tin-Hao Kuo , Chita Chuang , Chen-Shien Chen
发明人： Sheng-Yu Wu , Tin-Hao Kuo , Chita Chuang , Chen-Shien Chen
IPC分类号： H01L23/498 , H01L21/50 , H01L21/60
CPC分类号： H01L24/17 , H01L21/563 , H01L23/3171 , H01L23/522 , H01L23/53238 , H01L23/562 , H01L23/585 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L2021/60255 , H01L2224/0345 , H01L2224/03912 , H01L2224/0401 , H01L2224/05005 , H01L2224/05008 , H01L2224/05022 , H01L2224/05027 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05541 , H01L2224/05569 , H01L2224/05572 , H01L2224/05582 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05671 , H01L2224/05684 , H01L2224/06102 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/13022 , H01L2224/13024 , H01L2224/13082 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/1403 , H01L2224/14051 , H01L2224/141 , H01L2224/14152 , H01L2224/14179 , H01L2224/16237 , H01L2224/16238 , H01L2224/17104 , H01L2224/17517 , H01L2224/73204 , H01L2224/81007 , H01L2224/81101 , H01L2224/81191 , H01L2224/81815 , H01L2224/83104 , H01L2924/01029 , H01L2924/01047 , H01L2924/04941 , H01L2924/04953 , H01L2924/15787 , H01L2924/15788 , H01L2924/35 , H01L2924/3511 , H01L2924/00014 , H01L2924/014 , H01L2924/206 , H01L2924/00
摘要： A device includes a metal pad over a substrate. A passivation layer includes a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A dummy bump is over the polymer layer, wherein the dummy bump is electrically insulated from conductive features underlying the polymer layer.
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公开(公告)号：US08623756B2
公开(公告)日：2014-01-07
申请号：US13167257
申请日：2011-06-23
申请人： Chita Chuang , Sheng-Yu Wu , Tin-Hao Kuo , Pei-Chun Tsai , Ming-Da Cheng , Chen-Shien Chen
发明人： Chita Chuang , Sheng-Yu Wu , Tin-Hao Kuo , Pei-Chun Tsai , Ming-Da Cheng , Chen-Shien Chen
IPC分类号： H01L21/283
CPC分类号： H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/11002 , H01L2224/1146 , H01L2224/11849 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/13166 , H01L2224/13171 , H01L2224/13172 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/742 , H01L2224/81193 , H01L2224/81815 , H01L2224/94 , H01L2224/11 , H01L2924/00014 , H01L2924/00012 , H01L2224/81
摘要： A system and method for forming conductive connections is disclosed. An embodiment comprises forming conductive material on to contacts of a semiconductor substrate. The semiconductor substrate is then inverter such that the conductive material is beneath the semiconductor substrate, and the conductive material is reflowed to form a conductive bump. The reflow is performed using gravity in order to form a more uniform shape for the conductive bump.
摘要翻译： 公开了一种用于形成导电连接的系统和方法。 一个实施例包括在半导体衬底的触点上形成导电材料。 然后半导体衬底是反射器，使得导电材料在半导体衬底下方，并且导电材料被回流以形成导电凸块。 使用重力进行回流，以便为导电凸块形成更均匀的形状。
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公开(公告)号：US20120329264A1
公开(公告)日：2012-12-27
申请号：US13167257
申请日：2011-06-23
申请人： Chita Chuang , Sheng-Yu Wu , Tin-Hao Kuo , Pei-Chun Tsai , Ming-Da Cheng , Chen-Shien Chen
发明人： Chita Chuang , Sheng-Yu Wu , Tin-Hao Kuo , Pei-Chun Tsai , Ming-Da Cheng , Chen-Shien Chen
IPC分类号： H01L21/283
CPC分类号： H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/11002 , H01L2224/1146 , H01L2224/11849 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/13166 , H01L2224/13171 , H01L2224/13172 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/742 , H01L2224/81193 , H01L2224/81815 , H01L2224/94 , H01L2224/11 , H01L2924/00014 , H01L2924/00012 , H01L2224/81
摘要： A system and method for forming conductive connections is disclosed. An embodiment comprises forming conductive material on to contacts of a semiconductor substrate. The semiconductor substrate is then inverter such that the conductive material is beneath the semiconductor substrate, and the conductive material is reflowed to form a conductive bump. The reflow is performed using gravity in order to form a more uniform shape for the conductive bump.
摘要翻译： 公开了一种用于形成导电连接的系统和方法。 一个实施例包括在半导体衬底的触点上形成导电材料。 然后半导体衬底是反射器，使得导电材料在半导体衬底下方，并且导电材料被回流以形成导电凸块。 使用重力进行回流，以便为导电凸块形成更均匀的形状。
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公开(公告)号：US08643196B2
公开(公告)日：2014-02-04
申请号：US13426386
申请日：2012-03-21
申请人： Chen-Hua Yu , Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Sheng-Yu Wu , Yen-Liang Lin
发明人： Chen-Hua Yu , Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Sheng-Yu Wu , Yen-Liang Lin
CPC分类号： H01L23/49811 , H01L21/76885 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L2224/1145 , H01L2224/1146 , H01L2224/13005 , H01L2224/13012 , H01L2224/13014 , H01L2224/13017 , H01L2224/13082 , H01L2224/13083 , H01L2224/13147 , H01L2224/16238 , H01L2924/1306 , H01L2924/00014 , H01L2924/00012 , H01L2924/206 , H01L2924/00
摘要： The present disclosure provides an integrated circuit. The integrated circuit includes an interconnect structure formed on a substrate; a landing metal trace formed on the interconnect structure and coupled to the interconnect structure, wherein the landing metal trace includes a first width T defined in a first direction; and a metal bump post formed on and aligned with the landing metal trace, wherein the metal bump post includes a second width U defined in the first direction, and the second width U is greater than the first width T.
摘要翻译： 本发明提供集成电路。 集成电路包括形成在基板上的互连结构; 形成在所述互连结构上并联接到所述互连结构的着陆金属迹线，其中所述着陆金属迹线包括沿第一方向限定的第一宽度T; 以及形成在所述着陆金属迹线上并与所述着陆金属迹线对准的金属凸块柱，其中所述金属凸块柱包括在所述第一方向上限定的第二宽度U，并且所述第二宽度U大于所述第一宽度T.
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公开(公告)号：US20130270693A1
公开(公告)日：2013-10-17
申请号：US13445699
申请日：2012-04-12
申请人： Yu-Jen Tseng , Guan-Yu Chen , Sheng-Yu Wu , Chen-Hua Yu , Mirng-Ji Lii , Chen-Shien Chen , Tin-Hao Kuo
发明人： Yu-Jen Tseng , Guan-Yu Chen , Sheng-Yu Wu , Chen-Hua Yu , Mirng-Ji Lii , Chen-Shien Chen , Tin-Hao Kuo
IPC分类号： H01L23/498 , G06F17/50
CPC分类号： G06F17/5068 , H01L23/3192 , H01L23/49838 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0401 , H01L2224/05558 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/1132 , H01L2224/11334 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11849 , H01L2224/13012 , H01L2224/13013 , H01L2224/13014 , H01L2224/13015 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/17104 , H01L2224/81191 , H01L2224/81385 , H01L2224/81444 , H01L2224/81815 , H01L2924/00014 , H01L2924/014 , H01L2924/00012 , H01L2924/01029 , H01L2924/01074 , H01L2224/1144
摘要： A method and device for preventing the bridging of adjacent metal traces in a bump-on-trace structure. An embodiment comprises determining the coefficient of thermal expansion (CTE) and process parameters of the package components. The design parameters are then analyzed and the design parameters may be modified based on the CTE and process parameters of the package components.
摘要翻译： 一种用于防止在跟踪轨迹结构中的相邻金属迹线桥接的方法和装置。 一个实施例包括确定包装部件的热膨胀系数（CTE）和工艺参数。 然后分析设计参数，并且可以基于包装部件的CTE和工艺参数来修改设计参数。
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公开(公告)号：US09425136B2
公开(公告)日：2016-08-23
申请号：US13449078
申请日：2012-04-17
申请人： Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Chen-Hua Yu , Sheng-Yu Wu , Yao-Chun Chuang
发明人： Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Chen-Hua Yu , Sheng-Yu Wu , Yao-Chun Chuang
IPC分类号： H01L29/49 , H01L23/498 , H01L23/00
CPC分类号： H01L24/13 , H01L23/49816 , H01L24/11 , H01L24/16 , H01L2224/0361 , H01L2224/03912 , H01L2224/11462 , H01L2224/11464 , H01L2224/11472 , H01L2224/11474 , H01L2224/11903 , H01L2224/13012 , H01L2224/13014 , H01L2224/13017 , H01L2224/13025 , H01L2224/1308 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/16238 , H01L2224/81191 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/3512 , H01L2924/35121 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A pillar structure for a substrate is provided. The pillar structure may have one or more tiers, where each tier may have a conical shape or a spherical shape. In an embodiment, the pillar structure is used in a bump-on-trace (BOT) configuration. The pillar structures may have circular shape or an elongated shape in a plan view. The substrate may be coupled to another substrate. In an embodiment, the another substrate may have raised conductive traces onto which the pillar structure may be coupled.
摘要翻译： 提供了一种用于衬底的柱结构。 支柱结构可以具有一个或多个层，其中每个层可以具有圆锥形或球形。 在一个实施例中，柱结构用于跟踪跟踪（BOT）配置。 支柱结构在平面图中可以具有圆形或细长形状。 衬底可以耦合到另一衬底。 在一个实施例中，另一衬底可以具有凸起的导电迹线，柱结构可以联接到该导电迹线上。
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公开(公告)号：US20130026614A1
公开(公告)日：2013-01-31
申请号：US13426386
申请日：2012-03-21
申请人： Chen-Hua Yu , Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Sheng-Yu Wu , Yen-Liang Lin
发明人： Chen-Hua Yu , Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Sheng-Yu Wu , Yen-Liang Lin
IPC分类号： H01L23/495 , H01L21/98
CPC分类号： H01L23/49811 , H01L21/76885 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L2224/1145 , H01L2224/1146 , H01L2224/13005 , H01L2224/13012 , H01L2224/13014 , H01L2224/13017 , H01L2224/13082 , H01L2224/13083 , H01L2224/13147 , H01L2224/16238 , H01L2924/1306 , H01L2924/00014 , H01L2924/00012 , H01L2924/206 , H01L2924/00
摘要： The present disclosure provides an integrated circuit. The integrated circuit includes an interconnect structure formed on a substrate; a landing metal trace formed on the interconnect structure and coupled to the interconnect structure, wherein the landing metal trace includes a first width T defined in a first direction; and a metal bump post formed on and aligned with the landing metal trace, wherein the metal bump post includes a second width U defined in the first direction, and the second width U is greater than the first width T.
摘要翻译： 本发明提供集成电路。 集成电路包括形成在基板上的互连结构; 形成在所述互连结构上并联接到所述互连结构的着陆金属迹线，其中所述着陆金属迹线包括沿第一方向限定的第一宽度T; 以及形成在所述着陆金属迹线上并与所述着陆金属迹线对准的金属凸块柱，其中所述金属凸块柱包括在所述第一方向上限定的第二宽度U，并且所述第二宽度U大于所述第一宽度T.
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