Nondestructive readout memory utilizing ferroelectric capacitors
isolated from bitlines by buffer amplifiers
    92.
    发明授权
    Nondestructive readout memory utilizing ferroelectric capacitors isolated from bitlines by buffer amplifiers 失效
    利用由缓冲放大器与位线隔离的铁电电容器的非破坏性读出存储器

    公开(公告)号:US5966318A

    公开(公告)日:1999-10-12

    申请号:US768256

    申请日:1996-12-17

    IPC分类号: G11C11/22

    CPC分类号: G11C11/22 G11C11/223

    摘要: A memory includes a bitline data signal input (24), at least one memory unit (20), a writing circuit (128) which writes a polarization state into each memory unit (20) responsive to the bitline data signal input, and a sensing circuit (130) that senses a polarization state of each memory unit (20). Each memory unit (20) includes a ferroelectric capacitor (22) and a buffer amplifier (26) in electrical series relationship with the ferroelectric capacitor (22) and the bitline data signal input (24). The buffer amplifier (26) capacitively isolates the ferroelectric capacitor (22) from the bitline data signal input (24) so that the ferroelectric capacitor (22) may be made smaller in size than would otherwise be the case.

    摘要翻译: 存储器包括位线数据信号输入(24),至少一个存储器单元(20),写入电路(128),其响应于位线数据信号输入将偏振状态写入每个存储器单元(20),以及感测 检测每个存储器单元(20)的偏振状态的电路(130)。 每个存储单元(20)包括与强电介质电容器(22)和位线数据信号输入端(24)呈电串联关系的铁电电容器(22)和缓冲放大器(26)。 缓冲放大器(26)将铁电电容器(22)与位线数据信号输入(24)电容性地隔离,使得铁电电容器(22)的尺寸可以比其他情况更小。

    ZnO thin-film varistors and method of making the same
    98.
    发明授权
    ZnO thin-film varistors and method of making the same 失效
    ZnO薄膜变阻器及其制作方法

    公开(公告)号:US5699035A

    公开(公告)日:1997-12-16

    申请号:US408723

    申请日:1995-03-22

    摘要: A thin-film zinc oxide varistor (10) for use in integrated circuits and the like is produced by applying a polyoxyalkylated metal complex, such as a metal alkoxycarboxylate, to a substrate (12, 14, and 16) for the formation of a dried nonohmic layer (18). The method of production includes the steps of providing a substrate and a precursor solution including a polyoxyalkylated zinc complex (P22, P24), coating a portion of the substrate with the precursor solution (P26), drying the coated substrate (P32), and crystallizing the dried thin-film zinc oxide layer (P30). The resultant crystalline zinc oxide varistor layer (18) may be doped with bismuth, yttrium, praseodymium, cobalt, antimony, manganese, silicon, chromium, titanium, potassium, dysprosium, cesium, cerium, and iron to provide a non-ohmic varistor. The varistor layer (10) is annealed at a temperature ranging from about 400 to about 1000.degree. C. to provide a layer having a thickness ranging from about 50 nanometers to about 500 nanometers and an average grain size diameter less than about 200 nanometers.

    摘要翻译: 用于集成电路等的薄膜氧化锌变阻器(10)通过将诸如金属烷氧基羧酸盐的聚氧化烷基化金属络合物施加到基底(12,14和16)上来制备,以形成干燥 非欧姆层(18)。 制造方法包括以下步骤:提供包含聚氧化烷基化锌络合物(P22,P24)的基材和前体溶液,用前体溶液(P26)涂布基材的一部分,干燥涂布的基材(P32),使结晶 干燥的薄膜氧化锌层(P30)。 所得结晶氧化锌变阻器层(18)可掺杂铋,钇,镨,钴,锑,锰,硅,铬,钛,​​钾,镝,铯,铈和铁,以提供非欧姆变阻器。 压敏电阻层(10)在约400至约1000℃的温度下退火,以提供厚度范围为约50纳米至约500纳米,平均粒径直径小于约200纳米的层。