公开(公告)号：US07105380B2

公开(公告)日：2006-09-12

申请号：US10395477

申请日：2003-03-24

申请人： Walter L. Moden ,  John O. Jacobson

发明人： Walter L. Moden ,  John O. Jacobson

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： G01R1/04 ,  G01R1/0483 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/49171 ,  H01L2924/01019 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method of using adhesive tape to temporarily retain a die being temporarily held in a fixture during testing and burn-in. The method of the present invention uses a die cut piece of adhesively coated tape to hold a die in a test and burn-in fixture. Upon subsequent heating of the tape beyond the normal operating range of the adhesive coating on the tape, the die is removed from the tape, the tape is removed from the test and burn-in fixture, and the remaining adhesive, if any, is removed from the test and burn-in fixture.

公开(公告)号：US06979598B2

公开(公告)日：2005-12-27

申请号：US10799948

申请日：2004-03-12

申请人： Tongbi Jiang ,  Syed S. Ahmad ,  Walter L. Moden

发明人： Tongbi Jiang ,  Syed S. Ahmad ,  Walter L. Moden

IPC分类号： H01L21/66 ,  H01L23/495 ,  H01L21/44

CPC分类号： H01L23/49513 ,  H01L23/4951 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/73257 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01082 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： The present invention is directed to a method of attaching a leadframe to a singulated good die using a wet film adhesive applied in a predetermined pattern on the active surface of the good die, the lead finger of a leadframe, or both. By applying the adhesive only to identified good dice, time and material are saved over a process that applies adhesive to the entire wafer. By attaching the leadframe to the good die with a wet film, it is possible to remove the leadframe from the good die for rework if the good die subsequently tests unacceptable.

摘要翻译： 本发明涉及一种使用在预定图案上施加的湿膜粘合剂将引线框架附接到优质裸片，引线框架的引线指或两者的引线框架的方法。 通过将粘合剂应用于识别好的骰子，可以通过在整个晶片上施加粘合剂的过程节省时间和材料。 通过使用湿膜将引线框架连接到良好的裸片上，如果良好的芯片随后测试不可接受，则可以从良好的模具中去除引线框架以进行返工。

公开(公告)号：US06974725B2

公开(公告)日：2005-12-13

申请号：US10808713

申请日：2004-03-23

申请人： Walter L. Moden ,  Larry D. Kinsman ,  Warren M. Farnworth

发明人： Walter L. Moden ,  Larry D. Kinsman ,  Warren M. Farnworth

IPC分类号： H01L23/31 ,  H01L23/485 ,  H01L21/44

CPC分类号： H01L24/10 ,  H01L23/3107 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00013 ,  H01L2924/013

摘要： A method for forming an electrical contact for a semiconductor device comprises the steps of providing a semiconductor wafer section having a major surface with a plurality of conductive pads thereon and electrically coupling each pad with an elongated electrical interconnect. Next, each electrical interconnect is encased in a dielectric and the dielectric is sectioned to expose a portion of each interconnect. An inventive structure which can be formed by the inventive method is also described.

摘要翻译： 一种用于形成用于半导体器件的电接触的方法包括以下步骤：提供具有主表面的半导体晶片部分，其上具有多个导电焊盘，并使每个焊盘与细长的电互连电连接。 接下来，每个电互连被封装在电介质中，并且电介质被分段以暴露每个互连的一部分。 还描述了可以通过本发明方法形成的本发明的结构。

公开(公告)号：US06825547B2

公开(公告)日：2004-11-30

申请号：US10137766

申请日：2002-05-02

申请人： Warren M. Farnworth ,  Larry D. Kinsman ,  Walter L. Moden

发明人： Warren M. Farnworth ,  Larry D. Kinsman ,  Walter L. Moden

IPC分类号： H01L2348

CPC分类号： H01L24/11 ,  H01L23/485 ,  H01L24/02 ,  H01L24/45 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/3011 ,  H01L2224/48 ,  H01L2924/00

摘要： A vertically mountable semiconductor device including at least one bond pad disposed on an edge thereof. The bond pad includes a conductive bump disposed thereon. The semiconductor device may also include a protective overcoat layer. The present invention also includes a method of fabricating the semiconductor device, including forming disconnected notches in a semiconductor wafer, redirecting circuit traces into each of the notches, and singulating the semiconductor wafer along the notches to form bond pads on the edges of the resultant semiconductor devices. A method of attaching the semiconductor device to a carrier substrate includes orienting the semiconductor device such that the bond pad is aligned with a corresponding terminal of the carrier substrate and establishing an electrical connection between the bond pad and the terminal. Preferably, an electrically conductive material is disposed between the bond pad and the terminal to establish an electrically conductive bond between the semiconductor device and the carrier substrate.

摘要翻译： 一种垂直安装的半导体器件，包括设置在其边缘上的至少一个接合焊盘。 接合焊盘包括设置在其上的导电凸块。 半导体器件还可以包括保护外涂层。 本发明还包括一种制造半导体器件的方法，包括在半导体晶片中形成断开的切口，将电路迹线重定向到每个凹口中，以及沿着凹口划分半导体晶片，以在所得半导体的边缘上形成接合焊盘 设备。 将半导体器件附接到载体衬底的方法包括使半导体器件定向，使得接合焊盘与载体衬底的相应端子对准并且在接合焊盘和端子之间建立电连接。 优选地，导电材料设置在接合焊盘和端子之间，以在半导体器件和载体衬底之间建立导电接合。

公开(公告)号：US06740545B2

公开(公告)日：2004-05-25

申请号：US10309643

申请日：2002-12-03

申请人： Jerrold L. King ,  J. Mike Brooks ,  Walter L. Moden

发明人： Jerrold L. King ,  J. Mike Brooks ,  Walter L. Moden

IPC分类号： H01L2144

CPC分类号： H01L23/3142 ,  H01L23/4951 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10S438/926 ,  Y10S438/928 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A semiconductor die includes a metal layer deposited thereon for enhancing adhesion between the die and a mold compound package. The metal layer is substantially oxide free. The die is coated with a layer or layers of copper (Cu) and/or palladium (Pd) by electroplating or electroless coating techniques. The metal layer provides a uniform wetting surface for better adhesion of the die with the mold compound packaging during encapsulation. The increased adhesion reduces the delamination potential of the die from the package.

摘要翻译： 半导体管芯包括沉积在其上的金属层，用于增强管芯和模具复合封装之间的附着力。 金属层基本上不含氧化物。 通过电镀或无电涂覆技术将模具涂覆有一层或多层铜（Cu）和/或钯（Pd）。 金属层提供均匀的润湿表面，用于在包封期间模具与模具复合包装的更好的附着。 增加的粘附力降低了模具从包装中的分层势。

公开(公告)号：US06738263B2

公开(公告)日：2004-05-18

申请号：US10222243

申请日：2002-08-16

申请人： David J. Corisis ,  Jerry M. Brooks ,  Walter L. Moden

发明人： David J. Corisis ,  Jerry M. Brooks ,  Walter L. Moden

IPC分类号： H05K111

CPC分类号： H01L24/06 ,  H01L23/3107 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A stackable FBGA package is configured such that conductive elements are placed along the outside perimeter of an integrated circuit (IC) device mounted to the FBGA. The conductive elements also are of sufficient size so that they extend beyond the bottom or top surface of the IC device, including the wiring interconnect and encapsulate material, as the conductive elements make contact with the FBGA positioned below or above to form a stack. The IC device, such as a memory chip, is mounted upon a first surface of a printed circuit board substrate forming part of the FBGA. Lead wires are used to attach the IC device to the printed board substrate and encapsulant is used to contain the IC device and wires within and below the matrix and profile of the conductive elements.

摘要翻译： 可堆叠的FBGA封装被构造成使得导电元件沿着安装到FBGA的集成电路（IC）器件的外周放置。 导电元件也具有足够的尺寸，使得它们延伸超过IC器件的底表面或顶表面，包括布线互连和封装材料，因为导电元件与位于或之下的FBGA接触以形成叠层。 诸如存储器芯片的IC器件安装在形成FBGA的一部分的印刷电路板基板的第一表面上。 引线用于将IC器件连接到印刷电路板基板，并且密封剂用于将IC器件和导线元件的基体内部和外部的电线包含在IC器件中。

公开(公告)号：US06670550B2

公开(公告)日：2003-12-30

申请号：US10379218

申请日：2003-03-04

申请人： Walter L. Moden

发明人： Walter L. Moden

IPC分类号： H01L2328

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2924/00012

摘要： A LOC die assembly is disclosed including a die dielectrically adhered to the underside of a lead frame. An underfill material is introduced between each lead finger and semiconductor die, extending from the bonding location of the die and the edge of the die, in order to prevent filler particles from lodging between the leads and the active surface of the die during transfer molding of a plastic encapsulant. The seal created by the underfill material reduces point stresses on the active surface of the die usually caused by the filler particles. The decreased flexure in the leads further enhances the locking of the leads in position with respect to the die.

公开(公告)号：US06525943B2

公开(公告)日：2003-02-25

申请号：US09942247

申请日：2001-08-29

申请人： Walter L. Moden ,  David J. Corisis ,  Larry D. Kinsman ,  Leonard E. Mess

发明人： Walter L. Moden ,  David J. Corisis ,  Larry D. Kinsman ,  Leonard E. Mess

IPC分类号： H05K720

CPC分类号： H01L23/3675 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2225/1094 ,  H01L2924/0002 ,  Y10T428/24298 ,  H01L2924/00

摘要： An apparatus for providing heat sinks or heat spreaders for stacked semiconductor devices. Alignment apparatus may be included for the alignment of the stacked semiconductor devices. An enclosure may be used as the heat sink or heat spreader.

公开(公告)号：US06512302B2

公开(公告)日：2003-01-28

申请号：US09941317

申请日：2001-08-28

申请人： Leonard E. Mess ,  David J. Corisis ,  Walter L. Moden ,  Larry D. Kinsman

发明人： Leonard E. Mess ,  David J. Corisis ,  Walter L. Moden ,  Larry D. Kinsman

IPC分类号： H01L2348

CPC分类号： H01L22/26 ,  H01L23/055 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2224/45099

摘要： Apparatus and methods of packaging and testing die. In one embodiment, a stacked die package includes a packaging substrate having a first surface with a recess disposed therein and a plurality of conductive leads coupled thereto, a first die attached to the packaging substrate within the recess and having a plurality of first bond pads electrically coupled to at least some of the conductive leads, and a second die attached to the first die and having a plurality of second bond pads that are electrically coupled to at least some of the conductive leads. When the stacked die package is engaged with, for example, a circuit board, the first surface of the packaging substrate is proximate the circuit board so that the packaging substrate at least partially encloses and protects the first and second die. The properties and dimensions of the packaging substrate are tailored to optimize the operational environment of the die, including improving thermal dissipation and enhancing performance of the die. In an alternate embodiment, the packaging substrate comprises an electrically conductive substrate and an electrically insulative material is formed between the conductive leads and the packaging substrate. In another embodiment, the first bond pads are electrically coupled to the conductive leads by wire-bonding. Alternately, the first bond pads are in direct contact with the conductive leads in a flip chip arrangement. In another embodiment, the die is sealed within an encapsulating layer to protect the first and second die.

公开(公告)号：US06486546B2

公开(公告)日：2002-11-26

申请号：US10068081

申请日：2002-02-06

申请人： Walter L. Moden ,  Jerrold L. King ,  Jerry M. Brooks

发明人： Walter L. Moden ,  Jerrold L. King ,  Jerry M. Brooks

IPC分类号： H01L2302

CPC分类号： H05K1/181 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/145 ,  H05K1/147 ,  H05K2201/049 ,  H05K2201/10515 ,  H05K2201/10689 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49169 ,  H01L2924/00

摘要： A low profile multi-IC chip package for high speed application comprises a connector for electrically connecting the equivalent outer leads of a set of stacked primary semiconductor packages. In one embodiment, the connector comprises a two-part sheet of flexible insulative polymer with buses formed on one side. In another embodiment, the connector comprises multiple buses formed from conductive polymer. In further embodiments, the primary packages are stacked within a cage and have their outer leads in unattached contact with buses within the cage or, alternatively, are directly fixed to leads or pads on the host circuit board.