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公开(公告)号:US11948992B2
公开(公告)日:2024-04-02
申请号:US17158918
申请日:2021-01-26
Applicant: Micron Technology, Inc.
Inventor: Michael A. Lindemann , Collin Howder , Yoshiaki Fukuzumi , Richard J. Hill
IPC: H01L29/45 , H01L29/417 , H01L29/792 , H01L21/28 , H10B43/27 , H10B43/35
CPC classification number: H01L29/458 , H01L29/40117 , H01L29/41725 , H01L29/792 , H10B43/27 , H10B43/35
Abstract: Electronic devices comprising a doped dielectric material adjacent to a source contact, tiers of alternating conductive materials and dielectric materials adjacent to the doped dielectric material, and pillars extending through the tiers, the doped dielectric material, and the source contact and into the source stack. Related methods and electronic systems are also disclosed.
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公开(公告)号:US11889680B2
公开(公告)日:2024-01-30
申请号:US17376077
申请日:2021-07-14
Applicant: Micron Technology, Inc.
Inventor: David K. Hwang , Richard J. Hill , Gurtej S. Sandhu
IPC: H10B12/00 , H01L29/78 , H01L29/423 , H01L29/66 , H01L29/06
CPC classification number: H10B12/315 , H01L29/0684 , H01L29/42356 , H01L29/66666 , H01L29/7827 , H10B12/0335 , H10B12/482 , H10B12/488
Abstract: Some embodiments include an integrated assembly having first conductive structures extending along a first direction. Spaced-apart upwardly-opening container-shapes are over the first conductive structures. Each of the container-shapes has a first sidewall region, a second sidewall region, and a bottom region extending from the first sidewall region to the second sidewall region. Each of the first and second sidewall regions includes a lower source/drain region, an upper source/drain region, and a channel region between the upper and lower source/drain regions. The lower source/drain regions are electrically coupled with the first conductive structures. Second conductive structures extend along a second direction which crosses the first direction. The second conductive structures have gate regions operatively adjacent the channel regions. Storage elements are electrically coupled with the upper source/drain regions. Some embodiments include methods of forming integrated assemblies.
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103.
公开(公告)号:US20230345722A1
公开(公告)日:2023-10-26
申请号:US17726968
申请日:2022-04-22
Applicant: Micron Technology, Inc.
Inventor: Byeung Chul Kim , Joshua Wolanyk , Richard J. Hill , Damir Fazil
IPC: H01L27/11582 , H01L23/535 , H01L27/11556 , H01L27/11529 , H01L27/11573
CPC classification number: H01L27/11582 , H01L23/535 , H01L27/11556 , H01L27/11529 , H01L27/11573
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the methods includes forming levels of materials one over another; forming a first opening and a second opening in the levels of materials; forming at least one dielectric material in the first and second openings; forming tiers of materials over the levels of materials and over the dielectric material in the first and second openings; forming a first pillar of a memory cell string, the first pillar extending through the tiers of materials and extending partially into a location of the first opening; and forming a second pillar of a contact structure, the second pillar extending through the tiers of materials and through a location of the second opening.
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公开(公告)号:US11800717B2
公开(公告)日:2023-10-24
申请号:US17661659
申请日:2022-05-02
Applicant: Micron Technology, Inc.
Inventor: Matthew J. King , David A. Daycock , Yoshiaki Fukuzumi , Albert Fayrushin , Richard J. Hill , Chandra S. Tiwari , Jun Fujiki
IPC: H01L21/76 , H01L29/06 , H10B43/27 , H01L21/762
CPC classification number: H10B43/27 , H01L21/76224 , H01L29/0649
Abstract: Microelectronic devices include a stack structure comprising a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A series of pillars extends through the stack structure. At least one isolation structure extends through an upper stack portion of the stack structure. The at least one isolation structure protrudes into pillars of neighboring columns of pillars of the series of pillars. Conductive contacts are in electrical communication with the pillars into which the at least one isolation structure protrudes. Related methods and electronic systems are also disclosed.
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公开(公告)号:US11777036B2
公开(公告)日:2023-10-03
申请号:US17005054
申请日:2020-08-27
Applicant: Micron Technology, Inc.
Inventor: David K. Hwang , Richard J. Hill , Gurtej S. Sandhu
IPC: H01L29/24 , H01L29/786 , H01L29/423 , H01L27/12 , G11C11/408 , H01L29/16 , G11C11/22 , G11C11/4091
CPC classification number: H01L29/78618 , H01L27/127 , H01L27/1214 , H01L27/1255 , H01L27/1262 , H01L29/42384 , H01L29/78642 , G11C11/221 , G11C11/2257 , G11C11/2273 , G11C11/4085 , G11C11/4091 , H01L27/1225 , H01L29/1606 , H01L29/24 , H01L29/78696
Abstract: Some embodiments include an integrated assembly having an upwardly-extending structure with a sidewall surface. Two-dimensional-material extends along the sidewall surface. First electrostatic-doping-material is adjacent a lower region of the two-dimensional-material, insulative material is adjacent a central region of the two-dimensional-material, and second electrostatic-doping-material is adjacent an upper region of the two-dimensional-material. A conductive-gate-structure is over the first electrostatic-doping-material and adjacent to the insulative material. Some embodiments include methods of forming integrated assemblies.
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106.
公开(公告)号:US20230307350A1
公开(公告)日:2023-09-28
申请号:US17701509
申请日:2022-03-22
Applicant: Micron Technology, Inc.
Inventor: Lifang Xu , Indra V. Chary , Richard J. Hill
IPC: H01L23/522 , H01L23/528 , H01L23/535 , H01L21/768
CPC classification number: H01L23/5221 , H01L23/5283 , H01L23/535 , H01L21/76816 , H01L21/76895
Abstract: A microelectronic device includes a stack structure having blocks separated by dielectric slot structures and each including a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. At least one of the blocks includes an upper stadium structure, two crest regions, a lower stadium structure, and two bridge regions. The upper stadium structure extends from and between two of the dielectric slot structures, and includes staircase structures having steps including edges of some of the tiers. The two crest regions are horizontally offset from the upper stadium structure. The lower stadium structure is below the upper stadium structure, is interposed between the two crest regions, and includes additional staircase structures. The two bridge regions are interposed between the lower stadium structure and the two of the dielectric slot structures, and extend between the two crest regions. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US11729982B2
公开(公告)日:2023-08-15
申请号:US17507660
申请日:2021-10-21
Applicant: Micron Technology, Inc.
Inventor: Shyam Surthi , Richard J. Hill
Abstract: Some embodiments include an integrated assembly having a vertical stack of alternating insulative levels and conductive levels. The conductive levels include conductive structures. Channel material extends vertically through the stack. The conductive structures have proximal regions near the channel material, and have distal regions further from the channel material than the proximal regions. The insulative levels have first regions vertically between the proximal regions of neighboring conductive structures, and have second regions vertically between the distal regions of the neighboring conductive structures. Voids are within the insulative levels and extend across portions of the first and second regions. Some embodiments include methods for forming integrated assemblies.
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公开(公告)号:US11672118B2
公开(公告)日:2023-06-06
申请号:US17013047
申请日:2020-09-04
Applicant: Micron Technology, Inc.
Inventor: Shyam Surthi , Richard J. Hill , Gurtej S. Sandhu , Byeung Chul Kim , Francois H. Fabreguette , Chris M. Carlson , Michael E. Koltonski , Shane J. Trapp
IPC: H01L27/11582
CPC classification number: H01L27/11582
Abstract: An electronic device comprising a cell region comprising stacks of alternating dielectric materials and conductive materials. A pillar region is adjacent to the cell region and comprises storage node segments adjacent to adjoining oxide materials and adjacent to a tunnel region. The storage node segments are separated by a vertical portion of the tunnel region. A high-k dielectric material is adjacent to the conductive materials of the cell region and to the adjoining oxide materials of the pillar region. Additional electronic devices are disclosed, as are methods of forming an electronic device and related systems.
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公开(公告)号:US11670707B2
公开(公告)日:2023-06-06
申请号:US17840250
申请日:2022-06-14
Applicant: Micron Technology, Inc.
Inventor: David K. Hwang , John F. Kaeding , Richard J. Hill , Scott E. Sills
IPC: H01L21/00 , H01L29/76 , H01L29/66 , H01L27/11509 , H01L27/108 , H01L29/16 , H01L29/26 , H01L29/786 , H01L21/02 , H01L27/11507
CPC classification number: H01L29/7606 , H01L21/02521 , H01L21/02527 , H01L21/02568 , H01L27/10808 , H01L27/10855 , H01L27/10873 , H01L27/10897 , H01L27/11507 , H01L27/11509 , H01L29/1606 , H01L29/26 , H01L29/66045 , H01L29/66969 , H01L29/78642 , H01L29/78696
Abstract: Some embodiments include an integrated assembly having a conductive structure, an annular structure extending through the conductive structure, and an active-material-structure lining an interior periphery of the annular structure. The annular structure includes dielectric material. The active-material-structure includes two-dimensional-material. Some embodiments include methods of forming integrated assemblies.
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110.
公开(公告)号:US20230073372A1
公开(公告)日:2023-03-09
申请号:US17446868
申请日:2021-09-03
Applicant: Micron Technology, Inc.
Inventor: David H. Wells , Richard J. Hill , Umberto M. Meotto , Matthew Thorum
IPC: H01L23/522 , H01L27/11519 , H01L27/11524 , H01L27/11526 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L27/11582 , H01L27/11556 , H01L23/528 , H01L23/532
Abstract: A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, support structures vertically extending through the stack structure and within a horizontal area of the staircase structure, and conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure. Each of the conductive contacts has a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.
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