公开(公告)号：US06699928B2

公开(公告)日：2004-03-02

申请号：US09941495

申请日：2001-08-29

Applicant: Chad A. Cobbley ,  Tongbi Jiang ,  Edward A. Schrock

Inventor： Chad A. Cobbley ,  Tongbi Jiang ,  Edward A. Schrock

IPC: C08J300

CPC classification number: H01L24/83 ,  H01L24/27 ,  H01L24/29 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/83194 ,  H01L2224/83855 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512

Abstract: An adhesive composition and methods incorporating the adhesive composition in semiconductor applications are provided. The adhesive composition is an instant setting adhesive composition that does not require external energy input such as heat or radiation such for application of the adhesive composition on a surface. The instant setting composition possesses sufficient thixotropic characteristics such that applying the instant setting adhesive composition to a surface can be accomplished by a variety of application techniques and in a variety of patterns. Once applied to the surface, the instant setting adhesive composition sets to retain the discrete pattern as applied, in a relatively short period of time, typically from about 0.10 to about 120 seconds at an ambient temperature, typically from 20° C. to 30° C. Advantageously, the instant setting adhesive composition can be screen printed on a semiconductor wafer prior to singulation because streets between the dice are essentially free of the instant setting adhesive composition.

Abstract translation: 提供在半导体应用中粘合组合物的粘合剂组合物和方法。 粘合剂组合物是瞬间固化粘合剂组合物，其不需要诸如热或辐射的外部能量输入，以便将粘合剂组合物施加在表面上。 本发明的凝固组合物具有足够的触变特性，使得将即刻固化粘合剂组合物施加到表面可以通过各种应用技术和各种图案来实现。 一旦施加到表面上，即刻固化粘合剂组合物在相对较短的时间段内保持离散的图案，通常在约0.10至约120秒的环境温度，通常为20℃至30℃ 有利地，即刻固化粘合剂组合物可以在切割之前丝网印刷在半导体晶片上，因为骰子之间的街道基本上不含瞬时固化粘合剂组合物。

公开(公告)号：US06691406B2

公开(公告)日：2004-02-17

申请号：US09905241

申请日：2001-07-12

Applicant: Casey L. Prindivill ,  Tongbi Jiang

Inventor： Casey L. Prindivill ,  Tongbi Jiang

IPC: H05K330

CPC classification number: H01L24/32 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49548 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/4824 ,  H01L2224/8114 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49171 ,  H01L2924/3512 ,  H01L2924/00

Abstract: Methods for attaching an integrated circuit die to a substrate. Specifically, substrates which are used for BOC/COB or F/C surface mounting comprise protrusions on the surface of the substrate. The protrusions are configured to form barriers to hold an adhesive paste within the barriers. An integrated circuit die is disposed on the top of the barriers and coupled to the substrate by the adhesive paste.

Abstract translation: 将集成电路管芯连接到衬底的方法。 具体地，用于BOC / COB或F / C表面安装的基板包括在基板的表面上的突起。 突起被构造成形成障碍物以将粘合剂糊保持在障碍物内。 集成电路芯片设置在屏障的顶部，并通过粘合剂浆料与基板相连。

公开(公告)号：US06689635B1

公开(公告)日：2004-02-10

申请号：US09518339

申请日：2000-03-03

Applicant: Chad Cobbley ,  Tongbi Jiang

Inventor： Chad Cobbley ,  Tongbi Jiang

IPC: H01L2144

CPC classification number: H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1319 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H05K3/321 ,  H01L2224/05599

Abstract: An apparatus and method for face-down connection of a die to a substrate with polymer electrodes, the method comprising forming a plurality of conductive polymer electrodes on a substrate assembly: and elevating the temperature of the die sufficiently to cause electrical and fixed connection of the die to the electrodes upon appropriate contact; and then bringing the die face and electrodes into appropriate contact thereby forming the fixed and electrical connection.

Abstract translation: 一种用聚合物电极将裸片面向下连接到衬底的装置和方法，所述方法包括在衬底组件上形成多个导电聚合物电极，并且将模具的温度充分提高以引起电连接和固定连接 在适当接触时死亡到电极; 然后使模具面和电极适当接触，从而形成固定和电连接。

公开(公告)号：US06664175B2

公开(公告)日：2003-12-16

申请号：US10183852

申请日：2002-06-28

Applicant: Tongbi Jiang ,  Li Li

Inventor： Tongbi Jiang ,  Li Li

IPC: H01L2144

CPC classification number: H01L24/16 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/4846 ,  H01L23/498 ,  H01L24/11 ,  H01L2224/05124 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  Y10S257/913 ,  H01L2924/00014

Abstract: A multi-layered metal bond pad for a semiconductor die having a conductive metal layer and an overlying ruthenium electrode layer. The ruthenium electrode layer protects the conductive metal from oxidation due to ambient environmental conditions. An interconnect structure such as a wire bond or solder ball may be attached to the ruthenium layer to connect the semiconductor die to a lead frame or circuit support structure. Also disclosed are processes for forming the ruthenium layer.

Abstract translation: 一种用于具有导电金属层和上覆钌电极层的半导体管芯的多层金属焊盘。 钌电极层保护导电金属免受周围环境条件的氧化。 诸如引线接合或焊球的互连结构可以附着到钌层，以将半导体管芯连接到引线框架或电路支撑结构。 还公开了形成钌层的方法。

公开(公告)号：US06662440B1

公开(公告)日：2003-12-16

申请号：US09400613

申请日：1999-09-20

Applicant: Tongbi Jiang ,  Edward A. Schrock

Inventor： Tongbi Jiang ,  Edward A. Schrock

IPC: H05K334

CPC classification number: H01L24/83 ,  H01L24/31 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/095 ,  H05K3/1216 ,  H05K3/4007 ,  H05K2201/035 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2203/167 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49181 ,  Y10T29/49204 ,  H01L2924/00

Abstract: A Z-axis electrical contact may be formed using a resinous deposit containing conductive particles which may align along surface regions to form an electrical conduction path over the resinous material. If the resinous material is thermoplastic, the material may be heated to mechanically bond to contact surfaces. Advantageously, the resinous material may be formed by forcing a resinous matrix containing conductive particles through an annular opening in a stencil. The resulting member allows surfaces to be contacted which may be irregular or may be covered by native oxide layers.

Abstract translation: 可以使用含有导电颗粒的树脂沉积物形成Z轴电接触，所述导电颗粒可以沿着表面区域排列以在树脂材料上形成电传导路径。 如果树脂材料是热塑性的，则材料可以被加热以机械地结合到接触表面。 有利地，树脂材料可以通过强制含有导电颗粒的树脂基质通过模板中的环形开口形成。 所得到的构件允许接触表面，其可以是不规则的或可以被天然氧化物层覆盖。

公开(公告)号：US06661104B2

公开(公告)日：2003-12-09

申请号：US09946291

申请日：2001-09-04

Applicant: Tongbi Jiang ,  Jason L. Fuller ,  Alan G. Wood

Inventor： Tongbi Jiang ,  Jason L. Fuller ,  Alan G. Wood

IPC: H01L2329

CPC classification number: H01L21/563 ,  H01L24/27 ,  H01L24/29 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11822 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81121 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01056 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A microelectronic substrate assembly and method for manufacture. In one embodiment, bond members (such as solder balls) project away from a surface of the microelectronic substrate to define a fill region or cavity between the surface of the microelectronic substrate and the bond members. A fill material is disposed in the fill region, for example, by dipping the microelectronic substrate in reservoir of fill material so that a portion of the fill material remains attached to the microelectronic substrate. An exposed surface of the fill material is engaged with a support member, such as a printed circuit board, and the bond members are attached to corresponding bond pads on the support member. The microelectronic substrate and the fill material can then be encapsulated with an encapsulating material to form a device package.

公开(公告)号：US06641669B1

公开(公告)日：2003-11-04

申请号：US09513934

申请日：2000-02-28

Applicant: Tongbi Jiang ,  Chad A. Cobbley ,  John VanNortwick

Inventor： Tongbi Jiang ,  Chad A. Cobbley ,  John VanNortwick

IPC: B05C1111

CPC classification number: B41C1/14 ,  B41N1/242 ,  H01L2224/4826 ,  H05K3/1225 ,  Y10S438/945

Abstract: A method and apparatus for improved stencil/screen print quality is disclosed. The stencil or screen assists in application of a printable material onto a substrate, such as an adhesive to a semiconductor die of a semiconductor wafer during a lead-on-chip (LOC) packaging process. In one embodiment, the stencil includes a coating applied to at least one surface of a pattern of the stencil or screen to retard running of the printable material onto the surface. In another embodiment, the stencil or screen includes a second coating applied to at least one other surface of the pattern to promote spreading of the printable material onto the substrate.

公开(公告)号：US06630400B2

公开(公告)日：2003-10-07

申请号：US09854292

申请日：2001-05-09

Applicant: Tongbi Jiang ,  Li Li

Inventor： Tongbi Jiang ,  Li Li

IPC: H01L21288

CPC classification number: H01L24/05 ,  H01L21/02052 ,  H01L21/288 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/7685 ,  H01L24/03 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01016 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  Y10S134/902

Abstract: A method and apparatus is disclosed for sequential processing of integrated circuits, particularly for conductively passivating a contact pad with a material which resists formation of resistive oxides. In particular, a tank is divided into three compartments, each holding a different solution: a lower compartment and two upper compartments divided by a barrier, which extends across and partway down the tank. The solutions have different densities and therefore separate into different layers. In the illustrated embodiment, integrated circuits with patterned contact pads are passed through one of the upper compartments, in which oxide is removed from the contact pads. Continuing downward into the lower compartment and laterally beneath the barrier, a protective layer is selectively formed on the insulating layer surrounding the contact pads. As the integrated circuits are moved upwardly into the second upper compartment, a conducting monomer selectively forms on the contact pads prior to any exposure to air. The integrated circuits can then be transferred to an ozone chamber where polymerization results in a conductive passivation layer on the contact pad.

Abstract translation: 公开了用于集成电路的顺序处理的方法和装置，特别是用抵抗形成电阻氧化物的材料导电地钝化接触焊盘。 特别地，罐被分成三个隔室，每个隔间都有一个不同的解决方案：一个下隔室和两个隔离隔间的隔离隔板，两个隔间延伸横跨槽和一半的槽。 溶液具有不同的密度，因此分离成不同的层。 在所示实施例中，具有图案化接触焊盘的集成电路通过上隔室之一，其中氧化物从接触焊盘移除。 继续向下进入下隔室并在屏障下方横向放置，在围绕接触垫的绝缘层上选择性地形成保护层。 当集成电路向上移动到第二上隔室中时，在任何暴露于空气之前，在接触焊盘上选择性地形成导电单体。 然后可以将集成电路转移到臭氧室，其中聚合导致接触焊盘上的导电钝化层。

公开(公告)号：US06610591B1

公开(公告)日：2003-08-26

申请号：US09645833

申请日：2000-08-25

Applicant: Tongbi Jiang ,  Salman Akram

Inventor： Tongbi Jiang ,  Salman Akram

IPC: H01L2144

CPC classification number: H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K3/3436 ,  H05K2201/0212 ,  H05K2201/10234 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655

Abstract: A ball grid array for a flip chip assembly. The ball grid array including a plurality of bumps bonded between an active surface of a semiconductor die and a top surface of a printed circuit board or any type of substrate carrier. The plurality of balls include at least one bump having a core material and an outer layer. The rigidity of the core material is greater than that of the material of the outer layer. Additionally, the melting temperature of the core material is higher than the material of the outer layer. By this arrangement, the core material with an outer layer provides bumps that are substantially uniform in height. In addition, the balls only procure marks or deformation to the core material during burn-in testing and reflow. Therefore, when bonding the semiconductor device to the substrate, the ball grid array provides sufficient electrical and mechanical connection despite any non-planarity in the active surface of the semiconductor device and the top surface of the substrate, and any differing height in the plurality of balls due to testing the semiconductor device.

Abstract translation: 用于倒装芯片组件的球栅阵列。 该球栅阵列包括多个凸起，该多个凸块接合在半导体管芯的有源表面和印刷电路板的顶表面之间或任何类型的衬底载体上。 多个球包括至少一个具有芯材料和外层的凸块。 芯材的刚性大于外层材料的刚性。 此外，芯材料的熔化温度高于外层的材料。 通过这种布置，具有外层的芯材料提供高度基本均匀的凸块。 此外，在老化测试和回流过程中，球只会对芯材料产生痕迹或变形。 因此，当将半导体器件接合到衬底时，尽管在半导体器件的有源表面和衬底的顶表面中存在任何非平坦性，但球栅阵列提供足够的电和机械连接，并且多个 由于测试了半导体器件。

公开(公告)号：US06576495B1

公开(公告)日：2003-06-10

申请号：US09651448

申请日：2000-08-30

Applicant: Tongbi Jiang ,  Jason L. Fuller ,  Alan G. Wood

Inventor： Tongbi Jiang ,  Jason L. Fuller ,  Alan G. Wood

IPC: H01L2144

CPC classification number: H01L21/563 ,  H01L24/27 ,  H01L24/29 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11822 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81121 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01056 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A microelectronic substrate assembly and method for manufacture. In one embodiment, bond members (such as solder balls) project away from a surface of the microelectronic substrate to define a fill region or cavity between the surface of the microelectronic substrate and the bond members. A fill material is disposed in the fill region, for example, by dipping the microelectronic substrate in reservoir of fill material so that a portion of the fill material remains attached to the microelectronic substrate. An exposed surface of the fill material is engaged with a support member, such as a printed circuit board, and the bond members are attached to corresponding bond pads on the support member. The microelectronic substrate and the fill material can then be encapsulated with an encapsulating material to form a device package.