公开(公告)号：US06545868B1

公开(公告)日：2003-04-08

申请号：US09688499

申请日：2000-10-16

Applicant: Kenneth J. Kledzik ,  Jason C. Engle

Inventor： Kenneth J. Kledzik ,  Jason C. Engle

IPC: H05K720

CPC classification number: H05K1/141 ,  H01L25/105 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/0002 ,  H05K1/0231 ,  H05K3/0061 ,  H05K3/3405 ,  H05K3/3421 ,  H05K3/368 ,  H05K2201/049 ,  H05K2201/1034 ,  H05K2201/10515 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2201/10924 ,  H01L2924/00

Abstract: An improved multi-chip module includes a main circuit board having an array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of a package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each planar surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. A second primary embodiment of the invention utilizes a carrier substrate which has a pair of recesses for back-to-back surface mounting of the IC package pair. The two IC packages may be in contact with opposite sides of a heat sink layer embedded within the carrier substrate. Each resulting IC package unit is surface mounted to the main circuit board. A third primary embodiment of the invention incorporates features of both the first and second primary embodiments. One of the packages is mounted on a planar surface of the carrier right-side up, while the other package is mounted on the carrier in a recess upside down. Several variants of this embodiment are possible. Either the IC package that is mounted on the planar surface of the carrier, or the IC package that is mounted within the recess, may be mounted adjacent to the main circuit board. In the former case, the adjacent package of the package unit fits within a recess on the main circuit board. In the latter case, the adjacent package of the package unit mounts on a planar surface of the main circuit board. For any of the three primary main embodiments, the carrier may be equipped with its own set of interconnection leads which interface with the interconnection pads on the main circuit board or connection may be made directly between the leads of one package and the interconnection pads of the circuit board.

公开(公告)号：US20030038705A1

公开(公告)日：2003-02-27

申请号：US10242980

申请日：2002-09-13

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Michio Miyazaki ,  Haruyuki Takeuchi ,  Tadao Bekku

IPC: H01C007/10

CPC classification number: H01C1/01 ,  H01C1/014 ,  H01C1/1406 ,  H05K1/0201 ,  H05K1/181 ,  H05K3/341 ,  H05K2201/062 ,  H05K2201/10378 ,  H05K2201/10643 ,  H05K2201/10659 ,  H05K2201/2036 ,  Y02P70/611

Abstract: A thermistor with positive resistance-to-temperature characteristic used in a overcurrent protection circuit has electrodes on mutually opposite main surfaces and is mounted to a substrate having electrically conductive members such that deterioration of its voltage resistance due to heat emission can be controlled. A spacer with smaller thermal conductivity than the substrate and penetrated by a conductor piece with a small cross-sectional area is inserted between solder materials connecting to one of the thermistor electrodes. The other electrode is contacted by an elongated connecting member through its sectional surface transverse to its longitudinal direction such that the cross-sectional area of electrical conduction is reduced.

公开(公告)号：US06521842B2

公开(公告)日：2003-02-18

申请号：US09885614

申请日：2001-06-20

Applicant: Mark R. Brinthaupt, III ,  Lisa J. Jimarez ,  William F. Wildey

Inventor： Mark R. Brinthaupt, III ,  Lisa J. Jimarez ,  William F. Wildey

IPC: H05K100

CPC classification number: H05K1/116 ,  H05K1/0201 ,  H05K3/3415 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/062 ,  H05K2201/0969 ,  H05K2201/10189 ,  H05K2201/10659

Abstract: A multi-layer circuit board is disclosed. The circuit board comprises a plurality of conductive planes; a plurality of plated through hole sets, each set comprising one or more plated through holes, none to all of the plated through holes of each set contacting at least one the conductive plane; a thermal break formed around each plated through hole in each conductive plane to which the plated through hole is connected; and one or more thermal vents, in the vicinity of each plated through hole in each conductive plane to which the plated through hole is connected. Additionally, surface mount technology pads are provided on a top surface of the circuit board.

Abstract translation: 公开了一种多层电路板。 电路板包括多个导电平面; 多个电镀通孔组，每组包括一个或多个电镀通孔，每组的电镀通孔中的至少一个接触至少一个导电平面; 在连接有电镀通孔的每个导电平面中的每个电镀通孔周围形成热断裂; 以及一个或多个热通风口，在每个电镀通孔附近，电镀通孔所连接的每个导电平面中。 此外，表面贴装技术垫设置在电路板的顶表面上。

公开(公告)号：US20020181216A1

公开(公告)日：2002-12-05

申请号：US10139597

申请日：2002-05-06

Inventor： Kenneth J. Kledzik ,  Jason C. Engle

IPC: H01R012/16

CPC classification number: H05K1/141 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/0002 ,  H05K1/0231 ,  H05K3/0061 ,  H05K3/3405 ,  H05K3/3421 ,  H05K3/368 ,  H05K2201/049 ,  H05K2201/1034 ,  H05K2201/10515 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2201/10924 ,  H01L2924/00

Abstract: An improved multi-chip module includes a main circuit board having an array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of a package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each planar surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. A second primary embodiment of the invention utilizes a carrier substrate which has a pair of recesses for back-to-back surface mounting of the IC package pair. The two IC packages may be in contact with opposite sides of a heat sink layer embedded within the carrier substrate. Each resulting IC package unit is surface mounted to the main circuit board. A third primary embodiment of the invention incorporates features of both the first and second primary embodiments. One of the packages is mounted on a planar surface of the carrier right-side up, while the other package is mounted on the carrier in a recess upside down. Several variants of this embodiment are possible. Either the IC package that is mounted on the planar surface of the carrier, or the IC package that is mounted within the recess, may be mounted adjacent to the main circuit board. In the former case, the adjacent package of the package unit fits within a recess on the main circuit board. In the latter case, the adjacent package of the package unit mounts on a planar surface of the main circuit board. For any of the three primary main embodiments, the carrier may be equipped with its own set of interconnection leads which interface with the interconnection pads on the main circuit board or connection may be made directly between the leads of one package and the interconnection pads of the circuit board.

公开(公告)号：US20020118332A1

公开(公告)日：2002-08-29

申请号：US10073967

申请日：2002-02-14

Inventor： Kazuhiro Ogawa ,  Kazuhiko Yanagawa

IPC: G02F001/1345

CPC classification number: G02F1/13452 ,  G02F1/134363 ,  H01L2924/0002 ,  H05K1/117 ,  H05K3/244 ,  H05K3/28 ,  H05K3/323 ,  H05K3/3452 ,  H05K3/361 ,  H05K2201/09709 ,  H05K2201/10659 ,  H05K2201/10681 ,  H01L2924/00

Abstract: A liquid crystal display device which provides reliable connection between a semiconductor device and a printed circuit board includes a liquid crystal display panel, a printed circuit board disposed close to the liquid crystal display panel, and a semiconductor device of a film carrier type which is disposed to lie between the liquid crystal display panel and the printed circuit board, and terminals of the semiconductor device are respectively connected by an anisotropic conductive film to terminals of the printed circuit board that are disposed in opposition to the respective terminals of the semiconductor device.

Abstract translation: 提供半导体器件和印刷电路板之间的可靠连接的液晶显示装置包括液晶显示面板，靠近液晶显示面板设置的印刷电路板，以及设置在薄膜载体型的半导体器件 位于液晶显示面板和印刷电路板之间，并且半导体器件的端子分别通过各向异性导电膜连接到与半导体器件的各个端子相对设置的印刷电路板的端子。

公开(公告)号：US06271583B1

公开(公告)日：2001-08-07

申请号：US09097668

申请日：1998-06-16

Applicant: Hideharu Sakoda ,  Yoshiyuki Yoneda ,  Kazuto Tsuji

Inventor： Hideharu Sakoda ,  Yoshiyuki Yoneda ,  Kazuto Tsuji

IPC: H01L2348

CPC classification number: H05K1/0243 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K2201/10287 ,  H05K2201/10477 ,  H05K2201/10659 ,  H05K2201/10689 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device includes a substrate having a first surface, a second surface and at least one conductor part which are exposed at both the first and second surfaces of the substrate, a semiconductor chip provided on the first surface of the substrate and having a plurality of electrode pads, a plurality of leads, a plurality of bonding-wires electrically connecting the leads and the conductor parts to corresponding ones of the electrode pads of the semiconductor chip, and a resin package encapsulating the semiconductor chip, a part of the leads, and the substrate so that the conductor parts are exposed at the second surface of the substrate.

Abstract translation: 半导体器件包括具有第一表面，第二表面和暴露于基板的第一和第二表面的至少一个导体部分的基板，设置在基板的第一表面上的半导体芯片， 电极焊盘，多个引线，将引线和导体部分电连接到半导体芯片的对应的电极焊盘的多个接合线以及封装半导体芯片的树脂封装，引线的一部分和 基板，使得导体部分在基板的第二表面处露出。

公开(公告)号：US6134111A

公开(公告)日：2000-10-17

申请号：US060562

申请日：1998-04-15

Applicant: Larry D. Kinsman ,  Jerry M. Brooks ,  Walter L. Moden

Inventor： Larry D. Kinsman ,  Jerry M. Brooks ,  Walter L. Moden

IPC: H01L23/367 ,  H01L23/433 ,  H05K1/02 ,  H05K3/30 ,  H05K7/02

CPC classification number: H05K3/303 ,  H01L23/3675 ,  H01L23/4334 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K2201/09709 ,  H05K2201/10454 ,  H05K2201/10659 ,  H05K2201/10696 ,  Y02P70/613

Abstract: A high density vertical surface mount package and thermal carrier therefor including a heat sink.

公开(公告)号：US06095857A

公开(公告)日：2000-08-01

申请号：US261248

申请日：1999-03-03

Applicant: Victor Isac

Inventor： Victor Isac

IPC: H01R12/55 ,  H01R12/57 ,  H01R13/73 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01R12/57 ,  H05K3/341 ,  H05K2201/09781 ,  H05K2201/10189 ,  H05K2201/10659 ,  H05K2201/10833 ,  H05K2201/1084 ,  H05K3/3426 ,  Y02P70/613

Abstract: A novel surface-mount electrical component for mounting on a circuit board. The electrical component includes at least one pin and a retaining surface. The pin serves as both a point of electrical contact between the electrical component and the circuit board and as a solder-anchoring point. The retaining surface is remote from the pin and serves as an additional solder-anchoring point for restricting the movement of the electrical component on the circuit board. Both the pin and the retaining surface are coplanar, ensuring even soldering of the electrical component to the circuit board.

Abstract translation: 一种用于安装在电路板上的新型表面贴装电气元件。 电气部件包括至少一个销和保持表面。 该引脚既用作电气部件与电路板之间的电接触点，也用作焊接点。 保持表面远离销，并且用作用于限制电气部件在电路板上的移动的附加焊接固定点。 销和保持表面都是共面的，确保电气部件均匀地焊接到电路板。

公开(公告)号：US6072235A

公开(公告)日：2000-06-06

申请号：US65822

申请日：1998-04-23

Applicant: Karl Rehnelt ,  Frank Templin

Inventor： Karl Rehnelt ,  Frank Templin

IPC: H01L23/498 ,  H05K3/30 ,  H05K3/36 ,  H01L23/02 ,  H01L23/495

CPC classification number: H05K3/366 ,  H01L23/49811 ,  H01L2924/0002 ,  H05K2201/10386 ,  H05K2201/10659 ,  H05K2203/167 ,  H05K3/305

Abstract: Terminal pins with two lateral portions and a bridge-shaped elevated middle portion are provided. The terminal pin and perpendicularly rising hybrid circuit typically together have an inverted T shape. On the one hand, the hybrid circuit stands on its own on the substrate without further means of assistance and can be soldered. On the other hand, the bridge-shaped construction effects a sufficient elasticity and carrying capacity relative to swivellings, or respectively, accelerations, as well as effecting the presence of two defined support surfaces whose co-planarity is guaranteed by the springing configuration of the terminal pins.

Abstract translation: 提供具有两个横向部分和一个桥形的中部的端子销。 端子引脚和垂直上升的混合电路通常一起具有倒T形。 一方面，混合电路独立于基板上，无需进一步的帮助，也可以焊接。 另一方面，桥形结构相对于旋转或相应的加速度具有足够的弹性和承载能力，并且实现两个限定的支撑表面的存在，其中共面性由端子的弹簧构型保证 针脚。

公开(公告)号：US6031280A

公开(公告)日：2000-02-29

申请号：US97815

申请日：1998-06-16

Applicant: Hideharu Sakoda

Inventor： Hideharu Sakoda

IPC: H01L23/31 ,  H01L23/433 ,  H05K1/02 ,  H01L23/48

CPC classification number: H05K1/0243 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4334 ,  H01L24/49 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K2201/10287 ,  H05K2201/10477 ,  H05K2201/10659 ,  H05K2201/10689

Abstract: A semiconductor device includes a substrate having a first surface, a second surface and at least one conductor part which are exposed at both the first and second surfaces of the substrate, a semiconductor chip provided on the first surface of the substrate and having a plurality of electrode pads, a plurality of leads, a plurality of bonding-wires electrically connecting the leads and the conductor parts to corresponding ones of the electrode pads of the semiconductor chip, and a resin package encapsulating the semiconductor chip, a part of the leads, and the substrate so that the conductor parts are exposed at the second surface of the substrate.

Abstract translation: 半导体器件包括具有第一表面，第二表面和暴露于基板的第一和第二表面的至少一个导体部分的基板，设置在基板的第一表面上的半导体芯片， 电极焊盘，多个引线，将引线和导体部分电连接到半导体芯片的对应的电极焊盘的多个接合线以及封装半导体芯片的树脂封装，引线的一部分和 基板，使得导体部分在基板的第二表面处露出。