公开(公告)号：US20240010490A1

公开(公告)日：2024-01-11

申请号：US18334296

申请日：2023-06-13

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Gabriele GATTERE ,  Francesco RIZZINI ,  Federico VERCESI

IPC: B81B7/02 ,  B81C1/00

CPC classification number: B81B7/02 ,  B81C1/00198 ,  B81B2201/0235 ,  B81B2203/04 ,  B81B2203/033 ,  B81B2203/0307 ,  B81B2203/06 ,  B81B2207/015 ,  B81C2201/014 ,  B81C2203/0707

Abstract: The detection structure for a MEMS accelerometer is formed by a substrate; a first movable mass and a second movable mass which extend at a distance from each other, suspended on the substrate and which are configured to undergo a movement, with respect to the substrate, in response to an acceleration. The detection structure also has a first movable electrode integral with the first movable mass; a second movable electrode integral with the second movable mass; a first fixed electrode integral with the substrate and configured to form, with the first movable electrode, a first variable capacitor; and a second fixed electrode integral with the substrate and configured to form, with the second movable electrode, a second variable capacitor. The detection structure has an insulation region, of electrically insulating material, which is suspended on the substrate and extends between the first movable mass and the second movable mass.

公开(公告)号：US20230382714A1

公开(公告)日：2023-11-30

申请号：US18201710

申请日：2023-05-24

Applicant: DB HITEK CO., LTD.

Inventor： Min Hyun JUNG ,  Joo Hyeon LEE

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0021 ,  B81C1/00158 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/0307 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81B2203/0353 ,  B81B2203/04 ,  B81C2201/0154 ,  B81C2201/014 ,  B81C2201/0133 ,  B81C2201/0166 ,  B81C2201/0164

Abstract: A MEMS microphone includes a substrate having a cavity, a diaphragm disposed above the cavity and having a ventilation path, and a back plate disposed above the diaphragm and having a plurality of air holes. The ventilation path includes a plurality of slits extending in a circumferential direction.

公开(公告)号：US20230357001A1

公开(公告)日：2023-11-09

申请号：US18246790

申请日：2021-09-30

Applicant: Robert Bosch GmbH

Inventor： Heribert Weber ,  Andreas Scheurle ,  Hans Artmann ,  Peter Schmollngruber ,  Thomas Friedrich ,  Uwe Schiller

IPC: B81C1/00 ,  B81B3/00

CPC classification number: B81C1/00158 ,  B81B3/0021 ,  B81B2201/0257 ,  B81C2201/0105 ,  B81C2201/014 ,  B81C2203/038 ,  B81B2203/0307 ,  B81B2203/0315 ,  B81B2203/033 ,  B81B2203/0353

Abstract: A production method for a micromechanical component for a sensor device or microphone device. The method includes: forming a supporting structure composed of a first sacrificial material on a substrate surface of a substrate with a first sacrificial material layer, a plurality of etching holes structured through the first sacrificial material layer, and a plurality of supporting posts projecting into the substrate; etching into the substrate surface at least one cavity spanned by the supporting structure; forming a diaphragm composed of at least one semiconductor material on or over the first sacrificial material layer of the supporting structure; depositing a layer stack comprising at least one sacrificial layer and at least one counter electrode; and exposing the diaphragm by at least partially removing at least the supporting structure and the at least one sacrificial layer.

公开(公告)号：US11731871B2

公开(公告)日：2023-08-22

申请号：US17334493

申请日：2021-05-28

Applicant: InvenSense, Inc.

Inventor： Ashfaque Uddin ,  Daesung Lee ,  Alan Cuthbertson

IPC: B81C1/00 ,  B81B3/00 ,  B81B7/00 ,  B81B7/02

CPC classification number: B81C1/00801 ,  B81B3/001 ,  B81B7/0025 ,  B81B7/02 ,  B81C1/00968 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0127 ,  B81B2207/012 ,  B81C2201/014 ,  B81C2201/0132 ,  B81C2203/036 ,  B81C2203/0792

Abstract: A method includes forming an etch stop layer over a first side of a device wafer. The method also includes forming a polysilicon layer over the etch stop layer. A handle wafer is fusion bonded to the first side of the device wafer. A eutectic bond layer is formed on a second side of the device wafer. A micro-electro-mechanical system (MEMS) features are etched into the second side of the device wafer to expose the etch stop layer. The exposed etch stop layer is removed to expose the polysilicon layer. The exposed polysilicon layer is removed to expose a cavity formed between the handle wafer and the device wafer.

公开(公告)号：US20180141801A1

公开(公告)日：2018-05-24

申请号：US15574980

申请日：2016-05-23

Applicant: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)

Inventor： Georg Ernest FANTNER ,  Jonathan David ADAMS ,  Nahid HOSSEINI

IPC: B81B3/00 ,  G01Q60/38 ,  B81C1/00

CPC classification number: B81B3/0045 ,  B81B3/0078 ,  B81B2201/12 ,  B81B2203/0118 ,  B81C1/0015 ,  B81C1/00682 ,  B81C2201/014 ,  G01Q20/04 ,  G01Q60/38 ,  G01Q70/14

Abstract: The present invention relates to a cantilever or membrane comprising a body and an elongated beam attached to the body. The elongated beam includes a first layer comprising a first material, a second layer comprising a second material having an elastic modulus different to that of the first material, a third layer comprising a third material having an elastic modulus different to that of the first material, where the first layer is sandwiched between the second layer and the third layer.

公开(公告)号：US09938139B2

公开(公告)日：2018-04-10

申请号：US15033015

申请日：2013-10-30

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Roger A. McKay ,  Patrick W. Sadik

IPC: B81C1/00 ,  H01M4/38 ,  H01M4/04 ,  C23C14/58 ,  C23F1/16 ,  C23F1/02

CPC classification number: B81C1/00539 ,  B81B2201/058 ,  B81C1/00119 ,  B81C2201/0115 ,  B81C2201/014 ,  C23C14/5873 ,  C23F1/02 ,  C23F1/16 ,  H01M4/0492 ,  H01M4/386

Abstract: Etching islands are formed on a first face of a substrate and a second face of the substrate non-parallel to the first face. The first face and the second face of the substrate are concurrently exposed to a solution that reacts with the etching islands to concurrently form porous regions extending into the first face and the second face.

公开(公告)号：US09932223B2

公开(公告)日：2018-04-03

申请号：US15097331

申请日：2016-04-13

Applicant: Robert Bosch GmbH

Inventor： Hans Artmann ,  Arnd Kaelberer ,  Christian Zielke ,  Oliver Breitschaedel ,  Peter Borwin Staffeld

IPC: B81C1/00

CPC classification number: B81C1/00182 ,  B81B2203/0118 ,  B81C2201/014

Abstract: A method for manufacturing microelectromechanical structures in a layer sequence and a corresponding electronic component having a microelectromechanical structure. The method includes provision of a carrier substrate including a first surface, an application of an insulation layer onto the first surface, an epitaxial growth of a first silicon layer onto the insulation layer, a structuring of the first silicon layer for forming trenches in the first silicon layer, a passivation of the first silicon layer, whereby the trenches are filled and a passivation layer is formed on a side facing away from the first surface, a structuring of the passivation layer, sacrificial areas and functional areas being formed in the first silicon layer, and the sacrificial areas are free of the passivation layer, at least at some points, on a side facing away from the carrier substrate, and, finally, removal of the sacrificial areas.

公开(公告)号：US20180068888A1

公开(公告)日：2018-03-08

申请号：US15679914

申请日：2017-08-17

Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION ,  SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION

Inventor： XIANCHAO WANG

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01L21/3205 ,  H01L29/423

CPC classification number: H01L21/76804 ,  B81B2201/0257 ,  B81C1/00587 ,  B81C2201/014 ,  H01L21/02326 ,  H01L21/02505 ,  H01L21/3205 ,  H01L21/56 ,  H01L23/5329 ,  H01L29/4232 ,  H01L2924/0002

Abstract: A method for manufacturing a semiconductor device includes providing a semiconductor substrate including a substrate and a multilayer film having a step-shaped portion on the substrate; forming a protective layer covering the step-shaped portion of the multilayer film; forming a capping layer having a plurality of steps on the protective layer covering the semiconductor substrate; and removing at least one layer of the multilayer film to form a cavity that is defined by the capping layer and a remaining multilayer film that has the at least one layer removed. The thus formed semiconductor device does not have cracks in the steps of the capping layer when performing an etch process, thereby improving the performance of the semiconductor device.

公开(公告)号：US20170336437A1

公开(公告)日：2017-11-23

申请号：US15659963

申请日：2017-07-26

Applicant: Chinese Academy of Sciences Institute of Geology and Geophysics

Inventor： Lianzhong YU ,  Chen Sun ,  Leiyang Yi

IPC: G01P15/125 ,  G01P15/08

CPC classification number: B81C3/001 ,  B81B2201/0235 ,  B81B2203/051 ,  B81C1/00134 ,  B81C1/0019 ,  B81C1/00269 ,  B81C1/00357 ,  B81C1/00396 ,  B81C1/00531 ,  B81C1/00539 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/014 ,  B81C2201/019 ,  G01P15/125 ,  G01P2015/0814

Abstract: A process for fabricating a symmetrical MEMS accelerometer. A pair of half parts is fabricated by, for each half part: (i) forming a plurality of resilient beams, first connecting parts, second connecting parts, and a plurality of comb structures, by etching a plurality of holes on a bottom surface of a first silicon wafer; (ii) etching a plurality of hollowed parts on a top surface of a second silicon wafer; (iii) forming a silicon dioxide layer on the top and bottom surface of the second silicon wafer; (iv) bonding the bottom surface of the first silicon wafer with the top surface of the second silicon wafer; (v) depositing a layer of silicon nitride on the bottom surface of the second silicon wafer, and removing parts of the silicon nitride layer and silicon dioxide layer on the bottom surface of the second silicon wafer; (vii) deep etching the exposed parts of the bottom surface of the second silicon wafer to the silicon dioxide layer located on the top surface of the second silicon wafer, and reducing the thickness of the first silicon wafer; and (viii) removing the silicon nitride layer, and etching the silicon dioxide to form the mass. The two half parts are then bonded along their bottom surface. The device is deep etched to form a movable accelerometer. A bottom cap is fabricated by hollowing out the corresponding area, and depositing metal as electrodes. The accelerometer is bonded with the bottom cap. Metal is deposited on the first silicon wafer to form electrodes.

公开(公告)号：US09771261B1

公开(公告)日：2017-09-26

申请号：US15072852

申请日：2016-03-17

Applicant: Texas Instruments Incorporated

Inventor： Lee Alan Stringer ,  Mona Eissa ,  Byron J. R. Shulver ,  Sopa Chevacharoenkul ,  Mark R. Kimmich ,  Sudtida Lavangkul ,  Mark L. Jenson

IPC: G01R33/04 ,  B81C1/00 ,  G01R33/00

CPC classification number: B81C1/00825 ,  B81C1/00365 ,  B81C2201/0138 ,  B81C2201/014 ,  G01R33/0047 ,  G01R33/0052 ,  G01R33/04

Abstract: A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.