公开(公告)号：US20070247904A1

公开(公告)日：2007-10-25

申请号：US11766980

申请日：2007-06-22

Applicant: Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

Inventor： Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

IPC: G11C16/04

CPC classification number: H01L29/7887 ,  B82Y10/00 ,  G03G5/00 ,  G03G5/02 ,  G03G5/04 ,  G03G5/043 ,  G03G5/08 ,  G03G5/082 ,  G03G5/08214 ,  G11C11/56 ,  G11C13/02 ,  G11C13/025 ,  G11C2213/17 ,  G11C2213/18 ,  G11C2216/08 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/7881 ,  Y10S977/774 ,  Y10S977/785 ,  Y10S977/936

Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.

Abstract translation: 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面，存储器件包括衬底，衬底的源极区域和衬底的漏极区域。 纳米元素的群体沉积在通道区域上方的衬底上，在一个实施方案中纳米的群体包括金属量子点。 隧道介电层形成在覆盖沟道区的衬底上，金属迁移势垒层沉积在电介质层上。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在包括具有多个离散能级的一个或多个量子点或分子的多状态存储器件中，公开了一种用于对该器件进行充电和/或放电的方法，该方法包括填充每个点或分子的多个离散能级中的每一个 与一个或多个电子，并随后从一个或多个点或分子的每个离散能级一次去除单个电子。

公开(公告)号：US20070228439A1

公开(公告)日：2007-10-04

申请号：US11760382

申请日：2007-06-08

Applicant: Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Parce ,  Jay Goldman

Inventor： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Parce ,  Jay Goldman

IPC: H01L29/786

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01F1/405 ,  H01L27/092 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L31/035281 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0545 ,  H01L51/0595 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/781 ,  Y10S977/789 ,  Y10S977/938

Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

Abstract translation: 描述了具有多个半导体器件的电子基片的方法和装置。 在衬底上形成纳米线薄膜。 纳米线的薄膜形成为具有足够的纳米线密度以达到工作电流水平。 在纳米线的薄膜中限定多个半导体区域。 在半导体器件区域处形成触点，从而提供与多个半导体器件的电连接。 此外，用于制造纳米线的各种材料，包括p掺杂纳米线和n掺杂纳米线的薄膜，纳米线异质结构，发光纳米线异质结构，用于在衬底上定位纳米线的流动掩模，用于沉积纳米线的纳米线喷涂技术，用于减少或消除声子的技术 描述了纳米线中的电子散射，以及用于降低纳米线中的表面状态的技术。

公开(公告)号：US07233041B2

公开(公告)日：2007-06-19

申请号：US11490637

申请日：2006-07-21

Applicant: Xiangfeng Duan ,  Chunming Niu ,  Stephen A. Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence A. Bock ,  David P. Stumbo ,  Parce J. Wallace ,  Jay L. Goldman

Inventor： Xiangfeng Duan ,  Chunming Niu ,  Stephen A. Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence A. Bock ,  David P. Stumbo ,  Parce J. Wallace ,  Jay L. Goldman

IPC: H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01F1/405 ,  H01L27/092 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L31/035281 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0545 ,  H01L51/0595 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/781 ,  Y10S977/789 ,  Y10S977/938

Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

公开(公告)号：US20060211183A1

公开(公告)日：2006-09-21

申请号：US11405864

申请日：2006-04-18

Applicant: Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Parce ,  Jay Goldman

Inventor： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Parce ,  Jay Goldman

IPC: H01L21/84 ,  H01L21/00

CPC classification number: H01L29/78696 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/17 ,  G11C2213/18 ,  H01L24/95 ,  H01L27/1292 ,  H01L29/04 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78684 ,  H01L29/7869 ,  H01L33/20 ,  H01L51/0048 ,  H01L51/0052 ,  H01L51/0541 ,  H01L51/0545 ,  H01L2924/12032 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00

Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

公开(公告)号：US07105428B2

公开(公告)日：2006-09-12

申请号：US11117703

申请日：2005-04-29

Applicant: Yaoling Pan ,  Xiangfeng Duan ,  Robert S. Dubrow ,  Jay L. Goldman ,  Shahriar Mostarshed ,  Chunming Niu ,  Linda T. Romano ,  Dave Stumbo

Inventor： Yaoling Pan ,  Xiangfeng Duan ,  Robert S. Dubrow ,  Jay L. Goldman ,  Shahriar Mostarshed ,  Chunming Niu ,  Linda T. Romano ,  Dave Stumbo

IPC: H01L21/20 ,  H01L21/477 ,  H01L21/31 ,  H01L23/48 ,  H01L29/40 ,  B01J27/22 ,  H01L21/44

CPC classification number: H01L29/0673 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  C01B32/18 ,  C30B11/12 ,  C30B25/00 ,  C30B29/06 ,  C30B29/60 ,  C30B29/605 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02521 ,  H01L21/02573 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0665 ,  H01L29/66477 ,  H01L29/78 ,  H01L29/7854 ,  H01L2924/0002 ,  Y10S438/962 ,  Y10S977/742 ,  Y10S977/743 ,  Y10S977/843 ,  Y10S977/891 ,  H01L2924/00

Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrifical growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.

公开(公告)号：US07064372B2

公开(公告)日：2006-06-20

申请号：US11004380

申请日：2004-12-03

Applicant: Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence A. Bock ,  David P. Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

Inventor： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence A. Bock ,  David P. Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

IPC: H01L27/108 ,  H01L29/94 ,  H01L29/76

CPC classification number: H01L29/78696 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/17 ,  G11C2213/18 ,  H01L24/95 ,  H01L27/1292 ,  H01L29/04 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78684 ,  H01L29/7869 ,  H01L33/20 ,  H01L51/0048 ,  H01L51/0052 ,  H01L51/0541 ,  H01L51/0545 ,  H01L2924/12032 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00

Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

公开(公告)号：US20060008942A1

公开(公告)日：2006-01-12

申请号：US11117707

申请日：2005-04-29

Applicant: Linda Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert Dubrow ,  Stephen Empedocles ,  Jay Goldman ,  James Hamilton ,  David Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik Scher ,  David Stumbo ,  Jeffery Whiteford

Inventor： Linda Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert Dubrow ,  Stephen Empedocles ,  Jay Goldman ,  James Hamilton ,  David Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik Scher ,  David Stumbo ,  Jeffery Whiteford

IPC: H01L51/40 ,  H01L21/31 ,  H01L21/20 ,  H01L21/336 ,  B29C47/00 ,  D01F9/12 ,  H01L21/00 ,  D02G3/00

CPC classification number: C30B29/605 ,  B82Y10/00 ,  C30B11/12 ,  H01L21/02439 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78684 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0048 ,  Y10S977/762 ,  Y10S977/938 ,  Y10T428/139 ,  Y10T428/2902 ,  Y10T428/2949

Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

Abstract translation: 本发明涉及收获，整合和利用纳米材料，特别是细长的纳米线材料的方法。 本发明提供了收获纳米线的方法，其包括选择性地蚀刻放置在纳米线生长衬底上以去除纳米线的牺牲层。 本发明还提供了将纳米线整合到电子器件中的方法，包括将圆筒的外表面与纳米线的流体悬浮液接触并滚动纳米线涂覆的圆筒以将纳米线沉积到表面上。 还提供了使用喷墨打印机或孔径以纳米线排列纳米线的方法。 本发明的另外的方面提供了用于防止基于纳米线的晶体管中的栅极短路的方法。 提供了收获和集成纳米线的其他方法。

公开(公告)号：US20050202615A1

公开(公告)日：2005-09-15

申请号：US10796413

申请日：2004-03-10

Applicant: Xiangfeng Duan ,  Chunming Niu ,  David Stumbo ,  Calvin Chow

Inventor： Xiangfeng Duan ,  Chunming Niu ,  David Stumbo ,  Calvin Chow

IPC: H01L21/8234

CPC classification number: G11C16/0408 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7887

Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A thin film of nanoelements is formed on the substrate above a channel region. A gate contact is formed on the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device, nanoelements are present having a plurality of charge injection voltages, to provide multiple states. In another aspect, a printing device includes a charge diffusion layer that includes a matrix containing a plurality of nanoelements configured to be anisotropically electrically conductive through the charge diffusion layer to transfer charge to areas of the first surface with reduced lateral charge spread.

Abstract translation: 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面，存储器件包括衬底，衬底的源极区域和衬底的漏极区域。 在通道区域上方的衬底上形成纳米元素的薄膜。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在多状态存储器件中，纳米元件具有多个电荷注入电压，以提供多种状态。 另一方面，印刷装置包括电荷扩散层，该电荷扩散层包括通过电荷扩散层构成为各向异性导电的多个纳米元素的基体，以将电荷转移到具有减小的横向电荷扩展的第一表面的区域。

公开(公告)号：US20050201149A1

公开(公告)日：2005-09-15

申请号：US11018572

申请日：2004-12-21

Applicant: Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

Inventor： Xiangfeng Duan ,  Calvin Chow ,  David Heald ,  Chunming Niu ,  J. Parce ,  David Stumbo

IPC: G11C16/04 ,  H01L21/28 ,  H01L29/423 ,  H01L29/788

CPC classification number: G11C11/56 ,  B82Y10/00 ,  G03G5/00 ,  G03G5/02 ,  G03G5/04 ,  G03G5/043 ,  G03G5/08 ,  G03G5/082 ,  G03G5/08214 ,  G11C13/02 ,  G11C13/025 ,  G11C2213/17 ,  G11C2213/18 ,  G11C2216/08 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42332 ,  H01L29/7881 ,  H01L29/7887 ,  Y10S977/936 ,  Y10S977/943

Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.

Abstract translation: 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面，存储器件包括衬底，衬底的源极区域和衬底的漏极区域。 纳米元素的群体沉积在通道区域上方的衬底上，在一个实施方案中纳米的群体包括金属量子点。 隧道介电层形成在覆盖沟道区的衬底上，金属迁移势垒层沉积在电介质层上。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在包括具有多个离散能级的一个或多个量子点或分子的多状态存储器件中，公开了一种用于对该器件进行充电和/或放电的方法，该方法包括填充每个点或分子的多个离散能级中的每一个 与一个或多个电子，并随后从一个或多个点或分子的每个离散能级一次去除单个电子。

公开(公告)号：US06783702B2

公开(公告)日：2004-08-31

申请号：US09903189

申请日：2001-07-11

Applicant: Chunming Niu ,  Lein Ngaw ,  Alan Fischer ,  Robert Hoch

Inventor： Chunming Niu ,  Lein Ngaw ,  Alan Fischer ,  Robert Hoch

IPC: H01G124

CPC classification number: C08J3/212 ,  B82Y10/00 ,  B82Y30/00 ,  C08J2327/16 ,  C08K7/24 ,  H01B1/24 ,  Y10S977/742 ,  Y10S977/788 ,  C08L27/16

Abstract: An electrically conductive composite comprising a polyvinylidene fluoride polymer or copolymer and carbon nanotubes is provided. Preferably, carbon nanotubes may be present in the range of about 0.5-20% by weight of the composite. The composites are prepared by dissolving the polymer in a first solvent to form a polymer solution and then adding the carbon nanotubes into the solution. The solution is mixed using an energy source such as a sonicator or a Waring blender. A precipitating component is added to precipitate out a composite comprising the polymer and the nanotubes. The composite is isolated by filtering the solution and drying the composite.

Abstract translation: 提供了包含聚偏二氟乙烯聚合物或共聚物和碳纳米管的导电复合材料。 优选地，碳纳米管可以在复合材料的约0.5-20重量％的范围内。通过将聚合物溶解在第一溶剂中以形成聚合物溶液，然后将碳纳米管加入到溶液中来制备复合材料。 使用诸如超声波发生器或Waring混合器的能量源将溶液混合。 加入沉淀组分以沉淀出包含聚合物和纳米管的复合材料。 通过过滤溶液并干燥复合物来分离复合物。