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公开(公告)号:US08945990B2
公开(公告)日:2015-02-03
申请号:US13454115
申请日:2012-04-24
申请人: Holger Torwesten , Manfred Mengel , Stefan Schmid , Soon Lock Goh , Swee Kah Lee
发明人: Holger Torwesten , Manfred Mengel , Stefan Schmid , Soon Lock Goh , Swee Kah Lee
IPC分类号: H01L21/00
CPC分类号: H01L23/3121 , H01L23/296 , H01L23/3142 , H01L23/492 , H01L23/49513 , H01L23/49582 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L2224/29139 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48609 , H01L2224/48611 , H01L2224/48639 , H01L2224/48709 , H01L2224/48711 , H01L2224/48739 , H01L2224/48809 , H01L2224/48811 , H01L2224/48839 , H01L2224/73265 , H01L2224/83191 , H01L2224/83193 , H01L2224/83411 , H01L2224/83439 , H01L2224/83805 , H01L2224/85205 , H01L2224/85207 , H01L2224/85214 , H01L2224/85409 , H01L2224/85411 , H01L2224/85439 , H01L2224/85805 , H01L2224/8592 , H01L2224/85939 , H01L2924/00011 , H01L2924/01047 , H01L2924/01322 , H01L2924/12032 , H01L2924/12042 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13091 , H01L2924/15747 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/01028 , H01L2924/01082 , H01L2924/01029 , H01L2924/01046 , H01L2924/0105 , H01L2224/83205
摘要: Embodiments provide a method of forming a chip package. The method may include attaching at least one chip on a carrier, the chip including a plurality of chip pads on a surface of the chip opposite to the carrier; depositing a first adhesion layer on the carrier and on the chip pads of the chip, the first adhesion layer including tin or indium; depositing a second adhesion layer on the first adhesion layer, the second adhesion layer including a silane organic material; and depositing a lamination layer or an encapsulation layer on the second adhesion layer and the chip.
摘要翻译: 实施例提供了形成芯片封装的方法。 该方法可以包括在载体上附加至少一个芯片,该芯片包括在芯片的与载体相对的表面上的多个芯片焊盘; 在所述载体上和所述芯片的所述芯片焊盘上沉积第一粘合层,所述第一粘附层包括锡或铟; 在第一粘合层上沉积第二粘合层,第二粘合层包括硅烷有机材料; 以及在所述第二粘合层和所述芯片上沉积层压层或封装层。
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公开(公告)号:US08709876B2
公开(公告)日:2014-04-29
申请号:US13610268
申请日:2012-09-11
IPC分类号: H01L21/00
CPC分类号: H01L23/53238 , H01L24/03 , H01L2224/0361 , H01L2224/03912 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/11906 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/05042 , H01L2924/19042 , H01L2924/00014
摘要: An electronic device is disclosed. In one embodiment, the electronic device includes a substrate, a plurality of conducting lines formed on a first conducting material that is disposed on the substrate, and a layer of a second conducting material disposed on the plurality of conducting lines. The conducting lines include a top face and a side face. The layer of the second conducting material includes a first thickness disposed on each of the top faces and a second thickness disposed on each of the side faces. To this end, the first thickness is greater than the second thickness.
摘要翻译: 公开了一种电子设备。 在一个实施例中,电子设备包括衬底,形成在设置在衬底上的第一导电材料上的多条导电线和设置在多条导线上的第二导电材料层。 导线包括顶面和侧面。 第二导电材料的层包括设置在每个顶面上的第一厚度和设置在每个侧面上的第二厚度。 为此,第一厚度大于第二厚度。
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公开(公告)号:US20070246133A1
公开(公告)日:2007-10-25
申请号:US10580740
申请日:2004-11-17
申请人: Johann Helneder , Holger Torwesten
发明人: Johann Helneder , Holger Torwesten
IPC分类号: C25D7/00
CPC分类号: H01L24/11 , H01L21/2885 , H01L24/13 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/03914 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/05166 , H01L2224/05184 , H01L2224/05572 , H01L2224/05655 , H01L2224/1147 , H01L2224/11472 , H01L2224/13023 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2924/0001 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01052 , H01L2924/01058 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/1306 , H01L2924/14 , H01L2924/19043 , H01L2924/00014 , H01L2924/00
摘要: A method for electroplating is provided in which a copper layer is patterned using a resist. A barrier layer lies below the copper layer and is used to supply the electroplating current in regions without the copper layer. The method makes it possible to produce high-quality soldering bumps.
摘要翻译: 提供了一种电镀方法,其中使用抗蚀剂对铜层进行图案化。 阻挡层位于铜层的下方,用于在没有铜层的区域中提供电镀电流。 该方法可以生产高质量的焊锡凸块。
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公开(公告)号:US20060214265A1
公开(公告)日:2006-09-28
申请号:US11368254
申请日:2006-03-03
申请人: Thomas Goebel , Johann Helneder , Heinrich Korner , Andrea Mitchell , Markus Schwerd , Martin Seck , Holger Torwesten
发明人: Thomas Goebel , Johann Helneder , Heinrich Korner , Andrea Mitchell , Markus Schwerd , Martin Seck , Holger Torwesten
IPC分类号: H01L29/00
CPC分类号: H01L28/40 , H01L21/31687 , H01L23/5223 , H01L23/5228 , H01L27/016 , H01L27/0802 , H01L27/0805 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要: An integrated circuit and fabrication method are presented. The integrated circuit includes a capacitor containing a base electrode, a covering electrode, and a dielectric between the base and covering electrodes. The dielectric contains an oxide of a material contained in the base electrode, which may be produced by anodic oxidation. A peripheral edge of the dielectric is uncovered by the covering electrode. A base layer on the capacitor includes a cutout adjacent to the dielectric. During fabrication, the base layer protects the material of the base electrode that is to be anodically oxidized from chemicals, and also protects the surrounding regions from anodic oxidation. A precision resistor may be fabricated simultaneously with the capacitor.
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公开(公告)号:US20140001634A1
公开(公告)日:2014-01-02
申请号:US13534144
申请日:2012-06-27
申请人: Holger Torwesten , Manfred Mengel
发明人: Holger Torwesten , Manfred Mengel
CPC分类号: H01L24/83 , H01L21/561 , H01L23/293 , H01L23/3121 , H01L23/49513 , H01L23/49582 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/92 , H01L2224/0346 , H01L2224/0401 , H01L2224/04026 , H01L2224/04042 , H01L2224/04105 , H01L2224/05568 , H01L2224/05582 , H01L2224/05611 , H01L2224/05618 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05664 , H01L2224/05666 , H01L2224/05672 , H01L2224/06181 , H01L2224/12105 , H01L2224/131 , H01L2224/2731 , H01L2224/27332 , H01L2224/27334 , H01L2224/29082 , H01L2224/29105 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/29116 , H01L2224/29118 , H01L2224/2912 , H01L2224/29139 , H01L2224/29144 , H01L2224/29155 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/32245 , H01L2224/48245 , H01L2224/48247 , H01L2224/73253 , H01L2224/73265 , H01L2224/83192 , H01L2224/83439 , H01L2224/83447 , H01L2224/83825 , H01L2224/83855 , H01L2224/92 , H01L2224/9202 , H01L2224/92143 , H01L2224/92147 , H01L2224/94 , H01L2224/95 , H01L2924/00014 , H01L2924/07802 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/15747 , H01L2924/181 , H01L2224/83 , H01L2224/03 , H01L2224/11 , H01L21/56 , H01L2924/014 , H01L2924/0665 , H01L2924/00 , H01L2224/05552
摘要: A method for manufacturing a chip package is provided, the method including: forming a layer arrangement over a carrier; arranging a chip including one or more contact pads over the layer arrangement wherein the chip covers at least part of the layer arrangement; and selectively removing one or more portions of the layer arrangement and using the chip as a mask such that at least part of the layer arrangement covered by the chip is not removed.
摘要翻译: 提供了一种用于制造芯片封装的方法,所述方法包括:在载体上形成层布置; 在所述层布置上布置包括一个或多个接触垫的芯片,其中所述芯片覆盖所述层布置的至少一部分; 以及选择性地去除所述层布置的一个或多个部分并使用所述芯片作为掩模,使得所述芯片所覆盖的层布置的至少一部分不被去除。
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16.
公开(公告)号:US08367514B2
公开(公告)日:2013-02-05
申请号:US12696811
申请日:2010-01-29
申请人: Thomas Goebel , Johann Helneder , Heinrich Körner , Andrea Mitchell , Markus Schwerd , Martin Seck , Holger Torwesten
发明人: Thomas Goebel , Johann Helneder , Heinrich Körner , Andrea Mitchell , Markus Schwerd , Martin Seck , Holger Torwesten
IPC分类号: H01L21/302
CPC分类号: H01L28/40 , H01L21/31687 , H01L23/5223 , H01L23/5228 , H01L27/016 , H01L27/0802 , H01L27/0805 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要: An integrated circuit and fabrication method are presented. The integrated circuit includes a capacitor containing a base electrode, a covering electrode, and a dielectric between the base and covering electrodes. The dielectric contains an oxide of a material contained in the base electrode, which may be produced by anodic oxidation. A peripheral edge of the dielectric is uncovered by the covering electrode. A base layer on the capacitor includes a cutout adjacent to the dielectric. During fabrication, the base layer protects the material of the base electrode that is to be anodically oxidized from chemicals, and also protects the surrounding regions from anodic oxidation. A precision resistor may be fabricated simultaneously with the capacitor.
摘要翻译: 提出了一种集成电路和制造方法。 集成电路包括在基极和覆盖电极之间包含基极,覆盖电极和电介质的电容器。 电介质包含可以通过阳极氧化产生的基极中包含的材料的氧化物。 电介质的外围边缘被覆盖电极覆盖。 电容器上的基极层包括与电介质相邻的切口。 在制造过程中,基层保护待化学物质被阳极氧化的基底材料,并且保护周围区域免受阳极氧化。 可以与电容器同时制造精密电阻器。
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公开(公告)号:US07755190B2
公开(公告)日:2010-07-13
申请号:US11835123
申请日:2007-08-07
CPC分类号: H01L23/49575 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05147 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/1147 , H01L2224/13099 , H01L2224/16145 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/48644 , H01L2224/48655 , H01L2224/48664 , H01L2224/48755 , H01L2224/48764 , H01L2224/48844 , H01L2224/48855 , H01L2224/48864 , H01L2224/73257 , H01L2225/0651 , H01L2225/06517 , H01L2225/06568 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01016 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01068 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04953 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , Y10T428/24752 , Y10T428/265 , Y10T428/31678 , H01L2924/00014 , H01L2924/00 , H01L2224/48744 , H01L2924/00012
摘要: An electronic device and the production thereof is disclosed. One embodiment includes an integrated component having a layer containing a nickel-palladium alloy.
摘要翻译: 公开了电子设备及其生产。 一个实施例包括具有包含镍 - 钯合金的层的集成部件。
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18.
公开(公告)号:US07692266B2
公开(公告)日:2010-04-06
申请号:US11368254
申请日:2006-03-03
申请人: Thomas Goebel , Johann Helneder , Heinrich Körner , Andrea Mitchell , Markus Schwerd , Martin Seck , Holger Torwesten
发明人: Thomas Goebel , Johann Helneder , Heinrich Körner , Andrea Mitchell , Markus Schwerd , Martin Seck , Holger Torwesten
IPC分类号: H01L29/43
CPC分类号: H01L28/40 , H01L21/31687 , H01L23/5223 , H01L23/5228 , H01L27/016 , H01L27/0802 , H01L27/0805 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要: An integrated circuit and fabrication method are presented. The integrated circuit includes a capacitor containing a base electrode, a covering electrode, and a dielectric between the base and covering electrodes. The dielectric contains an oxide of a material contained in the base electrode, which may be produced by anodic oxidation. A peripheral edge of the dielectric is uncovered by the covering electrode. A base layer on the capacitor includes a cutout adjacent to the dielectric. During fabrication, the base layer protects the material of the base electrode that is to be anodically oxidized from chemicals, and also protects the surrounding regions from anodic oxidation. A precision resistor may be fabricated simultaneously with the capacitor.
摘要翻译: 提出了一种集成电路和制造方法。 集成电路包括在基极和覆盖电极之间包含基极,覆盖电极和电介质的电容器。 电介质包含可以通过阳极氧化产生的基极中包含的材料的氧化物。 电介质的外围边缘被覆盖电极覆盖。 电容器上的基极层包括与电介质相邻的切口。 在制造过程中,基层保护待化学物质被阳极氧化的基底材料,并且保护周围区域免受阳极氧化。 可以与电容器同时制造精密电阻器。
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公开(公告)号:US20090102032A1
公开(公告)日:2009-04-23
申请号:US11876271
申请日:2007-10-22
IPC分类号: H01L23/495 , H01L21/44 , H01L23/52
CPC分类号: H01L23/53238 , H01L24/03 , H01L2224/0361 , H01L2224/03912 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/11906 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/05042 , H01L2924/19042 , H01L2924/00014
摘要: An electronic device is disclosed. In one embodiment, the electronic device includes a substrate, a plurality of conducting lines formed on a first conducting material that is disposed on the substrate, and a layer of a second conducting material disposed on the plurality of conducting lines. The conducting lines include a top face and a side face. The layer of the second conducting material includes a first thickness disposed on each of the top faces and a second thickness disposed on each of the side faces. To this end, the first thickness is greater than the second thickness.
摘要翻译: 公开了一种电子设备。 在一个实施例中,电子设备包括衬底,形成在设置在衬底上的第一导电材料上的多条导电线和设置在多条导线上的第二导电材料层。 导线包括顶面和侧面。 第二导电材料的层包括设置在每个顶面上的第一厚度和设置在每个侧面上的第二厚度。 为此,第一厚度大于第二厚度。
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公开(公告)号:US20080081157A1
公开(公告)日:2008-04-03
申请号:US11835123
申请日:2007-08-07
CPC分类号: H01L23/49575 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05147 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/1147 , H01L2224/13099 , H01L2224/16145 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/48644 , H01L2224/48655 , H01L2224/48664 , H01L2224/48755 , H01L2224/48764 , H01L2224/48844 , H01L2224/48855 , H01L2224/48864 , H01L2224/73257 , H01L2225/0651 , H01L2225/06517 , H01L2225/06568 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01016 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01068 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04953 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , Y10T428/24752 , Y10T428/265 , Y10T428/31678 , H01L2924/00014 , H01L2924/00 , H01L2224/48744 , H01L2924/00012
摘要: An electronic device and the production thereof is disclosed. One embodiment includes an integrated component having a layer containing a nickel-palladium alloy.
摘要翻译: 公开了电子设备及其生产。 一个实施例包括具有包含镍 - 钯合金的层的集成部件。
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