公开(公告)号：US20220199593A1

公开(公告)日：2022-06-23

申请号：US17492693

申请日：2021-10-04

申请人： MEDIATEK INC.

发明人： Bo-Jiun Yang ,  Wen-Sung Hsu ,  Tai-Yu Chen ,  Shih-Chin Lin ,  Kun-Ting Hung

IPC分类号： H01L25/10 ,  H01L25/065

摘要： A semiconductor device includes a bottom package, a top package stacked on the bottom package, and an interposer disposed between the bottom package and the top package. The top package is electrically connected to the interposer through a plurality of peripheral solder balls. At least a dummy thermal feature is disposed on the interposer and surrounded by the plurality of peripheral solder balls.

公开(公告)号：US20220115303A1

公开(公告)日：2022-04-14

申请号：US17460352

申请日：2021-08-30

申请人： MEDIATEK INC.

发明人： Chin-Chiang Chang ,  Yin-Fa Chen ,  Shih-Chin Lin

IPC分类号： H01L23/495 ,  H01L23/31 ,  H01L23/00

摘要： A semiconductor package includes a die attach pad, a plurality of lead terminals positioned about the die attach pad and disposed along side edges of the semiconductor package, a semiconductor die mounted on the die attach pad, a molding compound encapsulating the plurality of lead terminals and the semiconductor die, and at least one dummy lead disposed in a corner region of the semiconductor package between the plurality of lead terminals.

公开(公告)号：US09881902B2

公开(公告)日：2018-01-30

申请号：US15162724

申请日：2016-05-24

申请人： MEDIATEK Inc.

发明人： Wen-Sung Hsu ,  Shih-Chin Lin ,  Tao Cheng

IPC分类号： H01L25/16 ,  H01L25/065 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L25/10 ,  H01L25/00 ,  H01L21/52

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/52 ,  H01L21/568 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48235 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

摘要： A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.

公开(公告)号：US20170084541A1

公开(公告)日：2017-03-23

申请号：US15162760

申请日：2016-05-24

申请人： MEDIATEK Inc.

发明人： Wen-Sung Hsu ,  Shih-Chin Lin ,  Tao Cheng ,  Andrew C. Chang

IPC分类号： H01L23/538 ,  H01L21/56 ,  H01L25/00 ,  H01L21/48 ,  H01L23/31 ,  H01L25/10

CPC分类号： H01L23/5389 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L23/145 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/10 ,  H01L25/105 ,  H01L25/16 ,  H01L25/162 ,  H01L25/165 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2224/45099

摘要： A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.

公开(公告)号：US20160263709A1

公开(公告)日：2016-09-15

申请号：US14918698

申请日：2015-10-21

申请人： MEDIATEK Inc.

发明人： Tao Cheng ,  Wen-Sung Hsu ,  Shih-Chin Lin

IPC分类号： B23K35/02 ,  B23K35/26 ,  B23K35/30 ,  H01L23/00

CPC分类号： B23K35/0244 ,  B23K35/26 ,  B23K35/262 ,  B23K35/264 ,  B23K35/30 ,  B23K2101/40 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/13014 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13561 ,  H01L2224/13582 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/014 ,  H01L2924/1434 ,  H01L2924/15331 ,  H01L2924/2076 ,  H01L2924/00

摘要： A semiconductor package includes a first substrate, a second substrate, a composite solder ball and a first semiconductor component. The composite solder ball includes a core, an encapsulating layer and a barrier layer. The composite solder ball is disposed between the first substrate and the second substrate for electrically connecting the first substrate and the second substrate. The barrier layer is disposed between the core and the encapsulating layer. Wherein a melting point of the barrier layer is higher than a melting point of the core, the melting point of the core is higher than a melting point of the encapsulating layer. The first semiconductor component is disposed between the first substrate and the second substrate.

摘要翻译： 半导体封装包括第一基板，第二基板，复合焊球和第一半导体部件。 复合焊球包括芯，封装层和阻挡层。 复合焊球设置在第一基板和第二基板之间，用于电连接第一基板和第二基板。 阻挡层设置在芯和封装层之间。 其中阻挡层的熔点高于芯的熔点，芯的熔点高于封装层的熔点。 第一半导体部件设置在第一基板和第二基板之间。

公开(公告)号：US12118653B2

公开(公告)日：2024-10-15

申请号：US17944415

申请日：2022-09-14

申请人： MediaTek Inc.

发明人： Po-Yu Huang ,  Shih-Chin Lin ,  Jen-Jung Cheng ,  Tu-Hsiu Lee

IPC分类号： G06T15/00 ,  G06T1/20 ,  G06T7/50

CPC分类号： G06T15/005 ,  G06T1/20 ,  G06T7/50

摘要： A system, method, and computer program product are provided for reducing GPU load by programmatically controlling shading rates in computer graphics. GPU load may be reduced by applying different shading rates to different screen regions. By reading the depth buffer of previous frames and performing image processing, thresholds may be calculated that control the shading rates. The approach may be run on any platform that supports VRS hardware and primitive- or image-based VRS. The approach may be applied on a graphics driver installed on a client device, in a firmware layer between hardware and a driver, in a software layer between a driver and an application, or in hardware on the client device. The approach is flexible and adaptable and calculates and sets the variable rate shading based on the graphics generated by an application without requiring the application developer to manually set variable rate shading.

公开(公告)号：US12021068B2

公开(公告)日：2024-06-25

申请号：US17492693

申请日：2021-10-04

申请人： MEDIATEK INC.

发明人： Bo-Jiun Yang ,  Wen-Sung Hsu ,  Tai-Yu Chen ,  Shih-Chin Lin ,  Kun-Ting Hung

IPC分类号： H01L23/02 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L25/105 ,  H01L25/0657 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094

摘要： A semiconductor device includes a bottom package, a top package stacked on the bottom package, and an interposer disposed between the bottom package and the top package. The top package is electrically connected to the interposer through a plurality of peripheral solder balls. At least a dummy thermal feature is disposed on the interposer and surrounded by the plurality of peripheral solder balls.

公开(公告)号：US20180114779A1

公开(公告)日：2018-04-26

申请号：US15848083

申请日：2017-12-20

申请人： MEDIATEK Inc.

发明人： Wen-Sung Hsu ,  Shih-Chin Lin ,  Tao Cheng

IPC分类号： H01L25/065 ,  H01L25/10 ,  H01L21/56 ,  H01L21/52 ,  H01L23/498 ,  H01L25/00 ,  H01L23/538 ,  H01L21/48

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/52 ,  H01L21/568 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48235 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

摘要： A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.

公开(公告)号：US09761534B2

公开(公告)日：2017-09-12

申请号：US15162760

申请日：2016-05-24

申请人： MEDIATEK Inc.

发明人： Wen-Sung Hsu ,  Shih-Chin Lin ,  Tao Cheng ,  Andrew C. Chang

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/538 ,  H01L23/31 ,  H01L25/10 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/14 ,  H01L25/065 ,  H01L25/16 ,  H01L23/50 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L23/5389 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L23/145 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/10 ,  H01L25/105 ,  H01L25/16 ,  H01L25/162 ,  H01L25/165 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2224/45099

摘要： A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.

公开(公告)号：US20170213315A1

公开(公告)日：2017-07-27

申请号：US15242478

申请日：2016-08-19

申请人： MediaTek Inc.

发明人： Ying-Chieh Chen ,  I-Hsuan Lu ,  Shih-Chin Lin

IPC分类号： G06T1/60 ,  G06T11/60

CPC分类号： G06T1/60 ,  G06T11/40 ,  G06T11/60

摘要： A graphics processing unit (GPU) renders graphical objects into a group of pixels and stores the pixels in an on-chip buffer on the same chip as the GPU. Each pixel has an alpha value that indicates transparency of the pixel. The GPU reads the alpha value of each pixel from the on-chip buffer. According to alpha values of the group of pixels, the GPU generates an alpha hint in the system memory for the group of pixels. The alpha hint represents an aggregate of the alpha values of the group of pixels. The GPU then stores the group of pixels into a frame buffer in the system memory.