公开(公告)号：US07348230B2

公开(公告)日：2008-03-25

申请号：US11008276

申请日：2004-12-10

申请人： Shuji Matsuo ,  Katsuhiro Uchimura ,  Yasuko Yoshida ,  Kota Funayama ,  Yutaka Takeshima

发明人： Shuji Matsuo ,  Katsuhiro Uchimura ,  Yasuko Yoshida ,  Kota Funayama ,  Yutaka Takeshima

IPC分类号： H01L21/336

CPC分类号： H01L29/665 ,  H01L21/28518 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/823814 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7842

摘要： A method of manufacture of a semiconductor device includes forming a gate insulating film and a gate electrode made of polycrystalline silicon over a semiconductor substrate; implanting ions into the semiconductor substrate to form a semiconductor region as a source or drain; forming a cobalt film and a titanium nitride film over the semiconductor substrate to cover the gate electrode; carrying out annealing to cause a reaction between Co and Si and the semiconductor region to form a CoSi layer; carrying out wet cleaning to remove the titanium nitride film and unreacted cobalt film to leave the CoSi layer over the gate electrode and semiconductor region; carrying out annealing to cause a reaction between the CoSi layer and the gate electrode and semiconductor region to form a CoSi2 layer; carrying out HPM cleaning; and forming over the semiconductor substrate a silicon nitride film by low-pressure CVD to cover the gate electrode.

摘要翻译： 一种制造半导体器件的方法包括在半导体衬底上形成栅极绝缘膜和由多晶硅制成的栅电极; 将离子注入到半导体衬底中以形成作为源极或漏极的半导体区域; 在所述半导体衬底上形成钴膜和氮化钛膜以覆盖所述栅电极; 进行退火以引起Co和Si之间的反应以及半导体区域以形成CoSi层; 进行湿式清洗以除去氮化钛膜和未反应的钴膜，使CoSi层离开栅极电极和半导体区域; 进行退火以引起CoSi层和栅极电极和半导体区域之间的反应以形成CoSi 2 O 3层; 进行HPM清洗; 以及通过低压CVD在半导体衬底上形成氮化硅膜以覆盖栅电极。

公开(公告)号：US20060128094A1

公开(公告)日：2006-06-15

申请号：US11342695

申请日：2006-01-31

申请人： Akio Nishida ,  Yasuko Yoshida ,  Shuji Ikeda

发明人： Akio Nishida ,  Yasuko Yoshida ,  Shuji Ikeda

IPC分类号： H01L21/8242

CPC分类号： H01L27/11 ,  H01L27/1104

摘要： In order to provide a semiconductor integrated circuit device such as a high-performance semiconductor integrated circuit device capable of reducing a soft error developed in each memory cell of a SRAM, the surface of a wiring of a cross-connecting portion, of a SRAM memory cell having a pair of n-channel type MISFETs whose gate electrodes and drains are respectively cross-connected, is formed in a shape that protrudes from the surface of a silicon oxide film. A silicon nitride film used as a capacitive insulating film, and an upper electrode are formed on the wiring. A capacitance can be formed of the wiring, the silicon nitride film and the upper electrode.

摘要翻译： 为了提供一种半导体集成电路器件，例如能够减少在SRAM的每个存储单元中产生的软错误的高性能半导体集成电路器件，SRAM存储器的交叉连接部分的布线表面 其栅电极和漏极分别交叉连接的一对n沟道型MISFET形成为从氧化硅膜的表面突出的形状。 在布线上形成用作电容绝缘膜的氮化硅膜和上电极。 电容可以由布线，氮化硅膜和上电极形成。

公开(公告)号：US06403446B1

公开(公告)日：2002-06-11

申请号：US09536447

申请日：2000-03-28

申请人： Norio Ishitsuka ,  Hideo Miura ,  Shuji Ikeda ,  Yasuko Yoshida ,  Norio Suzuki ,  Masayuki Kojima ,  Kota Funayama

发明人： Norio Ishitsuka ,  Hideo Miura ,  Shuji Ikeda ,  Yasuko Yoshida ,  Norio Suzuki ,  Masayuki Kojima ,  Kota Funayama

IPC分类号： H01L2176

CPC分类号： H01L21/76232 ,  Y10S148/05

摘要： Manufacturing a semiconductor device avoiding an increase of transistor leak current or reduction of the withstanding voltage characteristics is by at least one of: The pad oxide film is removed along the substrate surface from the upper edge of the groove over a distance ranging from 5 to 40 nm: The exposed surface of the semiconductor substrate undergoes removal by isotropic etching within 20 nm; and oxidizing a groove portion formed in a semiconductor substrate in an oxidation environment with a gas ratio of hydrogen (H2) to oxygen (O2) being less than or equal to 0.5, an increase of the curvature radius beyond 3nm is achieved without associating the risk of creation of any level difference on the substrate surface at or near the upper groove edge portions in a groove separation structure. This eliminates either an increase of transistor leak current or reduction of the withstanding voltage characteristics thereof otherwise occurring due to local electric field concentration near or around the terminate ends of a gate electrode film which in turn leads to an ability to improve electrical reliability of transistors used.

摘要翻译： 制造半导体器件避免晶体管泄漏电流的增加或耐压特性的降低是至少以下之一：衬垫氧化膜沿着衬底表面从沟槽的上边缘移除5至40的距离 nm：通过各向同性蚀刻在20nm内去除半导体衬底的暴露表面; 并且在氧（H2）与氧气（O2）的气体比小于或等于0.5的氧化环境中氧化形成在半导体衬底中的沟槽部分，实现曲率半径超过3nm的增加，而不会使风险 在槽分离结构中的上槽边缘部分处或附近在基板表面上产生任何水平差。 这消除了晶体管泄漏电流的增加或由于栅极电极膜的端部附近或周围的局部电场浓度而导致的耐压特性的降低，这进而导致提高使用的晶体管的电可靠性的能力 。

公开(公告)号：US5880497A

公开(公告)日：1999-03-09

申请号：US592235

申请日：1996-01-26

申请人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

发明人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

IPC分类号： H01L27/11

CPC分类号： H01L27/1108 ,  Y10S257/903 ,  Y10S257/904

摘要： A SRAM having its memory cell constructed to include transfer MISFETs to be controlled by word lines and a flip-flop circuit having driver MISFETs and load MISFETs. Plate electrodes of large area fixed on predetermined power source lines are arranged over the load MISFETs such that the plate electrodes over the offset region of the load MISFETs are formed with an opening. A silicon nitride film having a thickness permeable to hydrogen but not to humidity is formed over the transfer MISFETs and the driver MISFETs formed over the main surface of a semiconductor substrate and the load MISFETs formed of a polycrystalline silicon film deposited on the driver MISFETs.

摘要翻译： 其存储单元被构造成包括由字线控制的转移MISFET和具有驱动器MISFET和负载MISFET的触发器电路的SRAM。 固定在预定电源线上的大面积平板电极布置在负载MISFET上，使得负载MISFET的偏移区域上的平板电极形成开口。 在半导体衬底的主表面上形成的转移MISFET和驱动器MISFET上形成具有可渗透氢而不湿度的氮化硅膜，以及沉积在驱动器MISFET上的多晶硅膜形成的负载MISFET。

公开(公告)号：US5508540A

公开(公告)日：1996-04-16

申请号：US190596

申请日：1994-02-02

申请人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

发明人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

IPC分类号： H01L27/11 ,  H01L27/108 ,  H01L29/04 ,  H01L29/76

CPC分类号： H01L27/1108 ,  Y10S257/903 ,  Y10S257/904

摘要： A SRAM having its memory cell constructed to include transfer MISFETs to be controlled by word lines and a flip-flop circuit having driver MISFETs and load MISFETs. Plate electrodes of large area fixed on predetermined power source lines are arranged over the load MISFETs such that the plate electrodes over the offset region of the load MISFETs are formed with an opening. A silicon nitride film having a thickness permeable to hydrogen but not to humidity is formed over the transfer MISFETs and the driver MISFETs formed over the main surface of a semiconductor substrate and the load MISFETs formed of a polycrystalline silicon film deposited on the driver MISFETs.

摘要翻译： 其存储单元被构造成包括由字线控制的转移MISFET和具有驱动器MISFET和负载MISFET的触发器电路的SRAM。 固定在预定电源线上的大面积平板电极布置在负载MISFET上，使得负载MISFET的偏移区域上的平板电极形成开口。 在半导体衬底的主表面上形成的转移MISFET和驱动器MISFET上形成具有可渗透氢而不湿度的氮化硅膜，以及沉积在驱动器MISFET上的多晶硅膜形成的负载MISFET。

公开(公告)号：US5143847A

公开(公告)日：1992-09-01

申请号：US441475

申请日：1989-11-27

申请人： Mitsuo Kawase ,  Yasuko Yoshida ,  Hitoshi Yonekawa

发明人： Mitsuo Kawase ,  Yasuko Yoshida ,  Hitoshi Yonekawa

IPC分类号： C12M1/40 ,  C12N11/14

CPC分类号： C12M21/18 ,  C12M25/18

摘要： An enzyme-fixed bioreactor, including a reaction column, enzyme-fixed catalyst particles uniformly and densely filled in the reaction column, the catalyst particles being composed of carrier sepiolite particles consisting essentially of sepiolite and an enzyme carried on the surface of the carrier sepiolite particles. The bioreactor has stable heat resistant and chemical properties, high productivity, and is economically superior to prior art, without fear of destruction of the catalyst, short path, and clogging in the reaction column.

摘要翻译： 一种酶固定生物反应器，包括反应柱，酶固定的催化剂颗粒，均匀且密集地填充在反应塔中，催化剂颗粒由主要由海泡石组成的载体海泡石颗粒和承载在载体海泡石颗粒表面上的酶组成 。 该生物反应器具有稳定的耐热性和化学性质，高生产率，并且在经济上优于现有技术，而不用担心催化剂破坏，短路径和反应柱堵塞。

公开(公告)号：US20090218608A1

公开(公告)日：2009-09-03

申请号：US12362995

申请日：2009-01-30

申请人： Akio NISHIDA ,  Yasuko Yoshida ,  Shuji Ikeda

发明人： Akio NISHIDA ,  Yasuko Yoshida ,  Shuji Ikeda

IPC分类号： H01L27/11

CPC分类号： H01L27/11 ,  H01L27/1104

摘要： In order to provide a semiconductor integrated circuit device such as a high-performance semiconductor integrated circuit device capable of reducing a soft error developed in each memory cell of a SRAM, the surface of a wiring of a cross-connecting portion, of a SRAM memory cell having a pair of n-channel type MISFETs whose gate electrodes and drains are respectively cross-connected, is formed in a shape that protrudes from the surface of a silicon oxide film. A silicon nitride film used as a capacitive insulating film, and an upper electrode are formed on the wiring. A capacitance can be formed of the wiring, the silicon nitride film and the upper electrode.

摘要翻译： 为了提供一种半导体集成电路器件，例如能够减少在SRAM的每个存储单元中产生的软错误的高性能半导体集成电路器件，SRAM存储器的交叉连接部分的布线表面 其栅电极和漏极分别交叉连接的一对n沟道型MISFET形成为从氧化硅膜的表面突出的形状。 在布线上形成用作电容绝缘膜的氮化硅膜和上电极。 电容可以由布线，氮化硅膜和上电极形成。

公开(公告)号：US20080268453A1

公开(公告)日：2008-10-30

申请号：US12068434

申请日：2008-02-06

申请人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

发明人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

IPC分类号： C12Q1/68 ,  C07K16/00 ,  C07H21/00 ,  C40B40/08

CPC分类号： C12Q1/6881 ,  C12Q1/6886 ,  C12Q2600/118 ,  C12Q2600/178

摘要： A method for determining the prognosis of a CD5+DLBCL patient and a CD5-DLBCL patient is provided. It is determined that, in the chromosomal DNA from a patient with lymphoma, (1) the prognosis of the CD5+DLBCL patient with amplification of 13q21.1-q31.3 region is poor; (2) the prognosis of the CD5+DLBCL patient with deletion of 1p36.21-p36.13 region is poor; and (3) the prognosis of the CD5-DLBCL patient with amplification of 5p15.33-p14.2 region is good.

摘要翻译： 提供了一种确定CD5 + DLBCL患者和CD5-DLBCL患者预后的方法。 确定在淋巴瘤患者的染色体DNA中，（1）扩增13q21.1-q31.3区域的CD5 + DLBCL患者的预后差; （2）缺失1p36.21-p36.13区域的CD5 + DLBCL患者的预后差; 和（3）扩增5p15.33-p14.2区域的CD5-DLBCL患者的预后良好。

公开(公告)号：US07323555B2

公开(公告)日：2008-01-29

申请号：US10746157

申请日：2003-12-24

申请人： Isao Saito ,  Akimitsu Okamoto ,  Yasuko Yoshida

发明人： Isao Saito ,  Akimitsu Okamoto ,  Yasuko Yoshida

IPC分类号： C07H21/02 ,  C07H21/04 ,  G01N33/53 ,  C12Q1/68

CPC分类号： C07H19/067 ,  C07H21/04 ,  Y10S436/809

摘要： A novel nucleotide derivative, in case of existing as a member of a single-stranded sequence, undergoing a change in the fluorescent signal intensity depending on the corresponding base type in the partner strand with which the single-stranded sequence is hybridized, and which is (1) a thymine/uracil derivative emitting light most intensely when a confronting base in the partner strand with which the single-stranded nucleotide sequence is hybridized is adenine; (2) a cytosine derivative emitting light most intensely when the confronting base is guanine; (3) an adenine derivative emitting light most intensely when the confronting base is cytosine; and, (4) a guanine derivative emitting light most intensely when the confronting base is cytosine or thymine/uracil.

摘要翻译： 在存在单链序列成员的情况下，新的核苷酸衍生物根据与单链序列杂交的伴侣链中的相应碱基类型经历荧光信号强度的变化，并且其是 （1）当与单链核苷酸序列杂交的配对链中的相对碱基是腺嘌呤时，最强烈地发射光的胸腺嘧啶/尿嘧啶衍生物; （2）当对面的碱是鸟嘌呤时，最强烈地发射光的胞嘧啶衍生物; （3）当面对的碱基是胞嘧啶时，最强烈地发光的腺嘌呤衍生物; 和（4）当对面的碱基是胞嘧啶或胸腺嘧啶/尿嘧啶时，最强烈地发光的鸟嘌呤衍生物。

公开(公告)号：US20050287541A1

公开(公告)日：2005-12-29

申请号：US10947249

申请日：2004-09-23

申请人： Akira Nakagawara ,  Miki Ohira ,  Shin Ishii ,  Takeshi Goto ,  Hiroyuki Kubo ,  Takahiro Hirata ,  Yasuko Yoshida ,  Saichi Yamada

发明人： Akira Nakagawara ,  Miki Ohira ,  Shin Ishii ,  Takeshi Goto ,  Hiroyuki Kubo ,  Takahiro Hirata ,  Yasuko Yoshida ,  Saichi Yamada

IPC分类号： C12M1/34 ,  C12Q1/68

CPC分类号： C12Q1/6883 ,  C12Q1/6886 ,  C12Q2600/118

摘要： A microarray for predicting the prognosis of neuroblastoma, wherein the microarray has 25 to 45 probes related to good prognosis, which are hybridized to a gene transcript whose expression is increased in a good prognosis patient with neuroblastoma and are selected from 96 polynucleotides consisting of the nucleotide sequences of Seq. ID No. 1 to 96 or their partial continuous sequences or their complementary strands, and 25 to 45 probes related to poor prognosis, which are hybridized to a gene transcript whose expression is increased in a poor prognosis patient with neuroblastoma and are selected from 104 polynucleotides consisting of the nucleotide sequences of Seq. ID No. 97 to 200 or their partial continuous sequences or their complementary strands.

摘要翻译： 一种用于预测神经母细胞瘤的预后的微阵列，其中所述微阵列具有与良好预后相关的25至45个探针，其与在具有神经母细胞瘤的良好预后患者中表达增加的基因转录物杂交，并且选自96个由核苷酸 序列Seq。 ID No.1至96或其部分连续序列或其互补链，以及与不良预后相关的25至45个探针，其与在具有神经母细胞瘤的不良预后患者中表达增加的基因转录物杂交并选自104个多核苷酸 由Seq的核苷酸序列组成。 ID号97至200或其部分连续序列或其互补链。