公开(公告)号：US09768279B2

公开(公告)日：2017-09-19

申请号：US14263479

申请日：2014-04-28

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Kosei Noda ,  Yuichi Sato ,  Yuta Endo

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L21/265 ,  H01L29/786 ,  H01L27/1156

CPC分类号： H01L29/66969 ,  H01L21/26586 ,  H01L27/1156 ,  H01L29/7869

摘要： To provide a transistor formed using an oxide semiconductor film with reduced oxygen vacancies. To provide a semiconductor device that operates at high speed. To provide a highly reliable semiconductor device. To provide a miniaturized semiconductor device. The semiconductor device includes an oxide semiconductor film; a gate electrode overlapping with the oxide semiconductor film; a gate insulating film between the oxide semiconductor film and the gate electrode; and a protective insulating film that is above the oxide semiconductor film, the gate electrode, and the gate insulating film and includes a region containing phosphorus or boron.

公开(公告)号：US09761611B2

公开(公告)日：2017-09-12

申请号：US15016451

申请日：2016-02-05

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC分类号： H01L27/12 ,  H01L29/788 ,  H01L27/1156 ,  H01L29/786 ,  H01L29/417 ,  H01L29/423

CPC分类号： H01L27/1225 ,  H01L27/1156 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78645 ,  H01L29/7869 ,  H01L29/788

摘要： A semiconductor device includes an oxide layer, a source electrode layer in contact with the oxide layer, a first drain electrode layer in contact with the oxide layer, a second drain electrode layer in contact with the oxide layer, a gate insulating film in contact with the oxide layer, a first gate electrode layer overlapping with the source electrode layer and the first drain electrode layer and overlapping with a top surface of the oxide layer with the gate insulating film interposed therebetween, a second gate electrode layer overlapping with the source electrode layer and the second drain electrode layer and overlapping with the top surface of the oxide layer with the gate insulating film interposed therebetween, and a third gate electrode layer overlapping with a side surface of the oxide layer with the gate insulating film interposed therebetween.

公开(公告)号：US20170250205A1

公开(公告)日：2017-08-31

申请号：US15592687

申请日：2017-05-11

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei YAMAZAKI

IPC分类号： H01L27/12 ,  H01L27/108 ,  H01L29/417 ,  H01L29/786

CPC分类号： H01L27/1255 ,  G11C11/404 ,  H01L27/0207 ,  H01L27/0733 ,  H01L27/10805 ,  H01L27/1085 ,  H01L27/10873 ,  H01L27/1156 ,  H01L27/1225 ,  H01L28/40 ,  H01L28/60 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

摘要： An object of the present invention is to provide a semiconductor device in which stored data can be held even when power is not supplied for a certain time. Another object is to increase the degree of integration of a semiconductor device and to increase the storage capacity per unit area. A semiconductor device is formed with a material capable of sufficiently reducing off-state current of a transistor, such as an oxide semiconductor material that is a wide-bandgap semiconductor. With the use of a semiconductor material capable of sufficiently reducing off-state current of a transistor, the semiconductor device can hold data for a long time. Furthermore, a wiring layer provided under a transistor, a high-resistance region in an oxide semiconductor film, and a source electrode are used to form a capacitor, thereby reducing the area occupied by the transistor and the capacitor.

公开(公告)号：US20170236840A1

公开(公告)日：2017-08-17

申请号：US15584068

申请日：2017-05-02

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Motomu KURATA ,  Ryota HODO ,  Shinya SASAGAWA ,  Yuki HATA

IPC分类号： H01L27/12 ,  H01L23/535 ,  H01L27/092 ,  H01L29/786 ,  H01L27/06

CPC分类号： H01L27/1207 ,  H01L21/8258 ,  H01L23/485 ,  H01L23/535 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/1156 ,  H01L27/124 ,  H01L29/24 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： To provide a semiconductor device which occupies a small area and is highly integrated. The semiconductor device includes an oxide semiconductor layer, an electrode layer, and a contact plug. The electrode layer includes one end portion in contact with the oxide semiconductor layer and the other end portion facing the one end portion. The other end portion includes a semicircle notch portion when seen from the above. The contact plug is in contact with the semicircle notch portion.

公开(公告)号：US09698169B2

公开(公告)日：2017-07-04

申请号：US15019020

申请日：2016-02-09

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Jun Koyama ,  Shunpei Yamazaki

IPC分类号： H01L29/12 ,  H01L27/12 ,  H01L27/1156 ,  G11C16/04

CPC分类号： H01L27/1225 ,  G11C16/0416 ,  H01L27/1156

摘要： An object is at least one of a longer data retention period of a memory circuit, a reduction in power consumption, a smaller circuit area, and an increase in the number of times written data can be read to one data writing operation. The memory circuit has a first field-effect transistor, a second field-effect transistor, and a rectifier element including a pair of current terminals. A data signal is input to one of a source and a drain of the first field-effect transistor. A gate of the second field-effect transistor is electrically connected to the other of the source and the drain of the first field-effect transistor. One of the pair of current terminals of the rectifier element is electrically connected to a source or a drain of the second field-effect transistor.

公开(公告)号：US09698008B2

公开(公告)日：2017-07-04

申请号：US14680159

申请日：2015-04-07

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Shunpei Yamazaki ,  Junichiro Sakata ,  Makoto Furuno

IPC分类号： H01L27/12 ,  H01L21/02 ,  H01L21/8232 ,  H01L29/786 ,  C23C14/00 ,  C23C14/08 ,  C23C14/34 ,  H01L27/06 ,  H01L27/11521 ,  H01L27/11551 ,  H01L27/1156 ,  H01L49/02 ,  H01L29/49 ,  H01L29/66

CPC分类号： H01L21/02266 ,  C23C14/0036 ,  C23C14/08 ,  C23C14/3407 ,  C23C14/3414 ,  H01L21/02112 ,  H01L21/8232 ,  H01L27/0688 ,  H01L27/11521 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1251 ,  H01L28/60 ,  H01L29/4908 ,  H01L29/66477 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78645 ,  H01L29/7869

摘要： An object is to provide a deposition method in which a gallium oxide film is formed by a DC sputtering method. Another object is to provide a method for manufacturing a semiconductor device using a gallium oxide film as an insulating layer such as a gate insulating layer of a transistor. An insulating film is formed by a DC sputtering method or a pulsed DC sputtering method, using an oxide target including gallium oxide (also referred to as GaOX). The oxide target includes GaOX, and X is less than 1.5, preferably more than or equal to 0.01 and less than or equal to 0.5, further preferably more than or equal to 0.1 and less than or equal to 0.2. The oxide target has conductivity, and sputtering is performed in an oxygen gas atmosphere or a mixed atmosphere of an oxygen gas and a rare gas such as argon.

公开(公告)号：US20170179132A1

公开(公告)日：2017-06-22

申请号：US15447672

申请日：2017-03-02

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Yoshinori IEDA ,  Atsuo ISOBE ,  Yutaka SHIONOIRI ,  Tomoaki ATSUMI

IPC分类号： H01L27/105 ,  H01L29/24 ,  H01L27/108 ,  H01L29/786 ,  H01L27/12 ,  H01L49/02

CPC分类号： H01L27/1207 ,  H01L27/092 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10805 ,  H01L27/115 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1259 ,  H01L28/40 ,  H01L29/04 ,  H01L29/16 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78 ,  H01L29/78648 ,  H01L29/7869

摘要： Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.

公开(公告)号：US20170178734A1

公开(公告)日：2017-06-22

申请号：US15244664

申请日：2016-08-23

申请人： STMicroelectronics S.r.l ,  STMicroelectronics Design & Application S.R.O.

发明人： Marco Pasotti ,  Fabio De Santis ,  Roberto Bregoli ,  Dario Livornesi ,  Sandor Petenyi

IPC分类号： G11C16/30 ,  G11C5/14 ,  G11C16/04 ,  H01L27/115 ,  G11C16/28

CPC分类号： G11C16/30 ,  G05F3/30 ,  G11C5/147 ,  G11C16/0408 ,  G11C16/0433 ,  G11C16/10 ,  G11C16/28 ,  G11C2216/10 ,  H01L27/11521 ,  H01L27/1156 ,  H03F3/45188 ,  H03F3/45475 ,  H03F2200/456 ,  H03F2203/45341 ,  H03F2203/45342 ,  H03F2203/45528 ,  H03F2203/45674 ,  H03F2203/45676

摘要： A device for generating a reference voltage includes a first non-volatile memory cell provided with a control-gate transistor and a reading transistor. The control-gate transistor includes a gate terminal, a body, a first conduction terminal and a second conduction terminal. The first conduction terminal and the second conduction terminal are connected together to form a control-gate terminal. The reading transistor includes a gate terminal that is connected to the gate terminal of the control-gate transistor to form a floating-gate terminal, a body, a third conduction terminal and a fourth conduction terminal. The device also includes a second, equivalent, memory cell. The source terminal of the first non-volatile memory cell and the source terminal of the second equivalent memory cell are connected together.

公开(公告)号：US09685500B2

公开(公告)日：2017-06-20

申请号：US14645566

申请日：2015-03-12

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Yutaka Shionoiri ,  Tomoaki Atsumi ,  Shuhei Nagatsuka ,  Yutaka Okazaki ,  Suguru Hondo

IPC分类号： H01L29/12 ,  H01L29/04 ,  H01L27/12 ,  H01L29/786 ,  H01L29/24 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/06

CPC分类号： H01L29/045 ,  H01L27/0688 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

摘要： A semiconductor device with a transistor having favorable electrical characteristics is provided. The semiconductor device has a memory circuit and a circuit that are over the same substrate. The memory circuit includes a capacitor, a first transistor, and a second transistor. A gate of the first transistor is electrically connected to the capacitor and one of a source and a drain of the second transistor. The circuit includes a third transistor and a fourth transistor that are electrically connected to each other in series. The first transistor and the third transistor each include an active layer including silicon, and the second transistor and the fourth transistor each include an active layer including an oxide semiconductor.

公开(公告)号：US09659655B1

公开(公告)日：2017-05-23

申请号：US15259763

申请日：2016-09-08

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Kevin K. Chan ,  Bahman Hekmatshoartabari ,  Tak H. Ning ,  Jeng-Bang Yau

IPC分类号： G11C16/04 ,  H01L27/1156 ,  H01L29/423 ,  H01L29/788 ,  G11C16/10

CPC分类号： G11C16/0441 ,  G11C16/045 ,  G11C16/10 ,  G11C16/26 ,  H01L27/1156 ,  H01L29/7885

摘要： Semiconductor devices and methods of writing information to a memory cell include an n-type transistor connected to a first terminal. The n-type transistor is formed with a low injection-barrier material gate dielectric. A p-type transistor is connected in serial between the n-type transistor and a second terminal. The p-type transistor is formed with a low injection-barrier material gate dielectric. The first and second transistor share a common floating gate and a common output node.