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11.发明授权Semiconductor package with joint reliability, entangled wires including insulating material 失效半导体封装具有接头可靠性，缠绕电线包括绝缘材料公开(公告)号：US07969024B2
公开(公告)日：2011-06-28
申请号：US12453103
申请日：2009-04-29
Applicant: Hyun-soo Chung , Jae-shin Cho , Seong-deok Hwang , Jum-gon Kim , Ki-hyuk Kim
Inventor： Hyun-soo Chung , Jae-shin Cho , Seong-deok Hwang , Jum-gon Kim , Ki-hyuk Kim
CPC classification number: H01L23/49811 , H01L23/525 , H01L23/53252 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/0231 , H01L2224/02313 , H01L2224/0236 , H01L2224/0239 , H01L2224/024 , H01L2224/0401 , H01L2224/05155 , H01L2224/0558 , H01L2224/05639 , H01L2224/05644 , H01L2224/111 , H01L2224/11334 , H01L2224/13005 , H01L2224/13022 , H01L2224/13076 , H01L2224/13139 , H01L2224/13144 , H01L2224/13155 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K3/325 , H05K2201/10348 , H05K2201/10977 , H01L2924/00014
Abstract: A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line.
Abstract translation: 公开了一种具有改进的接头可靠性的半导体封装以及制造半导体封装的方法。 可以在其上可以布置半导体器件的半导体晶片的表面上形成导电连接器。 包括连接焊盘的一部分露出的第一开口的第一绝缘层可以形成在连接焊盘和半导体晶片上。 电连接到连接焊盘的暴露部分的再布线可以形成在第一绝缘层上。 可以在重新配线和第一绝缘层上形成第二绝缘层，该第二绝缘层包括第二开口，重新布线的一部分暴露在第二开口中。 包括一个或多个缠结线的连接端子可以形成在重新布线的暴露部分上，以便电连接到重新布线。
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公开(公告)号：US20110073355A1
公开(公告)日：2011-03-31
申请号：US12884701
申请日：2010-09-17
Applicant: Akira TAMURA
Inventor： Akira TAMURA
IPC: H05K1/02
CPC classification number: H05K3/32 , H01L23/49827 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/72 , H01L24/81 , H01L2224/13011 , H01L2224/13014 , H01L2224/1316 , H01L2224/14131 , H01L2224/81101 , H01L2924/00013 , H01L2924/01029 , H01L2924/14 , H05K2201/0314 , H05K2201/09681 , H05K2201/09854 , H05K2201/1028 , H05K2201/10348 , H05K2201/10378 , H05K2201/10674 , H01L2924/01024 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
Abstract: An interposer for connecting a semiconductor and a circuit board includes an insulating material sheet, a through hole which is formed in the insulating material sheet and an elastic conductive contact which is formed from an elastic conductive sheet and provided in the through hole.
Abstract translation: 用于连接半导体和电路板的插入件包括绝缘材料片，形成在绝缘材料片中的通孔和由弹性导电片形成并设置在通孔中的弹性导电接触。
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公开(公告)号：US20090315177A1
公开(公告)日：2009-12-24
申请号：US12453103
申请日：2009-04-29
Applicant: Hyun-soo Chung , Jae-shin Cho , Seong-deok Hwang , Jum-gon Kim , Ki-hyuk Kim
Inventor： Hyun-soo Chung , Jae-shin Cho , Seong-deok Hwang , Jum-gon Kim , Ki-hyuk Kim
IPC: H01L23/498
CPC classification number: H01L23/49811 , H01L23/525 , H01L23/53252 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/0231 , H01L2224/02313 , H01L2224/0236 , H01L2224/0239 , H01L2224/024 , H01L2224/0401 , H01L2224/05155 , H01L2224/0558 , H01L2224/05639 , H01L2224/05644 , H01L2224/111 , H01L2224/11334 , H01L2224/13005 , H01L2224/13022 , H01L2224/13076 , H01L2224/13139 , H01L2224/13144 , H01L2224/13155 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K3/325 , H05K2201/10348 , H05K2201/10977 , H01L2924/00014
Abstract: A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line.
Abstract translation: 公开了一种具有改进的接头可靠性的半导体封装以及制造半导体封装的方法。 可以在其上可以布置半导体器件的半导体晶片的表面上形成导电连接器。 包括连接焊盘的一部分露出的第一开口的第一绝缘层可以形成在连接焊盘和半导体晶片上。 电连接到连接焊盘的暴露部分的再布线可以形成在第一绝缘层上。 可以在重新配线和第一绝缘层上形成第二绝缘层，该第二绝缘层包括第二开口，重新布线的一部分暴露在第二开口中。 包括一个或多个缠结线的连接端子可以形成在重新布线的暴露部分上，以便电连接到重新布线。
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公开(公告)号：US20040159915A1
公开(公告)日：2004-08-19
申请号：US10775922
申请日：2004-02-10
Applicant: International Business Machines Corporation
Inventor： Michael F. McAllister , John G. Torok
IPC: G06F017/50 , H01L023/58
CPC classification number: H05K1/141 , H05K1/0286 , H05K1/162 , H05K3/325 , H05K3/3436 , H05K3/429 , H05K2201/049 , H05K2201/09309 , H05K2201/10348 , H05K2201/10666 , H05K2201/10719 , Y10T29/49117 , Y10T29/49121 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49169
Abstract: A Land Grid Array structure is enhanced with a flex film interposer that not only provides a Land Grid Array (LGA) electrical connection between a Multi-Chip Module (MCM) and the next level of integration such as a system board, but also provides a reliable means to implement desired Engineering Change (EC) capability as well as a means for decoupling power to ground structure to minimize switching activity effects on the System. The invention as described can be implemented for EC repair, for Capacitive Decoupling or both.
Abstract translation: 使用柔性膜插入器增强了栅格阵列结构，不仅在多芯片模块（MCM）和下一级集成（例如系统板）之间提供了一个栅格阵列（LGA）电连接，而且提供了一个 可靠的手段来实现所需的工程变更（EC）能力，以及将功率与地面结构分离的手段，以最小化对系统的开关活动影响。 所描述的发明可以用于EC修复，用于电容去耦或两者。
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Patent Agency Ranking
公开(公告)号：US12028978B2
公开(公告)日：2024-07-02
申请号：US17397314
申请日：2021-08-09
Applicant: Northrop Grumman Systems Corporation
Inventor： Matthew J. Pirih , Steven J. Mass , Andrew Yurko
CPC classification number: H05K1/144 , B33Y80/00 , H05K3/368 , H05K3/4015 , H05K2201/042 , H05K2201/10265 , H05K2201/10348 , H05K2203/0723 , H05K2203/095 , H05K2203/107
Abstract: An elongate, three dimensional, conductive, micro lattice truss structure has parallel layers of resilient strands so that the truss structure maintains structural integrity during end-to-end compression which shortens its uncompressed length. The resiliency of the micro lattice truss structure enables the truss structure to return to substantially its uncompressed length when the compression is removed. The truss structure is adapted to provide a resilient electrical connection between two opposing conductive areas on parallel spaced-apart printed circuit boards when the distal ends of the truss structure engage and are compressed between the two areas.
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公开(公告)号：US20060172564A1
公开(公告)日：2006-08-03
申请号：US10595034
申请日：2003-07-07
Applicant: Mattias Nilsson , Stefan Johansson
Inventor： Mattias Nilsson , Stefan Johansson
IPC: H01R12/00
CPC classification number: H05K3/368 , G01R31/046 , H05K1/0268 , H05K1/117 , H05K3/325 , H05K3/4614 , H05K2201/10348 , H05K2201/10378 , H05K2203/162
Abstract: A retainer board (25, 27, 28) having at least one hole (10) in which a wire button contact (5) is inserted, wherein the hole (10) is plated and at least one conductor (20) is connected to the plated hole for providing outside access. Moreover a method for testing stacked circuit boards are disclosed comprising the steps of detachably arranging at least two circuits boards (11, 12, 29), testing the individual functionality of the circuit boards (11, 12) and if approved, assembling the circuit boards (11, 12) and the first retainer board (25, 27, 28), and asserting whether the overall functionality of the arrangement is approved.
Abstract translation: 具有插入有电线按钮触点（5）的至少一个孔（10）的保持板（25,27,28），其中所述孔（10）被电镀，并且至少一个导体（20）连接到 电镀孔用于提供外部接入。 此外，公开了一种用于测试堆叠电路板的方法，包括以下步骤：可拆卸地布置至少两个电路板（11,12,29），测试电路板（11,12）的各个功能，并且如果被批准，组装电路板 （11,12）和第一保持板（25,27,28），并且断言该装置的整体功能是否被批准。
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公开(公告)号：US20060030170A1
公开(公告)日：2006-02-09
申请号：US11204699
申请日：2005-08-16
Applicant: Jeffrey Brody , Hsichang Liu , Hai Longworth , James Monaco , Gerard Nuzback , Wei Zou
Inventor： Jeffrey Brody , Hsichang Liu , Hai Longworth , James Monaco , Gerard Nuzback , Wei Zou
CPC classification number: H05K3/325 , H01L23/49811 , H01L2924/0002 , H01L2924/09701 , H05K3/4007 , H05K2201/0367 , H05K2201/0373 , H05K2201/10348 , H05K2201/10719 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , H01L2924/00
Abstract: An improved Land Grid Array interconnect structure is provided with the use of small metal bumps on the substrate electrical contact pad. The bumps interlock with segments of the fuzz button connection and increase the physical contact surface area between the contact pad and fuss button. The improved contact reduces displacement of electrical contact points due to thermo-mechanical stress and lowers the required actuation force during assembly.
Abstract translation: 提供了一种改进的Land Grid阵列互连结构，其中在基板电接触焊盘上使用小的金属凸块。 凸起与绒头按钮连接的部分互锁，并增加接触垫和大按钮之间的物理接触表面积。 改进的接触减少了由于热机械应力引起的电接触点的位移，并降低了组装过程中所需的致动力。
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公开(公告)号：US20050221635A1
公开(公告)日：2005-10-06
申请号：US10708887
申请日：2004-03-30
Applicant: Jeffrey Brody , Hsichang Liu , Hai Longworth , James Monaco , Gerard Nuzback , Wei Zou
Inventor： Jeffrey Brody , Hsichang Liu , Hai Longworth , James Monaco , Gerard Nuzback , Wei Zou
CPC classification number: H05K3/325 , H01L23/49811 , H01L2924/0002 , H01L2924/09701 , H05K3/4007 , H05K2201/0367 , H05K2201/0373 , H05K2201/10348 , H05K2201/10719 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , H01L2924/00
Abstract: An improved Land Grid Array interconnect structure is provided with the use of small metal bumps on the substrate electrical contact pad. The bumps interlock with segments of the fuzz button connection and increase the physical contact surface area between the contact pad and fuzz button. The improved contact reduces displacement of electrical contact points due to thermo-mechanical stress and lowers the required actuation force during assembly.
Abstract translation: 提供了一种改进的Land Grid阵列互连结构，其中在基板电接触焊盘上使用小的金属凸块。 凸起与绒头按钮连接的部分互锁，并增加接触垫和绒毛按钮之间的物理接触表面积。 改进的接触减少了由于热机械应力引起的电接触点的位移，并降低了组装过程中所需的致动力。
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公开(公告)号：US20040016114A1
公开(公告)日：2004-01-29
申请号：US10202726
申请日：2002-07-25
Applicant: International Business Machines Corporation
Inventor： Michael F. McAllister , John G. Torok
IPC: H05K003/20 , H05K001/00
CPC classification number: H05K1/141 , H05K1/0286 , H05K1/162 , H05K3/325 , H05K3/3436 , H05K3/429 , H05K2201/049 , H05K2201/09309 , H05K2201/10348 , H05K2201/10666 , H05K2201/10719 , Y10T29/49117 , Y10T29/49121 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49169
Abstract: A Land Grid Array structure is enhanced with a flex film interposer that not only provides a Land Grid Array (LGA) electrical connection between a Multi-Chip Module (MCM) and the next level of integration such as a system board, but also provides a reliable means to implement desired Engineering Change (EC) capability as well as a means for decoupling power to ground structure to minimize switching activity effects on the System. The invention as described can be implemented for EC repair, for Capacitive Decoupling or both.
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